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31. 发明申请

US20100293367A1 System and Method for Optimizing Performance of an Information Handling System Component 有权
标题翻译：用于优化信息处理系统组件性能的系统和方法
公开(公告)号：US20100293367A1
公开(公告)日：2010-11-18
申请号：US12465391
申请日：2009-05-13
申请人： Stuart Allen Berke , William F. Sauber
发明人： Stuart Allen Berke , William F. Sauber
IPC分类号： G06F1/24 , G06F15/177
CPC分类号： G06F11/3409 , G06F11/3476
摘要： Systems and methods for optimizing performance of an information handling system component communicatively coupled to the information handling system are disclosed. An information handling system may include a data gathering module and an operating condition controller module. The data gathering module may be configured to retrieve an operating condition characterization value from the component. That operating condition characterization value may be substantially based on a predetermined characteristic of the component. The operating condition controller module may be configured to modify an operating condition of the component based at least on the retrieved operating condition characterization value.
摘要翻译：公开了用于优化通信地耦合到信息处理系统的信息处理系统组件的性能的系统和方法。信息处理系统可以包括数据收集模块和操作条件控制器模块。数据采集模块可以被配置为从组件检索操作条件表征值。该操作条件表征值可以基本上基于组件的预定特性。操作条件控制器模块可以被配置为至少基于所检索的操作条件表征值来修改部件的操作条件。

32. 发明授权

US07685477B2 System and method for auxiliary channel error messaging 有权
标题翻译：辅助通道错误信息的系统和方法
公开(公告)号：US07685477B2
公开(公告)日：2010-03-23
申请号：US11298007
申请日：2005-12-09
申请人： William F. Sauber , Rocco Ancona , Muhammed K. Jaber , Bruce A. Miller , Adolfo S. Montero , Margaret G. Reed-Lade , Jeff A. Rose , Andrew T. Sultenfuss , Larry White
发明人： William F. Sauber , Rocco Ancona , Muhammed K. Jaber , Bruce A. Miller , Adolfo S. Montero , Margaret G. Reed-Lade , Jeff A. Rose , Andrew T. Sultenfuss , Larry White
IPC分类号： G06F11/00
CPC分类号： G06F11/327
摘要： Information handling system errors are presented at a display with the information handling system graphics subsystem inoperative by communicating an identified error to the display through an auxiliary channel and generating a presentation of the error information with a microcontroller of the display. For example, errors determined by BIOS firmware running on a chipset are communicated through a DDC or I2C channel from the chipset to the display so that textual error messages are generated at the display without the use of the information handling system's graphic processor to generate an error message image.
摘要翻译：在信息处理系统图形子系统的显示器上呈现信息处理系统错误，通过通过辅助信道将识别出的错误传送给显示器，并通过显示器的微控制器产生出错信息。例如，通过芯片组运行的BIOS固件确定的错误通过DDC或I2C通道从芯片组传送到显示器，以便在显示器上生成文本错误消息，而不使用信息处理系统的图形处理器来产生错误消息图像。

33. 发明授权

US07603571B2 System and method for regulating the power consumption of a computer system 有权
标题翻译：用于调节计算机系统功耗的系统和方法
公开(公告)号：US07603571B2
公开(公告)日：2009-10-13
申请号：US10961360
申请日：2004-10-08
申请人： William F. Sauber
发明人： William F. Sauber
IPC分类号： G06F1/00
CPC分类号： G06F1/28 , G06F1/3203 , G06F1/324 , Y02D10/126
摘要： A system and method for regulating the power consumption of a computer system is disclosed. The power supplied to the computer system is evaluated. If the power supplied to or delivered by the computer system is sufficiently substandard, a command is issued to cause the components of the computer system to enter a reduced power condition.
摘要翻译：公开了一种用于调节计算机系统的功耗的系统和方法。评估提供给计算机系统的电源。如果由计算机系统提供的或由计算机系统递送的电力足够不合格，则发出命令以使计算机系统的组件进入降低的功率状态。

34. 发明申请

US20090083581A1 Methods and Systems for Managing Response Data in an Information Handling System 有权
标题翻译：在信息处理系统中管理响应数据的方法和系统
公开(公告)号：US20090083581A1
公开(公告)日：2009-03-26
申请号：US11859772
申请日：2007-09-23
申请人： William F. Sauber
发明人： William F. Sauber
IPC分类号： G06F11/34
CPC分类号： G06F11/3495 , G06F11/3419 , G06F11/3476
摘要： Methods for managing response data within an information handling system (IHS), where the method includes the step of obtaining response data from at least one component in the IHS, the response data generated in response to receiving a command. The method also includes accumulating the response data from the at least one component to compute a total response time.
摘要翻译：用于管理信息处理系统（IHS）中的响应数据的方法，其中所述方法包括从IHS中的至少一个组件获得响应数据的步骤，响应于接收到命令而产生的响应数据。该方法还包括累积来自至少一个组件的响应数据以计算总响应时间。

35. 发明授权

US07383365B2 Method and system for PCI express audiovisual output 有权
标题翻译：用于PCI视听输出的方法和系统
公开(公告)号：US07383365B2
公开(公告)日：2008-06-03
申请号：US10621069
申请日：2003-07-16
申请人： William F. Sauber
发明人： William F. Sauber
IPC分类号： G06F3/00 , G06F13/00 , G06F15/00 , G06F12/00
CPC分类号： G06F3/14 , G09G5/006 , G09G5/363
摘要： Audio and visual information processing components are co-located on a PCI Express graphics card by communicating audio and visual information received through the PCI Express interface of the graphics card to a PCI Express switch which switches audio information to audio processing components and video information to video processing components for processing of the information to an audiovisual appliance output. The audio processing components may include an AC97 interface and CODEC or an audio controller that processes PCI Express information. The audiovisual output signal may include a variety of combined or separate audiovisual appliance compatible outputs such as coaxial cable output, EVC output, HDMI output, HDTV output or 1394 output.
摘要翻译：音频和视频信息处理组件通过将通过图形卡的PCI Express接口接收的音频和视觉信息传送到PCI Express交换机，将音频信息转换为音频处理组件，将视频信息转换为视频，共同位于PCI Express图形卡上处理用于处理信息的组件到视听设备输出。音频处理组件可以包括处理PCI Express信息的AC97接口和CODEC或音频控制器。视听输出信号可以包括各种组合或单独的视听设备兼容输出，例如同轴电缆输出，EVC输出，HDMI输出，HDTV输出或1394输出。

36. 发明授权

US07240225B2 System and method for throttling power in one or more information handling systems 有权
标题翻译：在一个或多个信息处理系统中节电的系统和方法
公开(公告)号：US07240225B2
公开(公告)日：2007-07-03
申请号：US10705600
申请日：2003-11-10
申请人： James A. Brewer , William F. Sauber
发明人： James A. Brewer , William F. Sauber
IPC分类号： G06F1/00
CPC分类号： G06F1/3203
摘要： An information handling system includes support for dynamic power throttling. In one embodiment, an information handling system includes power level detection and power control modules. The power level detection module may monitor power consumption for the information handling system and may automatically transmit power level data to a power level manager, based on the monitored power consumption. The power control module may receive power control data from the power level manager. The power control module may also automatically adjust power consumption of the information handling system, in accordance with the power control data received from the power level manager. In another embodiment, an information handling system may include an interface and a power level manager. The power level manager may receive power information for computers via the interface, may automatically compute an adjusted power threshold setting, and may automatically transmit the adjusted power threshold setting to a computer.
摘要翻译：信息处理系统包括支持动态功率节流。在一个实施例中，信息处理系统包括功率电平检测和功率控制模块。功率电平检测模块可以监视信息处理系统的功率消耗，并且可以基于所监视的功率消耗自动地向功率电平管理器发送功率电平数据。功率控制模块可以从功率级管理器接收功率控制数据。功率控制模块还可以根据从功率电平管理器接收的功率控制数据自动调整信息处理系统的功耗。在另一个实施例中，信息处理系统可以包括接口和功率电平管理器。功率电平管理器可以通过接口接收计算机的功率信息，可以自动计算调整的功率阈值设置，并且可以自动地将调整的功率阈值设置发送到计算机。

37. 发明授权

US06895447B2 Method and system for configuring a set of wire lines to communicate with AC or DC coupled protocols 有权
标题翻译：用于配置一组有线线路以与AC或DC耦合协议通信的方法和系统
公开(公告)号：US06895447B2
公开(公告)日：2005-05-17
申请号：US10164041
申请日：2002-06-06
申请人： James Brewer , William F. Sauber
发明人： James Brewer , William F. Sauber
IPC分类号： G06F3/00 , G06F13/12 , G06F13/36 , G06F13/38 , G06F13/42
CPC分类号： G06F13/385
摘要： A universal bus communicates information by one of plural bus protocols. A bus protocol selector is operable to select one of the plural bus protocols associated with a device interfaced with an information handling system and to communicate information over the bus with the selected bus protocol. An Input/Output chip includes a protocol selector unit that selects a bus protocol I/O unit to communicate with the device over the universal bus. The bus protocol I/O unit communicates over the universal bus by using a bus protocol that is compatible with the device. For instance, the one of plural available differential serial bus protocols is selected so that the bus protocol I/O unit communicates with the device using a bus protocol compatible with the device. In some instances, a bypass circuit configures the physical characteristics of the universal bus, such as by interfacing or removing a capacitor with the universal bus to support AC or DC coupled bus protocols.
摘要翻译：通用总线通过多个总线协议之一传送信息。总线协议选择器可操作以选择与与信息处理系统接口的设备相关联的多个总线协议中的一个，并且通过总线与所选择的总线协议来传送信息。输入/输出芯片包括选择总线协议I / O单元以通过通用总线与设备通信的协议选择器单元。总线协议I / O单元通过通用总线通过与设备兼容的总线协议进行通信。例如，选择多个可用的差分串行总线协议之一，使得总线协议I / O单元使用与设备兼容的总线协议与设备通信。在一些情况下，旁路电路配置通用总线的物理特性，例如通过使用通用总线接口或去除电容器来支持AC或DC耦合总线协议。

38. 发明授权

US4905145A Multiprocessor 失效
标题翻译：多处理器
公开(公告)号：US4905145A
公开(公告)日：1990-02-27
申请号：US273140
申请日：1988-11-15
申请人： William F. Sauber
发明人： William F. Sauber
IPC分类号： G06F9/44 , G06F13/36
CPC分类号： G06F9/4436 , G06F13/36
摘要： A multiprocessor which includes a plurality of processing units interconnected by a global bus. Each processing unit has the capability for initiating control instructions including notification instructions and for selectively transmitting the control instructions over the global bus to the plurality of processing units and trigger device for initiating execution of the control instructions as a destination processing unit. A multiprocessor so constructed is capable of executing blocks of instructions sequentially or concurrently or both at required by a single program to reduce program execution time to a minimum.
摘要翻译：一种多处理器，其包括通过全局总线互连的多个处理单元。每个处理单元具有启动控制指令的能力，包括通知指令，并且用于通过全局总线选择性地将控制指令发送到多个处理单元，并且触发设备用于启动作为目的地处理单元的控制指令的执行。如此构造的多处理器能够在单个程序所要求的情况下顺序地或并行地执行指令块，或者同时执行指令块，以将程序执行时间减少到最小。

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