会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 34. 发明授权
    • Residue removal from singulated die sidewall
    • 从单个模具侧壁残留除去
    • US09076860B1
    • 2015-07-07
    • US14248165
    • 2014-04-08
    • Wei-Sheng LeiPrabhat KumarJames S. PapanuAjay KumarBrad Eaton
    • Wei-Sheng LeiPrabhat KumarJames S. PapanuAjay KumarBrad Eaton
    • H01L21/78H01L21/3065H01L21/308H01L21/67
    • H01L21/02076H01L21/67092H01L21/67207
    • Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a laser scribing process to provide gaps in the mask, the gaps exposing regions of the semiconductor wafer between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the gaps in the mask to singulate the integrated circuits. The method also involves, subsequent to plasma etching the semiconductor wafer, removing etch residue from sidewalls of the singulated integrated circuits.
    • 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个示例中,对具有多个集成电路的半导体晶片进行切割的方法包括在半导体晶片上形成掩模,该掩模包括覆盖并保护集成电路的层。 该方法还包括用激光划线工艺对掩模进行图案化以在掩模中提供间隙,在半导体晶片的间隙暴露集成电路之间的半导体晶片。 该方法还包括通过掩模中的间隙等离子体蚀刻半导体晶片以对集成电路进行分离。 该方法还涉及在等离子体蚀刻半导体晶片之后,从单个集成电路的侧壁去除蚀刻残留物。