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    • 32. 发明授权
    • Time-varying barcodes for information exchange
    • 用于信息交换的时变条形码
    • US08231054B1
    • 2012-07-31
    • US13113205
    • 2011-05-23
    • Moon J. Kim
    • Moon J. Kim
    • G06K5/00
    • H04B10/116G06K7/1095G06K19/06112
    • Embodiments of the present invention provide time-varying barcodes for information exchange. Specifically, embodiments of the present invention provide a system and method for communicating information between electronic devices via a time-varying barcode image sequence. In a typical embodiment, information to be transmitted is divided into packets. A barcode image is generated from each packet. Each barcode image is displayed sequentially with varying display times based on the complexity of the barcode image. A second electronic device reads and decodes the barcode image sequence until the entire information is received.
    • 本发明的实施例提供用于信息交换的时变条形码。 具体地,本发明的实施例提供了一种用于经由时变条形码图像序列在电子设备之间传送信息的系统和方法。 在典型的实施例中,要发送的信息被分成分组。 从每个数据包生成条形码图像。 基于条形码图像的复杂度,每个条形码图像以不同的显示时间依次显示。 第二电子设备读取和解码条形码图像序列,直到接收到整个信息。
    • 33. 发明申请
    • SEMICONDUCTOR SENSOR RELIABILITY
    • 半导体传感器可靠性
    • US20120158392A1
    • 2012-06-21
    • US12968632
    • 2010-12-15
    • Moon J. Kim
    • Moon J. Kim
    • G06F17/50
    • G06F17/5072G01R31/2856G06F2217/14G06F2217/76
    • Embodiments of the present invention provide a semiconductor sensor reliability system and method. Specifically, the present invention provides in-situ positioning of a reliability sensor (hereinafter sensors) within each functional block, as well as at critical locations, of a semiconductor system. The quantity and location of the sensors are optimized to have maximum sensitivity to known process variations. In general, the sensor models a behavior (e.g., aging process) of the location (e.g., functional block) in which it is positioned and comprises a plurality of stages connected as a network and a self-digitizer. Each sensor has a mode selection input for selecting a mode thereof and an operational trigger input for enabling the sensor to model the behavior. The model selection input and operation trigger enable the sensor to have an operational mode in which the plurality of sensors are subject to an aging process, as well as a measurement mode in which an age of the plurality of sensors is outputted.
    • 本发明的实施例提供一种半导体传感器可靠性系统和方法。 具体地,本发明提供了可靠性传感器(以下称为传感器)在半导体系统的各个功能块内以及关键位置的原位定位。 传感器的数量和位置被优化,以对已知的工艺变化具有最大的灵敏度。 通常,传感器对其所在的位置(例如,功能块)的行为(例如,老化处理)进行建模,并且包括作为网络连接的多个级和自数字化器。 每个传感器具有用于选择其模式的模式选择输入和用于使传感器对行为进行建模的操作触发输入。 模型选择输入和操作触发使得传感器具有其中多个传感器经历老化处理的操作模式以及输出多个传感器的年龄的测量模式。
    • 35. 发明申请
    • STRONG PASSIVE AD-HOC RADO-FREQUENCY IDENTIFICATION
    • 强大的无源射频识别技术
    • US20120126945A1
    • 2012-05-24
    • US12949033
    • 2010-11-18
    • Moon J. KimBonwoong Koo
    • Moon J. KimBonwoong Koo
    • G06K7/01
    • G06K7/10188G06K7/10237
    • Embodiments of the present invention provide a strong passive ad-hoc radio-frequency identification (RFID) network (the “network). The network typically includes an RFID receiver and N quantity of RFID tags coupled to one another. For example, a network under the present invention can include an RFID reader; a first RFID tag in communication with the RFID reader; and a second RFID tag in communication with the first RFID tag. The first RFID tag and the second RFID tag will have passive capacitance to allow them to store energy and data. In this example, the first RFID tag can be enabled to behave as an RFID reader. Moreover, the first RFID tag is positioned within a first field generated by the RFID reader, while the second RFID tag being in a second field generated by the first RFID tag, the second field generated using the energy stored in the first RFID tag. This type of tag to tag coupling/communication arrangement can continue for a number of tags. Not only does this allow for communication around physical obstacles, but it allows any RFID tag to be configured to perform a synchronized reader operation with the RFID reader.
    • 本发明的实施例提供了一种强大的无源自组织射频识别(RFID)网络(“网络”)。 网络通常包括RFID接收器和N个彼此耦合的RFID标签。 例如,根据本发明的网络可以包括RFID读取器; 与RFID读取器通信的第一RFID标签; 以及与第一RFID标签通信的第二RFID标签。 第一个RFID标签和第二个RFID标签将具有无源电容,使其能够存储能量和数据。 在该示例中,可以使第一RFID标签作为RFID阅读器。 此外,第一RFID标签位于由RFID读取器产生的第一场中,而第二RFID标签位于由第一RFID标签产生的第二场中,使用存储在第一RFID标签中的能量产生的第二场。 用于标记耦合/通信布置的这种类型的标签可以持续许多标签。 这不仅允许围绕物理障碍物进行通信,而且允许任何RFID标签被配置为与RFID读取器执行同步的读取器操作。
    • 36. 发明申请
    • SEARCH TERM SECURITY
    • 搜索安全性
    • US20110113038A1
    • 2011-05-12
    • US12617160
    • 2009-11-12
    • Elmer K. CorbinRichard FerriMoon J. KimLev Kozakov
    • Elmer K. CorbinRichard FerriMoon J. KimLev Kozakov
    • G06F17/30
    • G06F21/6263G06F16/3338G06F21/50G06F2221/2119G06F2221/2123
    • As indicated above, the present invention transparently inserts search arguments/terms (referred to as noise) into a search string so that the search arguments themselves would not be clearly evident when a user is searching. The inserted noise terms are related to the underlying search terms. This would confuse a mining program and/or hacker looking for sensitive material (such as intellectual property). When the search results are returned, any “hits” resulting from noise will be removed transparently from the overall results. The insertion and removal under the present invention provides a more secure level of searching, yet is completely transparent to the end user. The inserted random search arguments are germane contextually to the search string.
    • 如上所述,本发明将搜索参数/术语(称为噪声)透明地插入到搜索字符串中,使得当用户正在搜索时搜索参数本身将不清楚。 插入的噪声项与底层搜索术语相关。 这将混淆采矿计划和/或寻找敏感材料(如知识产权)的黑客。 当返回搜索结果时,噪声产生的任何“命中”将从整体结果中透明地删除。 根据本发明的插入和移除提供了更安全的搜索水平,但是对最终用户是完全透明的。 插入的随机搜索参数是与搜索字符串内容相关的。
    • 38. 发明申请
    • STRUCTURE FOR SYMMETRICAL CAPACITOR
    • 对称电容器结构
    • US20100295156A1
    • 2010-11-25
    • US12851814
    • 2010-08-06
    • Choongyeun ChoJonghae KimMoon J. KimJean-Olivier PlouchartRobert E. Trzcinski
    • Choongyeun ChoJonghae KimMoon J. KimJean-Olivier PlouchartRobert E. Trzcinski
    • H01L29/92
    • H01L29/94H01L23/5223H01L27/0805H01L2924/0002H01L2924/00
    • Capacitance circuits are provided disposing a lower vertical-native capacitor metal layer above a planar front-end-of-line semiconductor base substrate, planar metal bottom plates spaced a bottom plate distance from the base and top plates above the bottom plates spaced a top plate distance from the base defining metal-insulator-metal capacitors, top plate footprints disposed above the base substrate smaller than bottom plate footprints and exposing bottom plate remainder upper lateral connector surfaces; disposing parallel positive port and negative port upper vertical-native capacitor metal layers over and each connected to top plate and bottom plate upper remainder lateral connector surface. Moreover, electrical connecting of the first top plate and the second bottom plate to the positive port metal layer and of the second top plate and the first bottom to the negative port metal layer impart equal total negative port and positive port metal-insulator-metal capacitor extrinsic capacitance.
    • 提供电容电路,其设置在平面前端半导体基底基板上方的下垂直电容器金属层,与底板间隔开的底板距离的平面金属底板和位于底板上方的顶板,间隔开顶板 距离限定金属 - 绝缘体 - 金属电容器的基底的距离,设置在基底基板之上的顶板印迹小于底板印迹并且暴露底板剩余的上横向连接器表面; 将平行的正端口和负端口上垂直电容器金属层布置在每个顶板和底板的上部剩余侧面连接器表面上。 此外,第一顶板和第二底板与正端口金属层以及第二顶板和第一底部到负极金属层的电连接赋予相等的总负端口和正端口金属 - 绝缘体 - 金属电容器 外在电容。
    • 39. 发明授权
    • Structure for symmetrical capacitor
    • 对称电容器结构
    • US07838384B2
    • 2010-11-23
    • US11970665
    • 2008-01-08
    • Choongyeun ChoJonghae KimMoon J. KimJean-Olivier PlouchartRobert E. Trzcinski
    • Choongyeun ChoJonghae KimMoon J. KimJean-Olivier PlouchartRobert E. Trzcinski
    • H01L21/20
    • H01L29/94H01L23/5223H01L27/0805H01L2924/0002H01L2924/00
    • Methods, articles and design structures for capacitance circuits are provided disposing a lower vertical-native capacitor metal layer above a planar front-end-of-line semiconductor base substrate, planar metal bottom plates spaced a bottom plate distance from the base and top plates above the bottom plates spaced a top plate distance from the base defining metal-insulator-metal capacitors, top plate footprints disposed above the base substrate smaller than bottom plate footprints and exposing bottom plate remainder upper lateral connector surfaces; disposing parallel positive port and negative port upper vertical-native capacitor metal layers over and each connected to top plate and bottom plate upper remainder lateral connector surface. Moreover, electrical connecting of the first top plate and the second bottom plate to the positive port metal layer and of the second top plate and the first bottom to the negative port metal layer impart equal total negative port and positive port metal-insulator-metal capacitor extrinsic capacitance.
    • 提供了用于电容电路的方法,制品和设计结构,其在平面前端半导体基底基板上方设置较低的垂直电容器金属层,平板金属底板与底座和顶板间隔开底板 底板与限定金属 - 绝缘体 - 金属电容器的基板间隔开顶板距离,顶板脚印设置在基底基板之上,小于底板印迹,并露出底板剩余的上横向连接器表面; 将平行的正端口和负端口上垂直电容器金属层布置在每个顶板和底板的上部剩余侧面连接器表面上。 此外,第一顶板和第二底板与正端口金属层以及第二顶板和第一底部到负极金属层的电连接赋予相等的总负端口和正端口金属 - 绝缘体 - 金属电容器 外在电容。