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31. 发明授权

US5433000A Manufacturing method for a multilayer wiring board 失效
标题翻译：多层布线板的制造方法
公开(公告)号：US5433000A
公开(公告)日：1995-07-18
申请号：US210470
申请日：1994-03-21
申请人： Toshio Tamura , Nobuyuki Yasuda
发明人： Toshio Tamura , Nobuyuki Yasuda
IPC分类号： H05K1/11 , H05K3/00 , H05K3/42 , H05K3/46 , H01K3/10
CPC分类号： H05K3/4652 , H05K1/115 , H05K3/0044 , H05K2201/0352 , H05K2201/0355 , H05K2201/09509 , H05K2201/09518 , H05K2203/025 , H05K2203/0554 , H05K3/429 , Y10T29/49126 , Y10T29/49165
摘要： A multilayer wiring board is constructed of insulating substrates and circuit patterns formed thereon. A manufacturing method produces the multilayer wiring board by forming a mask on one surface of the multilayer substrate. The mask has apertures registered with blind holes and/or a through hole wherein the apertures have different diameters depending on the depths of the blind holes and/or the through hole such that the larger the depth, the larger the diameter. Etching is performed on the multilayer substrate corresponding to the smallest aperture using an abrasive powder having a particle size smaller than the diameter of the smallest aperture. Portions of the multilayer substrate are gradually etched corresponding to the other apertures using abrasive powders having particle sizes smaller than the diameters of the other apertures wherein the blind holes having the desired depths and/or the through hole are formed in the multilayer substrate. Accordingly, the blind holes having different depths and/or the through hole can be formed by using the single mask. Further, the required depths of the blind holes and/or the through hole can be obtained without unduly etching the bottom of the blind holes. A reliable electrical connection can be obtained between the circuit patterns in the different layers through the conductive films formed on the inner wall surfaces of the blind holes and/or the through hole.
摘要翻译：多层布线板由绝缘基板和形成在其上的电路图案构成。制造方法通过在多层基板的一个表面上形成掩模来制造多层布线板。掩模具有与盲孔和/或通孔对齐的孔，其中孔根据盲孔和/或通孔的深度具有不同的直径，使得深度越大，直径越大。使用粒径小于最小孔径直径的研磨粉末，在对应于最小孔径的多层基板上进行蚀刻。使用具有小于其它孔径直径的研磨粉末，使用具有所需深度和/或通孔的盲孔形成在多层基板中的研磨粉末，逐渐蚀刻多层基板的部分。因此，可以通过使用单个掩模来形成具有不同深度和/或通孔的盲孔。此外，可以在不盲目蚀刻盲孔的底部的情况下获得盲孔和/或通孔所需的深度。通过形成在盲孔和/或通孔的内壁表面上的导电膜，可以在不同层中的电路图案之间获得可靠的电连接。

32. 发明授权

US5386437A Phase-locked loop circuit 失效
标题翻译：锁相环电路
公开(公告)号：US5386437A
公开(公告)日：1995-01-31
申请号：US973109
申请日：1992-11-06
申请人： Nobuyuki Yasuda
发明人： Nobuyuki Yasuda
IPC分类号： H03L7/089 , H03L7/107 , H03L7/14 , H04L7/033 , H03D3/24
CPC分类号： H03L7/107 , H03L7/0893 , H03L7/143 , H03L7/145
摘要： A phase-locked loop circuit includes a phase comparator for comparing a phase of an input signal with a reference input, connecting circuits having circuit elements arranged in signal paths to be selectively operative, output circuit for supplying an output of the phase comparing means to the connecting circuits, and control circuit located between the output circuit and phase comparator for making a signal path operative by controlling the output circuit.
摘要翻译：锁相环电路包括用于将输入信号的相位与参考输入进行比较的相位比较器，具有布置在信号路径中的电路元件的连接电路以选择性地操作，输出电路，用于将相位比较装置的输出提供给连接电路和位于输出电路和相位比较器之间的控制电路，用于通过控制输出电路使信号通路工作。

33. 发明授权

US5347712A Method for manufacturing a multilayer wiring board 失效
标题翻译：多层布线板的制造方法
公开(公告)号：US5347712A
公开(公告)日：1994-09-20
申请号：US76191
申请日：1993-06-14
申请人： Nobuyuki Yasuda , Toshio Tamura , Hiroshi Toi , Akio Mishima
发明人： Nobuyuki Yasuda , Toshio Tamura , Hiroshi Toi , Akio Mishima
IPC分类号： H05K1/11 , H05K3/00 , H05K3/40 , H05K3/42 , H05K3/46 , H01K3/10
CPC分类号： H05K3/0044 , H05K1/115 , H05K3/4652 , H05K2201/0355 , H05K2201/0394 , H05K2201/09509 , H05K2201/09518 , H05K2201/09809 , H05K2201/09845 , H05K2203/025 , H05K2203/0554 , H05K3/429 , Y10T29/49155 , Y10T29/49165
摘要： A multilayer wiring board and a method for manufacturing the same are disclosed. The wiring board comprises an insulating substrate having a first and second conductor layers formed on major surfaces of the insulating substrate, a blind hole formed through the first conductor layer and the insulating substrate to expose the second conductor layer at the bottom of the blind hole, and a connecting conductor provided to cover the exposed surface of the second conductor layer wall portion of the blind hole and the first conductor layer. Since the connecting conductor and the second conductor are made in surface contact, connection reliability is very much improved. The blind hole is made by blasting a fine abrasive powder beam to selectively remove the insulating substrate. The end of selective removal can be easily controlled by the difference of working speed against the insulating substrate and the conductor layer to successfully expose the second conductor layer at the bottom of the blind hole.
摘要翻译：公开了一种多层布线板及其制造方法。所述布线基板包括绝缘基板，所述绝缘基板具有形成在所述绝缘基板的主表面上的第一和第二导体层，通过所述第一导体层形成的盲孔和所述绝缘基板，以露出所述盲孔底部的所述第二导体层，以及连接导体，被设置为覆盖盲孔的第二导体层壁部分和第一导体层的暴露表面。由于连接导体和第二导体形成表面接触，所以连接可靠性得到非常大的改善。盲孔通过喷射细磨料粉末束来选择性地去除绝缘基底而制成。可以通过与绝缘基板和导体层的工作速度的差异容易地控制选择性去除的结束，以成功地暴露在盲孔底部的第二导体层。

34. 发明授权

US4763123A Signal selecting circuit for simultaneously performing plural input-output operations 失效
标题翻译：用于同时执行多个输入 - 输出操作的信号选择电路
公开(公告)号：US4763123A
公开(公告)日：1988-08-09
申请号：US833098
申请日：1986-02-25
申请人： Nobuyuki Yasuda
发明人： Nobuyuki Yasuda
IPC分类号： G11B27/10 , G11B7/013 , G11B20/10 , G11B20/18 , H03K17/00 , H04Q9/00 , G11B7/00
CPC分类号： G11B7/013 , G11B20/10 , G11B20/1809
摘要： A signal selecting circuit comprising a plurality of input terminals supplied with a plurality of signals, respectively, a plurality of gate circuits connected to the plurality of input terminals, respectively, a plurality of output terminals supplied with the plurality of signals through the plurality of gate circuits, respectively, a sequence counter for generating count values in order to designte one of the plurality of gate circuits, a decoding circuit for decoding the count values from the sequence counter so as to produce a plurality of gate signals so as to circulatively open the gate circuits and detecting circuit connected to the plurality of gate circuits and for detecting when at least one of the plurality of signals is obtained through one of the gate circuits which is in open state so as to produce an inhibiting signal being provided to the counter to stop the counting operation thereof and to keep the designation of the counter at the last designated gate circuit so that the plurality of signals can be taken out in an impartial priority order.
摘要翻译：一种信号选择电路，包括分别提供多个信号的多个输入端，分别连接到多个输入端的多个门电路，多个通过多个门提供多个信号的输出端电路分别产生用于产生计数值以便设计多个门电路中的一个的序列计数器，解码电路，用于对来自序列计数器的计数值进行解码，以产生多个门信号，以循环地打开门电路和连接到多个门电路的检测电路，并且用于检测何时通过处于打开状态的门电路中的一个获得多个信号中的至少一个，以产生禁止信号提供给计数器停止计数操作，并将计数器的指定保持在最后指定的门电路可以以公正的优先级顺序取出多个信号。

35. 发明授权

US07173692B2 Device and method for optically inspecting operating holes formed in heads of screws 有权
标题翻译：用于光学检查形成在螺钉头部中的操作孔的装置和方法
公开(公告)号：US07173692B2
公开(公告)日：2007-02-06
申请号：US10837714
申请日：2004-05-04
申请人： Nobuyuki Yasuda , Masahiro Togawa
发明人： Nobuyuki Yasuda , Masahiro Togawa
IPC分类号： G01N21/00
CPC分类号： G01N21/954 , G01N21/8806
摘要： Image inspection is used to inspect defective or non-defective screw heads. An inspection device includes an inspecting portion for positioning and holding a screw, with a head, with the head up, a CCD camera provided right over the inspecting portion, an annular light source arranged between the inspecting portion and the CCD camera, and a determining device for processing an image of the CCD camera and determining whether the screw is defective or non-defective based on this processed image. An operating hole of the screw is illuminated by the annular light source so that no shadow forms to vividly photograph a hole bottom of the operating hole with the CCD camera. It is also possible to inspect a top surface of a head of a screw.
摘要翻译：图像检查用于检查有缺陷或无缺陷的螺丝头。检查装置包括用于定位和保持螺钉的检查部分，头部具有头部，设置在检查部分正上方的CCD照相机，布置在检查部分和CCD照相机之间的环形光源，以及确定用于处理CCD照相机的图像的装置，并且基于该处理的图像来确定螺丝是否有缺陷或无缺陷。螺钉的操作孔被环形光源照亮，使得没有阴影形成用CCD照相机生动地拍摄操作孔的孔底。也可以检查螺丝头部的顶面。

36. 发明授权

US06952461B2 Sampling frequency conversion apparatus 有权
标题翻译：采样变频装置
公开(公告)号：US06952461B2
公开(公告)日：2005-10-04
申请号：US10007837
申请日：2001-11-08
申请人： Nobuyuki Yasuda , Kazunobu Ohkuri
发明人： Nobuyuki Yasuda , Kazunobu Ohkuri
IPC分类号： G10L19/00 , H03H17/00 , H03H17/06 , H04B14/02 , H04B14/04 , H04H5/00 , H04H20/89 , H04L7/02 , H04L25/05 , H04L7/00
CPC分类号： H03H17/0628 , H03H17/0621 , H04B14/026 , H04H20/89 , H04L25/05
摘要： A sampling frequency conversion apparatus which easily controls the phase difference (time difference) between the input data and the output data in converting the sampling frequency, includes a storage device 13 for continuously writing the input data or the data obtained by over-sampling the input data and for continuously reading out the data written maintaining a predetermined address difference relative to the writable address, and an interpolation processing unit 14 for interpolating the data read-out from the storage device 13 to obtain data of which the sampling frequency is converted. In converting the sampling frequency, an address difference between a writable address and a readable address in the storage device 13 is optimized, the address difference being optimized without limitation for a predetermined period of time from the start of supplying the input data and, then, being optimized by imposing a predetermined limitation after the passage of the predetermined period of time.
摘要翻译：一种在转换采样频率时容易控制输入数据和输出数据之间的相位差（时间差）的采样频率转换装置，包括用于连续写入输入数据的存储装置13或通过对采样频率进行过采样获得的数据数据，并且用于连续地读出相对于可写地址保持预定地址差的写入数据;以及内插处理单元14，用于内插从存储装置13读出的数据，以获得采样频率被转换的数据。在转换采样频率时，优化存储装置13中的可写入地址和可读地址之间的地址差，在从提供输入数据开始的预定时间段内优化地址差，而不限于此，通过在经过预定时间段之后施加预定的限制来优化。

37. 发明授权

US06614042B2 Workpiece inspecting device 失效
公开(公告)号：US06614042B2
公开(公告)日：2003-09-02
申请号：US09976015
申请日：2001-10-15
申请人： Nobuyuki Yasuda , Masatoshi Yasuda
发明人： Nobuyuki Yasuda , Masatoshi Yasuda
IPC分类号： G01N2188
CPC分类号： G01N21/9515
摘要： A workpiece inspecting device suitable for inspection of tiny workpieces is provided which move workpieces such as screws, nails, screws and rivets while hanging them in the air and to carry out overall length inspection and projecting inspection of the workpieces while they are moving. A hanging portion is provided on the outer periphery of the turntable to lower the position of the bottom surface of the turntable at the outer peripheral portion where the workpieces are supported, so that the heads of workpieces supported in a hanged state from the turntable are within an inspection area through windows provided in the hanging portion.

38. 发明授权

US06507588B1 Integrated services digital network terminal adapter 失效
标题翻译：综合业务数字网络终端适配器
公开(公告)号：US06507588B1
公开(公告)日：2003-01-14
申请号：US09277660
申请日：1999-03-26
申请人： Nobuyuki Yasuda
发明人： Nobuyuki Yasuda
IPC分类号： H04M1100
CPC分类号： H04Q11/0471 , H04Q2213/13093 , H04Q2213/13202 , H04Q2213/13209
摘要： An integrated services digital network (ISDN) terminal adapter comprises: a terminal adapter board within a personal computer (PC), the terminal adapter (TA) board including a digital signal processor (DSP) for carrying out modulation-demodulation of a modem and data processing for ISDN and a dial access arrangement (DAA) utilizing DSP as a modem function; and a digital service unit (DSU) outside the PC, employing a plurality of analog port interfaces and a plurality of S/T interfaces, the analog port interface and the S/T interface being connected to the TA board and, in addition, performing interfacing with the U point of an ISDN circuit, where various functions of the DSU analog port interface re controlled by a tone generation function of the TA board through a telephony application interface (TAPI) between a communication application and an operating system (OS).
摘要翻译：综合业务数字网（ISDN）终端适配器包括：个人计算机（PC）内的终端适配器板，终端适配器（TA）板包括用于执行调制解调器和数据的调制解调的数字信号处理器（DSP）处理ISDN和使用DSP作为调制解调器功能的拨号接入装置（DAA）; 以及PC外部的数字服务单元（DSU），采用多个模拟端口接口和多个S / T接口，模拟端口接口和S / T接口连接到TA板，另外，执行与ISDN电路的U点接口，其中DSU模拟端口接口的各种功能由TA板的音调生成功能通过通信应用和操作系统（OS）之间的电话应用接口（TAPI）控制。

39. 发明授权

US5748120A Sampling frequency converting device and memory address control device 失效
公开(公告)号：US5748120A
公开(公告)日：1998-05-05
申请号：US829332
申请日：1997-03-31
申请人： Nobuyuki Yasuda
发明人： Nobuyuki Yasuda
IPC分类号： G11B20/10 , G11B20/14 , H03H17/06 , H03M7/00
CPC分类号： H03H17/0628 , G11B20/10527 , H03H17/0642 , G11B20/1403 , G11B2020/10666
摘要： A sampling frequency converting device. A memory unit stores an input signal D.sub.si having an input sampling frequency Fsi. An interpolation unit interpolates the readout signal from the storage unit. A sampling frequency ratio detection unit detects the current sampling frequency ratio Rn between the input sampling frequency Fsi and the output sampling frequency F.sub.so and detects a new sampling frequency ratio R.sub.n NEW. based on the current sampling frequency ratio R.sub.n and a past detected value R.sub.n-1 preceding the current detected value by one detection period. A control unit having the sampling frequency detection unit controls the storage unit and the interpolating unit from the new sampling frequency ratio R.sub.n NEW. Since the present sampling frequency converting device is not susceptible to accumulation of re-sampling time address errors even if the sampling frequency ratio continues to be changed for a pre-set time duration, the capacity of the storage unit is not increased, while there is no necessity of restricting the speed or amount of change in the sampling frequency ratio.

40. 发明授权

US5677326A Indoline compound and 5-HT.sub.3 receptor antagonist containing the same as active ingredient 失效
标题翻译：二氢吲哚化合物和含有与活性成分相同的5-HT 3受体拮抗剂
公开(公告)号：US5677326A
公开(公告)日：1997-10-14
申请号：US624417
申请日：1996-03-29
申请人： Shinji Tsuchiya , Nobuyuki Yasuda , Atsushi Fukuzaki , Koichi Kazama
发明人： Shinji Tsuchiya , Nobuyuki Yasuda , Atsushi Fukuzaki , Koichi Kazama
IPC分类号： C07D403/06 , A61K31/415
CPC分类号： C07D403/06
摘要： Indoline compounds represented by the general formula: ##STR1## wherein R.sup.1 represents the group ##STR2## R.sup.2 represents a phenyl group which may be substituted or an aromatic heterocyclic group, and R.sup.3 represents hydrogen, a halogen, or a lower alkyl group, hydroxyl group, lower alkoxy group, carbamoyl group or lower alkoxycarbonyl group, and physiologically acceptable salts thereof, and their solvates, as well as 5-HT.sub.3 receptor antagonists containing them as effective components. The indoline compounds of the invention have stronger antagonism against intestinal 5-HT.sub.3 receptors than known 5-HT.sub.3 receptor antagonists and also have excellent sustained action, making them useful as prophylactic or therapeutic agents against vomiting or irritancy induced by chemotherapy or radiation, irritable bowel syndrome, diarrhea, and the like.
摘要翻译： PCT No.PCT / JP94 / 01641 Sec。 371日期：1996年3月29日 102（e）1996年3月29日PCT 1994年9月30日PCT PCT。出版物WO95 / 09168 日期1995年4月6日由通式表示的二氢化合物：其中R 1表示基团R 2表示可被取代的苯基或芳族杂环基，R 3表示氢，卤素或低级烷基，羟基，低级烷氧基，氨基甲酰基或低级烷氧基羰基及其生理学上可接受的盐及其溶剂化物，以及含有它们作为有效成分的5-HT 3受体拮抗剂。本发明的二氢吲哚化合物比已知的5-HT 3受体拮抗剂对肠道5-HT 3受体具有更强的拮抗作用，并且还具有优异的持续作用，使其可用作预防或治疗药物，用于通过化学疗法或辐射引起的呕吐或刺激，肠易激综合征，腹泻等。

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