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    • 35. 发明授权
    • Semiconductor sensing field effect transistor, semiconductor sensing device, semiconductor sensor chip and semiconductor sensing device
    • 半导体感测场效应晶体管,半导体感测器件,半导体传感器芯片和半导体感测器件
    • US07838912B2
    • 2010-11-23
    • US11660514
    • 2005-03-11
    • Daisuke NiwaIchiro KoiwaTetsuya Osaka
    • Daisuke NiwaIchiro KoiwaTetsuya Osaka
    • C12Q1/00
    • G01N27/414
    • A semiconductor sensing field effect transistor uses an organic unimolecular film formed on a gate insulating layer. In the semiconductor sensing field effect transistor and a semiconductor sensing device, the gate insulating layer has a stack structure wherein a second silicon oxide layer is stacked on a first silicon oxide layer through a silicon nitride layer. A semiconductor sensor chip and the semiconductor sensing device are provided with a field effect transistor chip wherein the gate insulating layer, a source electrode and a drain electrode are integrated on a silicon board, a source electrode terminal wiring connected with the source electrode, and a drain electrode terminal wiring connected with the drain electrode. In the semiconductor sensor chip and the semiconductor sensing device, the transistor chip, the source electrode terminal wiring and the drain electrode terminal wiring are sealed so as to expose an edge part which is not connected with the gate insulating layer of the transistor chip and the source electrode of the source electrode terminal wiring, and an edge part which is not connected with the drain electrode of the drain electrode terminal wiring.
    • 半导体感测场效应晶体管使用形成在栅极绝缘层上的有机单分子膜。 在半导体感测场效应晶体管和半导体感测装置中,栅极绝缘层具有堆叠结构,其中第二氧化硅层通过氮化硅层堆叠在第一氧化硅层上。 半导体传感器芯片和半导体感测装置设置有场效应晶体管芯片,其中栅极绝缘层,源电极和漏电极集成在硅板上,源极端子布线与源极连接,以及 漏极端子布线与漏电极连接。 在半导体传感器芯片和半导体感测装置中,晶体管芯片,源极端子布线和漏极端子布线被密封,以暴露未与晶体管芯片的栅极绝缘层连接的边缘部分和 源电极端子配线的源电极以及未与漏电极端子配线的漏电极连接的边缘部。
    • 36. 发明申请
    • Laminated structure, very-large-scale integrated circuit wiring board, and method of formation thereof
    • 层压结构,超大规模集成电路布线板及其形成方法
    • US20080079154A1
    • 2008-04-03
    • US11529535
    • 2006-09-29
    • Tetsuya OsakaMasahiro Yoshino
    • Tetsuya OsakaMasahiro Yoshino
    • H01L23/52
    • H01L23/53238C23C18/1651C23C18/1893H01L21/288H01L21/76814H01L21/76826H01L21/76831H01L21/76843H01L21/76846H01L21/76864H01L21/76874H01L23/53295H01L2924/0002H01L2924/00
    • The laminated structure includes a substrate of low dielectric constant material of silicon compound and an electroless copper plating layer laminated thereon with a barrier layer. The barrier layer is interposed between the substrate and the copper layer, and the barrier layer is formed by electroless plating. And the laminated structure is characterized in that the barrier layer is formed on the substrate with a monomolecular layer of organosilane compound and a palladium catalyst which are interposed between the substrate and the barrier layer, the palladium catalyst modifies the terminal, adjacent to the barrier layer, of the monomolecular layer, and the barrier layer includes an electroless NiB plating layer which is disposed on the substrate side, and a electroless CoWP plating layer.The present invention makes it possible to coat the low dielectric constant material of silicon compound in a simple all-wet process with a firmly adhering barrier layer and an electroless copper plating layer as the wiring layer. the advantage of requiring. Thus, the laminated structure formed in this way includes a substrate of low dielectric constant material of silicon compound, a barrier layer, and a copper layer as the wiring layer formed by electroless plating, which firmly adhere to one another. In addition, the laminated structure is suitable for the copper wiring in a ULSI, particularly the one which is to be formed in a narrower trench than conventional one.
    • 层叠结构包括硅化合物的低介电常数材料的基板和层压有阻挡层的化学镀铜层。 阻挡层插入在基板和铜层之间,通过无电镀形成阻挡层。 层叠结构的特征在于,在基板上形成有分隔层的有机硅烷化合物和钯催化剂插入在基板和阻挡层之间的阻挡层,钯催化剂改变与阻挡层相邻的端子 的阻挡层,并且阻挡层包括设置在基板侧的无电解NiB镀层和无电CoWP镀层。 本发明使得可以以简单的全湿法将具有牢固粘合的阻挡层和化学镀铜层的硅化合物的低介电常数材料涂布作为布线层。 要求的优点。 因此,以这种方式形成的层叠结构包括硅化合物的低介电常数材料的衬底,阻挡层和作为通过无电镀形成的布线层的铜层,其彼此牢固地粘合。 此外,该层压结构适用于ULSI中的铜布线,特别是在比常规的窄沟槽形成的布线中。