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    • 31. 发明申请
    • Exhaust Gas Purifier
    • 废气净化器
    • US20070243120A1
    • 2007-10-18
    • US11574109
    • 2005-08-22
    • Shinya Sato
    • Shinya Sato
    • B01D53/56
    • F01N3/2066B01D53/9431B01D2251/2067F01N13/0097F01N2510/063F01N2610/02Y02T10/24
    • Active temperature areas of selective reduction catalysts are expanded more than ever before so as to obtain high NOx reduction ratio in a larger exhaust temperature range. Disclosed is an exhaust emission control device with selective reduction catalyst incorporated in an exhaust pipe 9, the catalyst having enhanced reaction selectivity so as to selectively react NOx with ammonia even in the presence of oxygen, urea water 16 being added as reducing agent upstream of the catalyst by urea water adding means (urea water tank 13, urea water supply pipe 14, supply pump 15 and injection nozzle 17) so as to reduce and purify NOx. The catalyst comprises two or high- and low-temperature-active catalysts 11 and 12 with different active temperature areas. The catalysts are arranged in series in such a manner that the catalysts 11 and 12 with relatively high and low active temperature areas are positioned upstream and downstream, respectively.
    • 选择还原催化剂的主动温度范围比以往任何时候都更大,以便在更大的排气温度范围内获得高的NO x SO 2还原率。 公开了一种排气排放控制装置,其具有结合在排气管9中的选择性还原催化剂,该催化剂具有增强的反应选择性,以便即使在氧的存在下选择性地反应NO x, 通过尿素水添加装置(尿素水箱13,尿素水供给管14,供给泵15和喷嘴17)作为催化剂上游的还原剂添加,以减少和净化NO x。 催化剂包含具有不同活性温度区域的两种或高温和低温活性催化剂11和12。 催化剂以这样的方式排列,使得具有相对较高和低的活性温度区域的催化剂11和12分别位于上游和下游。
    • 33. 发明授权
    • Semiconductor type pressure sensor
    • 半导体式压力传感器
    • US6122974A
    • 2000-09-26
    • US139273
    • 1998-08-25
    • Shinya SatoSeikou SuzukiShinichi YamaguchiYoshiyuki SasadaMasayuki MikiMasanori KubotaAtsushi Miyazaki
    • Shinya SatoSeikou SuzukiShinichi YamaguchiYoshiyuki SasadaMasayuki MikiMasanori KubotaAtsushi Miyazaki
    • G01L9/04G01L9/00G01L7/08
    • G01L19/147
    • A pressure sensor superior in pressure resistance and capable of covering from a low to high pressure range as a measuring range is to be provided. Plural pressure sensing sections for high and low pressures are formed on a silicon board, the pressure sensing sections each com ing an outer frame portion, a diaphragm portion, a strain gauge portion and an electrode portion. The silicon board side with the strain gauge portions formed thereon and an insulating substrate having electrode take-out portions are bonded together in such a manner that the strain gauge portions are hermetically sealed and that the electrode portions on the silicon board and the electrode take-out portions of the insulating substrate are electrically connected with each other, to constitute a pressure sensing unit. The pressure sensing unit, a low-melting glass and a stem are laminated together in such a manner that lead pins are electrically bonded by solder to the electrode portions of the silicon board through the electrode take-out portions of the insulating substrate. In this state, the low-melting glass is melted to bond the pressure sensing unit and the stem with each other.
    • 要提供耐压性能优异且能够从低压到高压范围覆盖的压力传感器作为测量范围。 用于高压和低压的多个压力感测部分形成在硅板上,每个压力感测部分均设有外框部分,隔膜部分,应变计部分和电极部分。 在其上形成有应变计部分的硅板侧和具有电极取出部分的绝缘基板以使应变计部分气密密封的方式接合在一起,并且硅板和电极上的电极部分 绝缘基板的外侧部分彼此电连接,以构成压力感测单元。 将压力感测单元,低熔点玻璃和阀杆以这样的方式层压在一起,使得引脚通过焊料通过绝缘基板的电极取出部分与硅板的电极部分电连接。 在这种状态下,低熔点玻璃被熔化,以将压力感测单元和杆彼此粘合。
    • 34. 发明授权
    • Semiconductor memory testing apparatus
    • 半导体存储器测试仪器
    • US06115833A
    • 2000-09-05
    • US40724
    • 1998-03-18
    • Shinya SatoKenichi Fujisaki
    • Shinya SatoKenichi Fujisaki
    • G01R31/28G01R31/3193G06F11/22G11C29/26G11C29/44G11C29/56G11C29/00G11C7/00
    • G11C29/26G11C29/44G11C29/56G01R31/31935
    • A semiconductor memory testing apparatus is provided which is capable of storing failure data of many semiconductor memories under test by a small memory capacity. A group of n input terminals IN.sub.1 -IN.sub.n are provided for each of m failure analysis memory units 13.sub.1 -13.sub.m, n being equal to the number of ways n of an interleave operation, and in the low rate test mode, low rate failure data LFAL.sub.1 -LFAL.sub.n are inputted to all the corresponding input terminals IN.sub.1 -IN.sub.n, respectively. Moreover, a plurality of failure format parts FLFO.sub.1 -FLFO.sub.n are provided for the memory control part MCON of each of the m failure analysis memory units, n being equal to the number of ways n of an interleave operation, and low rate failure data LFAL.sub.1 -LFAL.sub.n are stored in n banks BNC#1-BNC#n provided for each memory block MBLK through these n failure format parts FLFO.sub.1 -FLFO.sub.n, respectively.
    • 提供一种半导体存储器测试装置,其能够以小的存储容量存储被测试的许多半导体存储器的故障数据。 为m个故障分析存储单元131-13m,n中的每一个提供一组n个输入端子IN1-INn,其等于交错操作的路数n,而在低速率测试模式中,低速率故障数据LFAL1 -LFALn分别输入到所有对应的输入端子IN1-INn。 此外,为每个m个故障分析存储单元的存储器控​​制部分MCON提供多个故障格式部分FLFO1-FLFOn,n等于交织操作的路数n,低速率故障数据LFAL1- LFALn分别通过这些n个故障格式部分FLFO1-FLFOn存储在为每个存储器块MBLK提供的n个存储体BNC#1-BNC#n中。
    • 35. 发明授权
    • Tape cassette
    • 磁带盒
    • US5894390A
    • 1999-04-13
    • US815493
    • 1997-03-11
    • Shinya Sato
    • Shinya Sato
    • G11B23/04G11B23/087
    • G11B23/08721G11B23/08735G11B23/08785
    • A tape cassette has a pair of cassette shell members, a pair of reel hubs, and a hub brake member. The cassette shell members are coupled to each other with a tape-like recording medium housed therein. The cassette shell members have an opening defined therein with the tape-like recording medium exposed outwardly through the opening. The cassette shell members are made of a material composed of a synthetic resin and a silicon polymer mixed therewith. The hubs are rotatably disposed in the cassette shell members coupled to each other, and the tape-like recording medium are wound on the reel hubs. The hub brake member is disposed in slidable contact with an inner surface of one of the cassette shell members. The hub brake member is movable between a position in which the hub brake member engages the reel hubs to lock the reel hubs against rotation and a position in which the hub brake member disengages from the reel hubs to release the reel hubs for rotation.
    • 盒式磁带具有一对盒式外壳构件,一对带盘毂和轮毂制动构件。 盒式壳体通过容纳在其中的带状记录介质彼此耦合。 盒壳构件具有限定在其中的开口,带状记录介质通过开口向外暴露。 盒式外壳构件由合成树脂和与其混合的硅聚合物组成的材料制成。 轮毂可旋转地设置在彼此联接的盒壳构件中,并且带状记录介质缠绕在卷轴毂上。 轮毂制动构件设置成与盒壳构件之一的内表面滑动接触。 轮毂制动构件可在轮毂制动构件接合卷轴毂的位置之间移动,以锁定卷轴毂以防止旋转,并且轮毂制动构件与卷盘毂脱离的位置以释放卷轴轮毂以进行旋转。
    • 39. 发明申请
    • SILICON CARBIDE SINGLE CRYSTAL WAFER AND MANUFACTURING METHOD FOR SAME
    • 硅碳化硅单晶及其制造方法
    • US20140363607A1
    • 2014-12-11
    • US14241623
    • 2012-08-29
    • Shinya SatoTatsuo FujimotoHiroshi TsugeMasakazu Katsuno
    • Shinya SatoTatsuo FujimotoHiroshi TsugeMasakazu Katsuno
    • C30B23/02C30B29/36H01L29/16
    • C30B23/02C30B23/00C30B29/36H01L29/1608Y10T428/21
    • Provided are a method for manufacturing a SiC single crystal having high crystal quality and, in particular, extremely low screw dislocation density and a SiC single crystal ingot obtained by the method. In particular, provided is a silicon carbide single crystal substrate that is a substrate cut from a bulk silicon carbide single crystal grown by the Physical Vapior Transport (PVT) method, in which the screw dislocation density is smaller in the peripheral region than in the center region, so that screw dislocations are partially reduced.The method is a method for manufacturing a SiC single crystal by the PVT method using a seed crystal and the ingot is a SiC single crystal ingot obtained by the method. Particularly, the silicon carbide single crystal substrate is a silicon carbide single crystal substrate in which when, by representing the diameter of the substrate as R, a center circle region having a diameter of 0.5×R centered around a center point O of the substrate and a doughnut-shaped peripheral region remaining by excluding the center circle region are defined, the average value of screw dislocation densities observed in the doughnut-shaped peripheral region is 80% or less of the average value of screw dislocation densities observed in the center circle region.
    • 提供一种制造具有高结晶质量,特别是极低螺旋位错密度的SiC单晶的方法和通过该方法获得的SiC单晶锭。 特别地,提供了碳化硅单晶基板,其是从通过物理运输(PVT)方法生长的块状碳化硅单晶切割的基板,其中在周边区域中的螺旋位错密度小于中心 区域,使得螺旋位错部分减少。 该方法是通过使用晶种的PVT方法制造SiC单晶的方法,并且该锭是通过该方法获得的SiC单晶锭。 特别地,碳化硅单晶衬底是碳化硅单晶衬底,其中当通过将衬底的直径表示为R时,以衬底的中心点O为中心的直径为0.5×R的中心圆区域, 定义了通过排除中心圆区域而剩余的环状周边区域,在圆环状周边区域观察到的螺旋位错密度的平均值为在中心圆区域观察到的螺旋位错密度的平均值的80%以下 。