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31. 发明申请

US20080082841A1 Transitioning a computing platform to a low power system state 有权
标题翻译：将计算平台转换为低功率系统状态
公开(公告)号：US20080082841A1
公开(公告)日：2008-04-03
申请号：US11541222
申请日：2006-09-29
申请人： Dale Juenemann , Paul Diefenbaugh
发明人： Dale Juenemann , Paul Diefenbaugh
IPC分类号： G06F1/00
CPC分类号： G06F1/3203
摘要： A method which includes initiating a power management policy based on a processing element for a computing platform entering a given power state. The power management policy includes a determination as to whether an input/output (I/O) controller and a memory controller for the computing platform are substantially quiescent. The computing platform may then be transitioned to a low power system state from a run power system state based on a determination that both the I/O controller and the memory controller are substantially quiescent and an indication that the computing platform is capable of entering the low power system state. According to this method, the low power system state includes entering one or more devices responsive to the computing platform in a power level adequate to retain a configuration state that enables the one or more devices to transition back to the run power system state in a manner that is substantially transparent to an operating system for the computing platform. Other implementations and examples are also described in this disclosure.
摘要翻译：一种方法，其包括基于进入给定功率状态的计算平台的处理元件发起功率管理策略。电源管理策略包括关于计算平台的输入/输出（I / O）控制器和存储器控制器是否基本上是静止的确定。然后，基于确定I / O控制器和存储器控制器基本上是静止的计算平台可以从运行电力系统状态转换到低功率系统状态，以及计算平台能够进入低电平的指示电力系统状态。根据该方法，低功率系统状态包括以足够的功率水平进入响应于计算平台的一个或多个设备，以使得能够以一种或多种设备以一种或多种方式转换回运行电力系统状态的配置状态这对于计算平台的操作系统是基本上透明的。在本公开中还描述了其他实现和示例。

32. 发明申请

US20190129526A1 POWER-EFFICIENT TOUCH INPUT PROCESSING 审中-公开
公开(公告)号：US20190129526A1
公开(公告)日：2019-05-02
申请号：US16232283
申请日：2018-12-26
申请人： Anton Cheng , Yifan Li , Paul Diefenbaugh , Vishal Sinha , Kathy Bui
发明人： Anton Cheng , Yifan Li , Paul Diefenbaugh , Vishal Sinha , Kathy Bui
IPC分类号： G06F3/041
CPC分类号： G06F3/041 , G06F1/3262 , G06F3/0416 , G06F3/04883
摘要： A method for power-efficient touch input, in which touch sensor data from a touch input is obtained by touch circuitry. Touch sensor data is obtained from touch input at touch circuitry included in a device that also includes a system-on-a-chip (SOC) and a display controller stack outside of the SOC. The touch sensor data is stored in a buffer. When the SOC is in a low-power state, the touch sensor data is communicated to the display controller stack for immediate display.

33. 发明申请

US20140006824A1 USING DEVICE IDLE DURATION INFORMATION TO OPTIMIZE ENERGY EFFICIENCY 有权
标题翻译：使用设备空闲时间信息来优化能源效率
公开(公告)号：US20140006824A1
公开(公告)日：2014-01-02
申请号：US13537260
申请日：2012-06-29
申请人： Christian Maciocco , Ohad Falik , Ren Wang , Nadav Shulman , Paul Diefenbaugh , Tsung-Yuan Charles Tai
发明人： Christian Maciocco , Ohad Falik , Ren Wang , Nadav Shulman , Paul Diefenbaugh , Tsung-Yuan Charles Tai
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/3228
摘要： Systems and methods may provide for aggregating a first idle duration from a first device associated with a platform and a second idle duration from a second device associated with the platform. Additionally, an idle state may be selected for the platform based at least in part on the first idle duration and the second idle duration. In one example, the idle durations are classified as deterministic, estimated or statistical.
摘要翻译：系统和方法可以提供从与平台相关联的第一设备和与平台相关联的第二设备的第二空闲持续时间聚集第一空闲持续时间。另外，可以至少部分地基于第一空闲持续时间和第二空闲持续时间来为平台选择空闲状态。在一个示例中，空闲持续时间被分类为确定性，估计或统计。

34. 发明授权

US07849334B2 Transitioning a computing platform to a low power system state 有权
标题翻译：将计算平台转换为低功率系统状态
公开(公告)号：US07849334B2
公开(公告)日：2010-12-07
申请号：US11541222
申请日：2006-09-29
申请人： Dale Juenemann , Paul Diefenbaugh
发明人： Dale Juenemann , Paul Diefenbaugh
IPC分类号： G06F1/26 , G06F1/32
CPC分类号： G06F1/3203
摘要： A method which includes initiating a power management policy based on a processing element for a computing platform entering a given power state. The power management policy includes a determination as to whether an input/output (I/O) controller and a memory controller for the computing platform are substantially quiescent. The computing platform may then be transitioned to a low power system state from a run power system state based on a determination that both the I/O controller and the memory controller are substantially quiescent and an indication that the computing platform is capable of entering the low power system state. According to this method, the low power system state includes entering one or more devices responsive to the computing platform in a power level adequate to retain a configuration state that enables the one or more devices to transition back to the run power system state in a manner that is substantially transparent to an operating system for the computing platform. Other implementations and examples are also described in this disclosure.
摘要翻译：一种方法，其包括基于进入给定功率状态的计算平台的处理元件发起功率管理策略。电源管理策略包括关于计算平台的输入/输出（I / O）控制器和存储器控制器是否基本上是静止的确定。然后，基于确定I / O控制器和存储器控制器基本上是静止的计算平台可以从运行电力系统状态转换到低功率系统状态，以及计算平台能够进入低电平的指示电力系统状态。根据该方法，低功率系统状态包括以足够的功率水平进入响应于计算平台的一个或多个设备，以使得能够以一种或多种设备以一种或多种方式转换回运行电力系统状态的配置状态这对于计算平台的操作系统是基本上透明的。在本公开中还描述了其他实现和示例。

35. 发明授权

US07631199B2 Various methods and apparatuses for power states in a controller 失效
标题翻译：用于控制器中功率状态的各种方法和装置
公开(公告)号：US07631199B2
公开(公告)日：2009-12-08
申请号：US11173784
申请日：2005-06-30
申请人： James P. Kardach , Barnes Cooper , Seh Kwa , Animesh Mishra , Paul Diefenbaugh
发明人： James P. Kardach , Barnes Cooper , Seh Kwa , Animesh Mishra , Paul Diefenbaugh
IPC分类号： G06F1/00 , G06F1/32
CPC分类号： G06F1/3203 , G06F1/325
摘要： Various methods, apparatuses, and systems are described in which a chipset controller has circuitry to control communications with a peripheral device in a computing device. The chipset controller has logic configured 1) to detect a plug-in event when the peripheral device connects to the chipset controller and 2) to transition the chipset controller from a low power consumption state to a higher power consumption state based on the logic detecting the plug-in event.
摘要翻译：描述了各种方法，装置和系统，其中芯片组控制器具有控制与计算设备中的外围设备的通信的电路。芯片组控制器具有逻辑配置1）当外围设备连接到芯片组控制器时检测插件事件，以及2）基于逻辑检测来将芯片组控制器从低功耗状态转换到更高功耗状态插件事件。

36. 发明授权

US07490255B2 Power efficient flow control model for USB asynchronous transfers 有权
标题翻译： USB异步传输的高效流量控制模型
公开(公告)号：US07490255B2
公开(公告)日：2009-02-10
申请号：US11428266
申请日：2006-06-30
申请人： Paul Diefenbaugh , John Howard
发明人： Paul Diefenbaugh , John Howard
IPC分类号： G06F1/32 , G06F13/00
CPC分类号： G06F13/385 , G06F2213/0042 , Y02D10/14 , Y02D10/151
摘要： Embodiments comprising a memory and a USB host controller coupled to the memory. The power efficiency of a USB during asynchronous transfers is increased by limiting usage of an asynchronous schedule stored in the memory when servicing a scheduled asynchronous transfer endpoint. Other embodiments may be described and claimed.
摘要翻译：包括存储器和耦合到存储器的USB主机控制器的实施例。在维护调度的异步传输端点时，通过限制存储在存储器中的异步调度的使用来增加异步传输期间USB的功率效率。可以描述和要求保护其他实施例。

37. 发明授权

US07430673B2 Power management system for computing platform 有权
标题翻译：计算平台电源管理系统
公开(公告)号：US07430673B2
公开(公告)日：2008-09-30
申请号：US11173220
申请日：2005-06-30
申请人： James P. Kardach , Barnes Cooper , Paul Diefenbaugh , Seh Kwa , Animesh Mishra
发明人： James P. Kardach , Barnes Cooper , Paul Diefenbaugh , Seh Kwa , Animesh Mishra
IPC分类号： G06F1/00 , G06F1/26 , G06F1/32
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/325 , Y02D10/126 , Y02D50/20
摘要： A power management system for a computing platform is described. In one embodiment, the power management system provides additional device states which the device controllers of the platform assume when the device controllers are operational but idle. These additional device states are states in which the device controller commits to certain types of inactivity. In another embodiment, the power management system provides additional platform modes which guarantee processor inactivity and/or deference of particular platform events while the mode is in effect.
摘要翻译：描述了一种用于计算平台的电源管理系统。在一个实施例中，电源管理系统提供当设备控制器可操作但空闲时，平台的设备控制器假设的附加设备状态。这些附加设备状态是设备控制器执行某些类型的不活动状态。在另一个实施例中，电源管理系统提供额外的平台模式，其在模式有效时保证处理器不活动和/或尊重特定平台事件。

38. 发明申请

US20070079154A1 Method for optimizing platform power delivery 有权
标题翻译：优化平台供电的方法
公开(公告)号：US20070079154A1
公开(公告)日：2007-04-05
申请号：US11244495
申请日：2005-09-30
申请人： Paul Diefenbaugh , Lilly Huang , Bruce Rose , David Browning
发明人： Paul Diefenbaugh , Lilly Huang , Bruce Rose , David Browning
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3246 , G06F1/329 , G06F1/3296 , Y02D10/126 , Y02D10/172 , Y02D10/24
摘要： Embodiments of the current invention describe an approach for configuring a platform resource table. The platform resource table is configured using information from both the platform management system and the platform resource provider system. The platform resource table is then communicated to the platform resource provider system via a platform interface to select and invoke platform state transitions to improve power efficiency.
摘要翻译：本发明的实施例描述了用于配置平台资源表的方法。使用来自平台管理系统和平台资源提供者系统的信息来配置平台资源表。然后，平台资源表通过平台接口传递给平台资源提供者系统，以选择和调用平台状态转换以提高功率效率。

39. 发明申请

US20070006000A1 Using fine-grained power management of physical system memory to improve system sleep 审中-公开
标题翻译：使用物理系统内存的细粒度电源管理来改善系统睡眠
公开(公告)号：US20070006000A1
公开(公告)日：2007-01-04
申请号：US11174375
申请日：2005-06-30
申请人： Sandeep Jain , Paul Diefenbaugh , James Kardach , Ramkumar Vankatachary
发明人： Sandeep Jain , Paul Diefenbaugh , James Kardach , Ramkumar Vankatachary
IPC分类号： G06F1/00
CPC分类号： G06F1/3275 , G06F1/3228 , Y02D10/14
摘要： The methods for fine-grained power management of physical system memory allow portions of the system volatile memory to be independently power managed. The system volatile memory may be partitioned into a plurality of power management units (PMUs). Each PMU may have a pre-determined size or a variable size, which may be less than the size of a memory chip. Each PMU may be placed in a different memory state and independently power managed according to the memory state. At opportune times during the system active state, a fractional potion of the system volatile memory is shadowed into the system nonvolatile memory. Active data in the system volatile memory is rearranged prior to entering a power-saving mode and the PMUs containing the shadowed data may be powered off. Thus, power efficiency of the system volatile memory is improved.
摘要翻译：用于物理系统存储器的细粒度电源管理的方法允许系统易失性存储器的一部分被独立地进行功率管理。系统易失性存储器可以被划分成多个电源管理单元（PMU）。每个PMU可以具有预定尺寸或可变尺寸，其可以小于存储器芯片的尺寸。每个PMU可以被放置在不同的存储器状态，并且根据存储器状态独立地进行功率管理。在系统活动状态期间的适时时刻，系统易失性存储器的分数部分被遮蔽到系统非易失性存储器中。在进入省电模式之前，系统易失性存储器中的有效数据被重新排列，并且包含阴影数据的PMU可能被关闭。因此，提高了系统易失性存储器的功率效率。

40. 发明申请

US20060294400A1 Enhancing power delivery with transient running average power limits 有权
公开(公告)号：US20060294400A1
公开(公告)日：2006-12-28
申请号：US11165603
申请日：2005-06-23
申请人： Paul Diefenbaugh , Lilly Huang
发明人： Paul Diefenbaugh , Lilly Huang
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/206 , Y02D10/16
摘要： Systems and methods of power management provide for using transient running average power limits to enhance device power consumption and platform power delivery. A transient running average power limit can be transmitted to a device based on system device load demand and/or a characteristic of a power delivery system associated with the device. The characteristic can convey information such as the power mode, the load current demand and corresponding efficiency of the power delivery system. In one embodiment, the transient running average power limit includes a transient power level and an adjustable time window, where the adjustable time window defines the amount of time for maintaining the transient power consumption of the device at or below the transient power level.

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