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31. 发明申请

US20070184654A1 Methods for fabricating and filling conductive vias and conductive vias so formed 有权
标题翻译：制造和填充如此形成的导电通孔和导电通孔的方法
公开(公告)号：US20070184654A1
公开(公告)日：2007-08-09
申请号：US11347153
申请日：2006-02-03
申请人： Salman Akram , William Hiatt , Steve Oliver , Alan Wood , Sidney Rigg , James Wark , Kyle Kirby
发明人： Salman Akram , William Hiatt , Steve Oliver , Alan Wood , Sidney Rigg , James Wark , Kyle Kirby
IPC分类号： H01L21/44
CPC分类号： H01L21/76898 , H01L23/481 , H01L2224/05001 , H01L2224/05009 , H01L2224/05568 , H01L2224/13009 , H01L2224/13025 , H01L2224/16 , H01L2224/16145 , H01L2224/17181 , H01L2924/09701
摘要： Methods for forming conductive vias include forming one or more via holes in a substrate. The via holes may be formed with a single mask, with the protective layers, bond pads, or other features of the substrate acting as hard masks in the event that a photomask is removed during etching processes. The via holes may be configured to facilitate adhesion of a dielectric coating that includes a low-K dielectric material to the surfaces thereof. A barrier layer may be formed over surfaces of each via hole. A base layer, which may comprise a seed material, may be formed to facilitate the subsequent, selective deposition of conductive material over the surfaces of the via hole. The resulting semiconductor devices, intermediate structures, and assemblies and electronic devices that include the semiconductor devices that result from these methods are also disclosed.
摘要翻译：用于形成导电通孔的方法包括在衬底中形成一个或多个通孔。通孔可以用单个掩模形成，在蚀刻过程中去除光掩模的情况下，衬底的保护层，接合焊盘或其他特征用作硬掩模。通孔可以被配置为便于将包括低K电介质材料的电介质涂层粘附到其表面上。可以在每个通孔的表面上形成阻挡层。可以形成可以包括种子材料的基层，以便于导电材料随后的选择性沉积在通孔的表面上。还公开了包括由这些方法产生的半导体器件的所得半导体器件，中间结构和组件以及电子器件。

32. 发明申请

US20060234422A1 Spacers for packaged microelectronic imagers and methods of making and using spacers for wafer-level packaging of imagers 有权
标题翻译：用于封装的微电子成像器的间隔器以及制造和使用间隔件用于成像器的晶片级封装的方法
公开(公告)号：US20060234422A1
公开(公告)日：2006-10-19
申请号：US11451398
申请日：2006-06-13
申请人： Warren Farnworth , Alan Wood , James Wark , David Hembree , Rickie Lake
发明人： Warren Farnworth , Alan Wood , James Wark , David Hembree , Rickie Lake
IPC分类号： H01L21/00
CPC分类号： H01L31/0203 , H01L27/14618 , H01L27/14625 , H01L27/14634 , H01L27/14683 , H01L2224/48227 , H01L2224/48091 , H01L2924/00014
摘要： Methods of packaging microelectronic imagers and packaged microelectronic imagers. An embodiment of such a method can include providing an imager workpiece having a plurality of imager dies arranged in a die pattern and providing a cover substrate through which a desired radiation can propagate. The imager dies include image sensors and integrated circuitry coupled to the image sensors. The method further includes providing a spacer having a web that includes an adhesive and has openings arranged to be aligned with the image sensors. For example, the web can be a film having an adhesive coating, or the web itself can be a layer of adhesive. The method continues by assembling the imager workpiece with the cover substrate such that (a) the spacer is between the imager workpiece and the cover substrate, and (b) the openings are aligned with the image sensors. The attached web is not cured after the imager workpiece and the cover substrate have both been adhered to the web. As such, the web does not outgas contaminants into the compartments in which the image sensors are housed.
摘要翻译：包装微电子成像仪和封装的微电子成像仪的方法。这种方法的实施例可以包括提供具有以模片图案布置的多个成像模具的成像工件，并提供覆盖基板，期望的辐射可以通过该基板传播。成像器裸片包括耦合到图像传感器的图像传感器和集成电路。该方法还包括提供具有包括粘合剂并具有布置成与图像传感器对准的开口的腹板的间隔件。例如，网可以是具有粘合剂涂层的膜，或者网本身可以是一层粘合剂。该方法通过将成像器工件与盖基板组装成使得（a）间隔件位于成像器工件和盖基板之间，并且（b）开口与图像传感器对准，该方法继续。在成像器工件和盖基板都已经粘附在卷材上之后，连接的卷材不固化。因此，纸幅不会将污染物排出到其中容纳图像传感器的隔室中。

33. 发明申请

US20060040421A1 Spacers for packaged microelectronic imagers and methods of making and using spacers for wafer-level packaging of imagers 有权
公开(公告)号：US20060040421A1
公开(公告)日：2006-02-23
申请号：US10922192
申请日：2004-08-19
申请人： Warren Farnworth , Alan Wood , James Wark , David Hembree , Rickie Lake
发明人： Warren Farnworth , Alan Wood , James Wark , David Hembree , Rickie Lake
IPC分类号： H01L21/50
CPC分类号： H01L31/0203 , H01L27/14618 , H01L27/14625 , H01L27/14634 , H01L27/14683 , H01L2224/48227 , H01L2224/48091 , H01L2924/00014
摘要： Methods of packaging microelectronic imagers and packaged microelectronic imagers. An embodiment of such a method can include providing an imager workpiece having a plurality of imager dies arranged in a die pattern and providing a cover substrate through which a desired radiation can propagate. The imager dies include image sensors and integrated circuitry coupled to the image sensors. The method further includes providing a spacer having a web that includes an adhesive and has openings arranged to be aligned with the image sensors. For example, the web can be a film having an adhesive coating, or the web itself can be a layer of adhesive. The method continues by assembling the imager workpiece with the cover substrate such that (a) the spacer is between the imager workpiece and the cover substrate, and (b) the openings are aligned with the image sensors. The attached web is not cured after the imager workpiece and the cover substrate have both been adhered to the web. As such, the web does not outgas contaminants into the compartments in which the image sensors are housed.

34. 发明申请

US20060035415A1 Frame structure and semiconductor attach process for use therewith for fabrication of image sensor packages and the like, and resulting packages 有权
标题翻译：用于制造图像传感器封装等的框架结构和半导体附着工艺以及所产生的封装
公开(公告)号：US20060035415A1
公开(公告)日：2006-02-16
申请号：US10919604
申请日：2004-08-16
申请人： Alan Wood , Kyle Kirby , Warren Farnworth , Salman Akram
发明人： Alan Wood , Kyle Kirby , Warren Farnworth , Salman Akram
IPC分类号： H01L21/50
CPC分类号： H01L27/14618 , B33Y80/00 , H01L27/14625 , H01L2224/48091 , H01L2924/00014
摘要： A semiconductor package such as an image sensor package, and methods for fabrication. A frame structure includes an array of frames, each having an aperture therethrough, into which an image sensor die in combination with a cover glass, filter, lens or other components may be installed in precise mutual alignment. Singulated image sensor dice and other components may be picked and placed into each frame of the frame structure. Alternatively, the frame structure may be configured to be aligned with and joined to a wafer bearing a plurality of image sensor dice, wherein optional, downwardly protruding skirts along peripheries of the frames may be received into kerfs cut along streets between die locations on the wafer, followed by installation of other package components. In either instance, the frame structure in combination with singulated image sensor dice or a joined wafer is singulated into individual image sensor packages. Various external connection approaches may be used for the packages.
摘要翻译：诸如图像传感器封装的半导体封装以及制造方法。框架结构包括每个具有穿过其中的孔的框架阵列，图像传感器与盖玻片，过滤器，透镜或其它部件组合的模具可以精确相互对准地安装在该框架中。单片图像传感器骰子和其他组件可以被拾取并放置在框架结构的每个帧中。或者，框架结构可以被配置为与承载多个图像传感器骰子的晶片对准并且连接到其上，其中沿着框架的周边的任选的向下突出的裙边可以被接收到沿着晶片上的模具位置之间沿着街道切割的切口，然后安装其他包装组件。在任一情况下，将帧结构与单独的图像传感器芯片或连接的晶片组合成单独的图像传感器封装。各种外部连接方法可用于包装。

35. 发明申请

US20060192230A1 Image sensor packages and frame structure thereof 有权
标题翻译：图像传感器封装及其框架结构
公开(公告)号：US20060192230A1
公开(公告)日：2006-08-31
申请号：US11411265
申请日：2006-04-26
申请人： Alan Wood , Kyle Kirby , Warren Farnworth , Salman Akram
发明人： Alan Wood , Kyle Kirby , Warren Farnworth , Salman Akram
IPC分类号： H01L27/148 , H01L31/0203
CPC分类号： H01L27/14618 , B33Y80/00 , H01L27/14625 , H01L2224/48091 , H01L2924/00014
摘要： A semiconductor package such as an image sensor package. A frame structure includes an array of frames, each having an aperture therethrough, into which an image sensor die in combination with a cover glass, filter, lens or other components may be installed in precise mutual alignment. Singulated image sensor dice and other components may be picked and placed into each frame of the frame structure. Alternatively, the frame structure may be configured to be aligned with and joined to a wafer bearing a plurality of image sensor dice, wherein optional, downwardly protruding skirts along peripheries of the frames may be received into kerfs cut along streets between die locations on the wafer, followed by installation of other package components. In either instance, the frame structure in combination with singulated image sensor dice or a joined wafer is singulated into individual image sensor packages. Various external connection approaches may be used.
摘要翻译：诸如图像传感器封装的半导体封装。框架结构包括每个具有穿过其中的孔的框架阵列，图像传感器与盖玻片，过滤器，透镜或其它部件组合的模具可以精确相互对准地安装在该框架中。单片图像传感器骰子和其他组件可以被拾取并放置在框架结构的每个帧中。或者，框架结构可以被配置为与承载多个图像传感器骰子的晶片对准并且连接到其上，其中沿着框架的周边的任选的向下突出的裙边可以被接收到沿着晶片上的模具位置之间沿着街道切割的切口，然后安装其他包装组件。在任一情况下，将帧结构与单独的图像传感器芯片或连接的晶片组合成单独的图像传感器封装。可以使用各种外部连接方法。

36. 发明申请

US20070262464A1 METHOD OF FORMING VIAS IN SEMICONDUCTOR SUBSTRATES AND RESULTING STRUCTURES 有权
标题翻译：在半导体衬底和结构结构中形成VIAS的方法
公开(公告)号：US20070262464A1
公开(公告)日：2007-11-15
申请号：US11781083
申请日：2007-07-20
申请人： Charles Watkins , Kyle Kirby , Alan Wood , Salman Akram , Warren Farnworth
发明人： Charles Watkins , Kyle Kirby , Alan Wood , Salman Akram , Warren Farnworth
IPC分类号： H01L21/302 , H01L23/48 , H01L21/461 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76898
摘要： Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from the active surface through a conductive element thereon and a portion of the substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from the back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by laser ablation or drilling from the back surface of the substrate followed by dry etching to complete the through via.
摘要翻译：公开了在半导体衬底中形成贯通孔的方法和所得到的结构。在一个实施例中，通孔可以通过从其上的导电元件和导电元件下面的基底的一部分从活性表面形成部分通孔来形成通孔。然后可以通过从后表面的激光烧蚀或钻孔来完成通孔。在另一个实施例中，部分通孔可以通过激光烧蚀或从衬底的背面钻孔到其中的预定距离来形成。通孔可以通过形成延伸通过导电元件和下面的衬底以与激光钻孔的部分通孔相交的部分通孔从活性表面完成。在另一个实施例中，可以首先通过激光烧蚀或从衬底的背面进行钻孔形成部分通孔，然后通过干蚀刻来完成通孔。

37. 发明申请

US20060046463A1 Method of forming vias in semiconductor substrates without damaging active regions thereof and resulting structures 有权
公开(公告)号：US20060046463A1
公开(公告)日：2006-03-02
申请号：US11140402
申请日：2005-05-27
申请人： Charles Watkins , Kyle Kirby , Alan Wood , Salman Akram , Warren Farnworth
发明人： Charles Watkins , Kyle Kirby , Alan Wood , Salman Akram , Warren Farnworth
IPC分类号： H01L21/4763
CPC分类号： H01L21/76898
摘要： Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from the active surface through a conductive element thereon and a portion of the semiconductor substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from the back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a semiconductor substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying semiconductor substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by ablation or drilling from the back surface of the semiconductor substrate followed by dry etching to complete the through via and expose the underside of the conductive element.

38. 发明申请

US20060255826A1 Systems and methods for testing microelectronic imagers and microfeature devices 有权
标题翻译：用于测试微电子成像器和微特征器件的系统和方法
公开(公告)号：US20060255826A1
公开(公告)日：2006-11-16
申请号：US11409060
申请日：2006-04-24
申请人： Salman Akram , William Hiatt , Alan Wood , Charles Watkins , Kyle Kirby
发明人： Salman Akram , William Hiatt , Alan Wood , Charles Watkins , Kyle Kirby
IPC分类号： G01R31/26
CPC分类号： G01R31/2635 , G01R31/2831
摘要： Systems and methods for testing microelectronic imagers and microfeature devices are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece including a substrate having a front side, a backside, and a plurality of microelectronic dies. The individual dies include an integrated circuit and a plurality of contact pads at the backside of the substrate operatively coupled to the integrated circuit. The method includes contacting individual contact pads with corresponding pins of a probe card. The method further includes testing the dies. In another embodiment, the individual dies can further comprise an image sensor at the front side of the substrate and operatively coupled to the integrated circuit. The image sensors are illuminated while the dies are tested.
摘要翻译：本文公开了用于测试微电子成像器和微特征器件的系统和方法。在一个实施例中，一种方法包括提供微功能工件，其包括具有正面，背面和多个微电子管芯的衬底。各个管芯包括集成电路和在衬底的背面可操作地耦合到集成电路的多个接触焊盘。该方法包括使各个接触垫与探针卡的相应引脚接触。该方法还包括测试模具。在另一个实施例中，各个管芯还可以包括在衬底的前侧的图像传感器，并可操作地耦合到集成电路。在测试模具时，图像传感器被照亮。

39. 发明申请

US20050101037A1 Test system with interconnect having conductive members and contacts on opposing sides 审中-公开
标题翻译：具有互连件的测试系统具有导电构件和在相对侧上的触点
公开(公告)号：US20050101037A1
公开(公告)日：2005-05-12
申请号：US10998269
申请日：2004-11-26
申请人： Warren Farnworth , Alan Wood , David Hembree
发明人： Warren Farnworth , Alan Wood , David Hembree
IPC分类号： H01L21/48 , H01L21/60 , H01L21/768 , H01L23/13 , H01L23/498 , H01L23/538 , H01L25/10 , H05K1/03 , H05K1/11 , H05K3/00 , H01L21/66 , G01R31/26
CPC分类号： H01L21/486 , H01L21/6835 , H01L21/76898 , H01L23/13 , H01L23/481 , H01L23/49827 , H01L23/5389 , H01L24/16 , H01L24/75 , H01L24/81 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/05001 , H01L2224/05009 , H01L2224/05568 , H01L2224/05569 , H01L2224/0557 , H01L2224/05573 , H01L2224/13099 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/16235 , H01L2224/73204 , H01L2224/75 , H01L2224/81801 , H01L2224/82039 , H01L2225/06513 , H01L2225/06541 , H01L2225/1005 , H01L2225/1058 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01022 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H05K1/0306 , H05K1/112 , H05K3/0029 , H05K3/0032 , H05K2201/09472 , H05K2201/0959 , H05K2201/09827 , H05K2201/09845 , H05K2201/10674 , H05K2201/10734 , H01L2924/00
摘要： A method for fabricating semiconductor components and interconnects includes the steps of providing a substrate, such as a semiconductor die, forming external contacts on opposing sides of the substrate by laser drilling vias through the substrate, and forming conductive members in the vias. The conductive members include enlarged terminal portions that are covered with a non-oxidizing metal. The method can be used to fabricate stackable semiconductor packages having integrated circuits in electrical communication with the external contacts. The method can also be used to fabricate interconnects for electrically engaging packages, dice and wafers for testing or for constructing electronic assemblies.
摘要翻译：一种用于制造半导体部件和互连的方法包括以下步骤：提供诸如半导体管芯的衬底，通过穿过衬底的激光钻孔通孔在衬底的相对侧上形成外部触点，以及在通孔中形成导电构件。导电构件包括被非氧化金属覆盖的扩大端子部分。该方法可用于制造具有与外部触点电连通的集成电路的可堆叠半导体封装。该方法还可用于制造用于电接合封装，裸片和晶片用于测试或构建电子组件的互连。

40. 发明申请

US20060115932A1 Method for fabricating semiconductor components with conductive vias 审中-公开
标题翻译：用导电通孔制造半导体元件的方法
公开(公告)号：US20060115932A1
公开(公告)日：2006-06-01
申请号：US11332929
申请日：2006-01-17
申请人： Warren Farnworth , Alan Wood , David Hembree
发明人： Warren Farnworth , Alan Wood , David Hembree
IPC分类号： H01L21/50 , H01L21/48 , H01L21/44
CPC分类号： H01L21/486 , H01L21/6835 , H01L21/76898 , H01L23/13 , H01L23/481 , H01L23/49827 , H01L23/5389 , H01L24/16 , H01L24/75 , H01L24/81 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/05001 , H01L2224/05009 , H01L2224/05568 , H01L2224/05569 , H01L2224/0557 , H01L2224/05573 , H01L2224/13099 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/16235 , H01L2224/73204 , H01L2224/75 , H01L2224/81801 , H01L2224/82039 , H01L2225/06513 , H01L2225/06541 , H01L2225/1005 , H01L2225/1058 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01022 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H05K1/0306 , H05K1/112 , H05K3/0029 , H05K3/0032 , H05K2201/09472 , H05K2201/0959 , H05K2201/09827 , H05K2201/09845 , H05K2201/10674 , H05K2201/10734 , H01L2924/00
摘要： A method for fabricating semiconductor components and interconnects includes the steps of providing a substrate, such as a semiconductor die, forming external contacts on opposing sides of the substrate by laser drilling vias through the substrate, and forming conductive members in the vias. The conductive members include enlarged terminal portions that are covered with a non-oxidizing metal. The method can be used to fabricate stackable semiconductor packages having integrated circuits in electrical communication with the external contacts. The method can also be used to fabricate interconnects for electrically engaging packages, dice and wafers for testing or for constructing electronic assemblies.
摘要翻译：一种用于制造半导体部件和互连的方法包括以下步骤：提供诸如半导体管芯的衬底，通过穿过衬底的激光钻孔通孔在衬底的相对侧上形成外部触点，以及在通孔中形成导电构件。导电构件包括被非氧化金属覆盖的扩大端子部分。该方法可用于制造具有与外部触点电连通的集成电路的可堆叠半导体封装。该方法还可用于制造用于电接合封装，裸片和晶片用于测试或构建电子组件的互连。

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