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    • 31. 发明申请
    • Implementing a Design Flow for a Programmable Hardware Element Coupled To a Processor
    • 实现耦合到处理器的可编程硬件元件的设计流程
    • US20070129819A1
    • 2007-06-07
    • US11566941
    • 2006-12-05
    • Joseph PeckHugo Andrade
    • Joseph PeckHugo Andrade
    • G05B11/01G05B19/42
    • G05B19/0426G05B2219/23258G06F17/5054
    • System and method for implementing a design flow for a programmable hardware element (PHE) coupled to a processor. A graphical program (GP) that specifies performance criteria is received. The GP is mapped for deployment, with a first portion targeted for execution by the processor, and a second portion targeted for implementation in the PHE. A determination is made as to whether the graphical program meets the performance criteria. If not, the GP is remapped for deployment, including identifying and specifying the sub-portion for implementation in the PHE, thereby moving the sub-portion from the first portion to the second portion, and/or identifying and specifying the sub-portion for execution on the processor, thereby moving the sub-portion from the second portion to the first portion. The determining and remapping are repeated until the performance criteria are met. The first and second portions are deployed to the processor and the PHE, respectively.
    • 用于实现耦合到处理器的可编程硬件元件(PHE)的设计流程的系统和方法。 收到指定性能标准的图形程序(GP)。 GP被映射以进行部署,其中第一部分针对处理器执行,以及第二部分用于在PHE中实现。 确定图形程序是否符合性能标准。 如果不是,GP被重新映射以进行部署,包括识别和指定在PHE中实现的子部分,从而将子部分从第一部分移动到第二部分,和/或识别和指定子部分 在处理器上执行,从而将子部分从第二部分移动到第一部分。 重复确定和重新映射,直到满足性能标准。 第一和第二部分分别部署到处理器和PHE。
    • 32. 发明申请
    • Implementing a Design Flow for a Programmable Hardware Element That Includes a Processor
    • 实现包含处理器的可编程硬件元素的设计流程
    • US20070129818A1
    • 2007-06-07
    • US11566926
    • 2006-12-05
    • Hugo AndradeJoseph Peck
    • Hugo AndradeJoseph Peck
    • G05B11/01G05B19/42
    • G05B19/0426G05B2219/23258G06F17/5054
    • System and method for implementing a design flow for a programmable hardware element (PHE) that includes a processor. A graphical program (GP) is received, where the GP specifies performance criteria. The GP is mapped for deployment, with a first portion targeted for execution by the processor, and a second portion targeted for implementation in the PHE. A determination is made as to whether the graphical program meets the performance criteria. If not, the GP is remapped for deployment, including identifying and specifying the sub-portion for implementation in the PHE, thereby moving the sub-portion from the first portion to the second portion, and/or identifying and specifying the sub-portion for execution on the processor, thereby moving the sub-portion from the second portion to the first portion. The determining and remapping is repeated one or more times until the performance criteria are met. The first and second portions are deployed to the PHE.
    • 用于实现包括处理器的可编程硬件元件(PHE)的设计流程的系统和方法。 接收到图形程序(GP),其中GP指定性能标准。 GP被映射以进行部署,其中第一部分针对处理器执行,以及第二部分用于在PHE中实现。 确定图形程序是否符合性能标准。 如果不是,GP被重新映射以进行部署,包括识别和指定在PHE中实现的子部分,从而将子部分从第一部分移动到第二部分,和/或识别和指定子部分 在处理器上执行,从而将子部分从第二部分移动到第一部分。 确定和重新映射重复一次或多次,直到满足性能标准。 第一和第二部分被部署到PHE。
    • 33. 发明申请
    • Implementing a Data Flow Block Diagram Having a Control Flow Node on a Programmable Hardware Element
    • 实现一个可编程硬件元件上的控制流程节点的数据流框图
    • US20070093994A1
    • 2007-04-26
    • US11612197
    • 2006-12-18
    • Jeffrey KodoskyHugo AndradeBrian OdomCary Butler
    • Jeffrey KodoskyHugo AndradeBrian OdomCary Butler
    • G06F17/10
    • G06F8/34G06F11/2294G06F11/2733G06F17/5054G06F2217/74
    • A computer-implemented system and method for generating a hardware implementation of graphical code. The method comprises first creating a graphical program. A first portion of the graphical program may optionally be compiled into machine code for execution by a CPU. A second portion of the graphical program is converted into a hardware implementation according to the present invention. The operation of converting the graphical program into a hardware implementation comprises exporting the second portion of the graphical program into a hardware description, wherein the hardware description describes a hardware implementation of the second portion of the graphical program, and then configuring a programmable hardware element utilizing the hardware description to produce a configured hardware element. The configured hardware element thus implements a hardware implementation of the second portion of the graphical program.
    • 一种用于生成图形代码的硬件实现的计算机实现的系统和方法。 该方法包括首先创建图形程序。 图形程序的第一部分可以可选地被编译成机器代码以供CPU执行。 图形程序的第二部分被转换成根据本发明的硬件实现。 将图形程序转换为硬件实现的操作包括将图形程序的第二部分导出到硬件描述中,其中硬件描述描述图形程序的第二部分的硬件实现,然后利用 硬件描述来生成配置的硬件元素。 因此,配置的硬件元件实现图形程序的第二部分的硬件实现。
    • 37. 发明申请
    • Timing Wires in a Graphical Program
    • 时间线在图形程序
    • US20070203683A1
    • 2007-08-30
    • US11742528
    • 2007-04-30
    • Jacob KornerupJeffrey KodoskyHugo AndradeBiren ShahAljosa VrancicMichael Santori
    • Jacob KornerupJeffrey KodoskyHugo AndradeBiren ShahAljosa VrancicMichael Santori
    • G06F17/50
    • G06F8/34G06F11/323
    • A system and method for specifying timing relationships among nodes in a graphical program. User input specifying desired timing of a first node with respect to timing of a second node may be received. In various embodiments, any kind of timing relationship or timing constraint between the first node and the second node may be specified. Timing information may be displayed on the display to visually indicate the timing of the first node with respect to timing of the second node. In one embodiment, displaying the timing information may comprise displaying a timing wire between the first node and the second node. The graphical program may be executed in such a way that the visually indicated timing of the first node with respect to timing of the second node is satisfied.
    • 一种用于指定图形程序中的节点之间的时序关系的系统和方法。 可以接收指定关于第二节点的定时的第一节点的期望定时的用户输入。 在各种实施例中,可以指定第一节点和第二节点之间的任何种类的定时关系或时序约束。 可以在显示器上显示定时信息,以便可视地指示第一节点相对于第二节点的定时的定时。 在一个实施例中,显示定时信息可以包括在第一节点和第二节点之间显示定时线。 图形程序可以以这样一种方式执行,使得第一节点相对于第二节点的定时的视觉指示的定时得到满足。
    • 39. 发明申请
    • Implementing a model on programmable hardware
    • 在可编程硬件上实现模型
    • US20060004553A1
    • 2006-01-05
    • US11214224
    • 2005-08-29
    • Jeffrey KodoskyHugo AndradeBrian OdomCary Butler
    • Jeffrey KodoskyHugo AndradeBrian OdomCary Butler
    • G06F17/10
    • G06F8/34G06F11/2294G06F11/2733G06F17/5054G06F2217/74
    • A computer-implemented system and method for generating a hardware implementation of graphical code. The method comprises first creating a graphical program. A first portion of the graphical program may optionally be compiled into machine code for execution by a CPU. A second portion of the graphical program is converted into a hardware implementation according to the present invention. The operation of converting the graphical program into a hardware implementation comprises exporting the second portion of the graphical program into a hardware description, wherein the hardware description describes a hardware implementation of the second portion of the graphical program, and then configuring a programmable hardware element utilizing the hardware description to produce a configured hardware element. The configured hardware element thus implements a hardware implementation of the second portion of the graphical program.
    • 一种用于生成图形代码的硬件实现的计算机实现的系统和方法。 该方法包括首先创建图形程序。 图形程序的第一部分可以可选地被编译成机器代码以供CPU执行。 图形程序的第二部分被转换成根据本发明的硬件实现。 将图形程序转换为硬件实现的操作包括将图形程序的第二部分导出到硬件描述中,其中硬件描述描述图形程序的第二部分的硬件实现,然后利用 硬件描述来生成配置的硬件元素。 因此,配置的硬件元件实现图形程序的第二部分的硬件实现。