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31. 发明申请

US20050155869A1 Electropolishing method for removing particles from wafer surface 有权
标题翻译：从晶片表面去除颗粒的电抛光方法
公开(公告)号：US20050155869A1
公开(公告)日：2005-07-21
申请号：US10761477
申请日：2004-01-20
申请人： Shih-Ho Lin , Chung-Chang Chen , Kei-Wei Chen , Shih-Tzung Chang , Chao-Lung Chen , Po-Jen Shih , Yu-Ku Lin , Ying-Lang Wang
发明人： Shih-Ho Lin , Chung-Chang Chen , Kei-Wei Chen , Shih-Tzung Chang , Chao-Lung Chen , Po-Jen Shih , Yu-Ku Lin , Ying-Lang Wang
IPC分类号： B24B37/04 , C25D3/38 , C25D5/18 , C25D7/12 , C25F3/02 , H01L21/02 , H01L21/321 , H01L21/768 , B23H3/00
CPC分类号： H01L21/76843 , B24B37/042 , B24B37/046 , C25D3/38 , C25D5/18 , C25D7/123 , C25F3/02 , H01L21/02068 , H01L21/32115 , H01L21/76865 , H01L21/76873
摘要： An electropolishing method for removing potential device-contaminating particles from a wafer, is disclosed. The method includes immersing the wafer in an electropolishing electrolyte solution and removing defects and particles from the wafer by rotational friction between the wafer and the electrolyte solution in combination with electrolysis. The method is effective in removing particles from via openings of all sizes, including via openings having a width smaller than about 0.2 μm.
摘要翻译：公开了一种用于从晶片去除潜在的器件污染颗粒的电抛光方法。该方法包括将晶片浸入电解抛光电解质溶液中，并通过晶片和电解质溶液之间的旋转摩擦与电解结合从晶片去除缺陷和颗粒。该方法有效地从各种尺寸的通孔开口去除颗粒，包括宽度小于约0.2μm的通孔。

32. 发明授权

US06626741B2 Method for improving thickness uniformity on a semiconductor wafer during chemical mechanical polishing 有权
公开(公告)号：US06626741B2
公开(公告)日：2003-09-30
申请号：US09910633
申请日：2001-07-20
申请人： Ting-Chun Wang , Kei-Wei Chen , Shih-Tzung Chang , Yu-Ku Lin , Ying-Lang Wang
发明人： Ting-Chun Wang , Kei-Wei Chen , Shih-Tzung Chang , Yu-Ku Lin , Ying-Lang Wang
IPC分类号： B24B100
CPC分类号： B24B57/02 , B24B37/042
摘要： A method for improving thickness uniformity on a semiconductor wafer during a chemical mechanical polishing process capable of eliminating a wafer edge collapsing defect is described. In the method, slurry solution is removed from a peripheral edge portion of less than 10 mm wide on the surface of the polishing pad such that a concentration of the slurry can be effectively reduced in the peripheral region. The reduced slurry solution leads to a reduction in the removal rate on the wafer surface. The removal of slurry from the peripheral region can further be achieved by a mechanical means. A suitable width of the peripheral region of the polishing pad to be sprayed by an edge sprayer is less than 10 mm, and preferably between about 3 mm and about 5 mm. A suitable solvent to be sprayed is deionized water.

33. 发明授权

US07128821B2 Electropolishing method for removing particles from wafer surface 有权
标题翻译：从晶片表面去除颗粒的电抛光方法
公开(公告)号：US07128821B2
公开(公告)日：2006-10-31
申请号：US10761477
申请日：2004-01-20
申请人： Shih-Ho Lin , Chung-Chang Chen , Kei-Wei Chen , Shih-Tzung Chang , Chao-Lung Chen , Po-Jen Shih , Yu-Ku Lin , Ying-Lang Wang
发明人： Shih-Ho Lin , Chung-Chang Chen , Kei-Wei Chen , Shih-Tzung Chang , Chao-Lung Chen , Po-Jen Shih , Yu-Ku Lin , Ying-Lang Wang
IPC分类号： C25D5/34 , C25F1/00
CPC分类号： H01L21/76843 , B24B37/042 , B24B37/046 , C25D3/38 , C25D5/18 , C25D7/123 , C25F3/02 , H01L21/02068 , H01L21/32115 , H01L21/76865 , H01L21/76873
摘要： An electropolishing method for removing potential device-contaminating particles from a wafer, is disclosed. The method includes immersing the wafer in an electropolishing electrolyte solution and removing defects and particles from the wafer by rotational friction between the wafer and the electrolyte solution in combination with electrolysis. The method is effective in removing particles from via openings of all sizes, including via openings having a width smaller than about 0.2 μm.
摘要翻译：公开了一种用于从晶片去除潜在的器件污染颗粒的电抛光方法。该方法包括将晶片浸入电解抛光电解质溶液中，并通过晶片和电解质溶液之间的旋转摩擦与电解结合从晶片去除缺陷和颗粒。该方法有效地从各种尺寸的通孔开口去除颗粒，包括宽度小于约0.2μm的通孔。

34. 发明申请

US20060055928A1 Test device and method for laser alignment calibration 有权
标题翻译：用于激光对准校准的测试装置和方法
公开(公告)号：US20060055928A1
公开(公告)日：2006-03-16
申请号：US10942554
申请日：2004-09-15
申请人： Shih-Tzung Chang , Yu-Ku Lin , Shih-Ho Lin , Kei-Wei Chen , Ting-Chun Wang , Ching-Hwan Su , Ying-Lang Wang
发明人： Shih-Tzung Chang , Yu-Ku Lin , Shih-Ho Lin , Kei-Wei Chen , Ting-Chun Wang , Ching-Hwan Su , Ying-Lang Wang
IPC分类号： G01B11/00
CPC分类号： H01L22/34 , G01B21/042
摘要： A novel test device and method for calibrating the alignment of a laser beam emitted from a laser metrology tool with respect to a target area on a substrate. The test device includes a laser-sensitive material having a calibration pattern that includes a target point. When the tool is properly adjusted, the laser beam strikes the target point and is released to production. If the laser beam misses the target point, the tool is re-adjusted and re-tested until the laser beam strikes the target point.
摘要翻译：一种用于校准从激光计量工具发射的激光束相对于衬底上的目标区域的对准的新型测试装置和方法。测试装置包括具有包括目标点的校准图案的激光敏感材料。当工具被正确调整时，激光束撞击目标点并释放到生产中。如果激光束错过目标点，则重新调整工具并重新测试直到激光束撞击目标点。

35. 发明申请

US20050236181A1 Novel ECP method for preventing the formation of voids and contamination in vias 审中-公开
标题翻译：用于防止通孔中形成空隙和污染的新型ECP方法
公开(公告)号：US20050236181A1
公开(公告)日：2005-10-27
申请号：US10917543
申请日：2004-08-12
申请人： Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen , Ching-Hwan Su , Yu-Ku Lin , Ying-Lang Wang , De-Dui Liao , Meng-Chao Tzeng
发明人： Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen , Ching-Hwan Su , Yu-Ku Lin , Ying-Lang Wang , De-Dui Liao , Meng-Chao Tzeng
IPC分类号： H01L21/768 , H01L23/522 , H05K1/03 , H05K1/09 , H05K1/11
CPC分类号： H01L21/76816 , H01L21/76807 , H01L23/5226 , H01L2924/0002 , Y10T29/49165 , H01L2924/00
摘要： A method for preventing the formation of voids and contaminants in vias during the fabrication of a metal interconnect structure such as a dual damascene structure is disclosed. The method includes providing a substrate; providing a dielectric layer having trench openings and via openings on the substrate, wherein the ratio of the sum of the areas of the trench openings to the sum of the areas of the via openings is between 1 and 300; wherein the via opening bottom has a width of less than about 25 μm; and electroplating a metal in the trench openings and via openings. An interconnect structure having at least one void-free via is further disclosed.
摘要翻译：公开了一种用于在金属互连结构例如双镶嵌结构的制造期间防止在通孔中形成空隙和污染物的方法。该方法包括提供基板; 在衬底上提供具有沟槽开口和通孔开口的电介质层，其中沟槽开口的面积之和与通路孔的面积之和的比值在1和300之间; 其中所述通孔开口底部具有小于约25μm的宽度; 以及在沟槽开口和通孔中电镀金属。还公开了具有至少一个无空隙通孔的互连结构。

36. 发明授权

US08772899B2 Method and apparatus for backside illumination sensor 有权
标题翻译：背面照明传感器的方法和装置
公开(公告)号：US08772899B2
公开(公告)日：2014-07-08
申请号：US13409924
申请日：2012-03-01
申请人： Shiu-Ko JangJian , Min Hao Hong , Kei-Wei Chen , Ying-Lang Wang
发明人： Shiu-Ko JangJian , Min Hao Hong , Kei-Wei Chen , Ying-Lang Wang
IPC分类号： H01L31/00 , H01L31/02
CPC分类号： H01L27/1464 , H01L27/14687
摘要： Methods and apparatus for a backside illuminated (BSI) image sensor device are disclosed. A BSI sensor device is formed on a substrate comprising a photosensitive diode. The substrate may be thinned at the backside, then a B doped Epi-Si(Ge) layer may be formed on the backside surface of the substrate. Additional layers may be formed on the B doped Epi-Si(Ge) layer, such as a metal shield layer, a dielectric layer, a micro-lens, and a color filter.
摘要翻译：公开了用于背面照明（BSI）图像传感器装置的方法和装置。在包括感光二极管的基板上形成BSI传感器装置。衬底可以在背面变薄，则可以在衬底的背面上形成B掺杂的Epi-Si（Ge）层。另外的层可以形成在B掺杂的Epi-Si（Ge）层上，例如金属屏蔽层，电介质层，微透镜和滤色器。

37. 发明授权

US08470390B2 Oxidation-free copper metallization process using in-situ baking 有权
标题翻译：无氧化铜金属化工艺采用原位烘烤
公开(公告)号：US08470390B2
公开(公告)日：2013-06-25
申请号：US11972785
申请日：2008-01-11
申请人： Yu-Sheng Wang , Shih-Ho Lin , Kei-Wei Chen , Szu-An Wu , Ying-Lang Wang
发明人： Yu-Sheng Wang , Shih-Ho Lin , Kei-Wei Chen , Szu-An Wu , Ying-Lang Wang
IPC分类号： B05D5/12 , C23C14/00
CPC分类号： H01L21/76814 , H01L21/02063 , H01L21/76828 , H01L21/76843
摘要： A method of forming an integrated circuit structure includes providing a substrate; forming a metal feature over the substrate; forming a dielectric layer over the metal feature; and forming an opening in the dielectric layer. At least a portion of the metal feature is exposed through the opening. An oxide layer is accordingly formed on an exposed portion of the metal feature. The method further includes, in a production tool having a vacuum environment, performing an oxide-removal process to remove the oxide layer. Between the step of forming the opening and the oxide-removal process, no additional oxide-removal process is performed to the metal feature outside the production tool. The method further includes, in the production tool, forming a diffusion barrier layer in the opening, and forming a seed layer on the diffusion barrier layer.
摘要翻译：形成集成电路结构的方法包括提供基板; 在衬底上形成金属特征; 在金属特征上形成介电层; 并在介电层中形成开口。金属特征的至少一部分通过开口露出。相应地，在金属特征的暴露部分上形成氧化物层。该方法还包括在具有真空环境的生产工具中进行氧化物去除工艺以去除氧化物层。在形成开口的步骤和氧化物去除工艺之间，对生产工具外部的金属特征没有进行额外的氧化物去除处理。该方法还包括在生产工具中在开口中形成扩散阻挡层，并在扩散阻挡层上形成种子层。

38. 发明授权

US08455883B2 Stressed semiconductor device and method of manufacturing 有权
标题翻译：强调半导体器件及其制造方法
公开(公告)号：US08455883B2
公开(公告)日：2013-06-04
申请号：US13111732
申请日：2011-05-19
申请人： Miao-Cheng Liao , Min Hao Hong , Hsiang Hsiang Ko , Kei-Wei Chen , Ying-Lang Wang
发明人： Miao-Cheng Liao , Min Hao Hong , Hsiang Hsiang Ko , Kei-Wei Chen , Ying-Lang Wang
IPC分类号： H01L29/15 , H01L31/052 , H01L21/331
CPC分类号： H01L21/823807 , H01L21/0245 , H01L21/02529 , H01L21/02532 , H01L21/0262
摘要： A semiconductor device and method of manufacturing a semiconductor device is disclosed. The exemplary semiconductor device and method for fabricating the semiconductor device enhance carrier mobility. The method includes providing a substrate and forming a dielectric layer over the substrate. The method further includes forming a first trench within the dielectric layer, wherein the first trench extends through the dielectric layer and epitaxially (epi) growing a first active layer within the first trench and selectively curing with a radiation energy the dielectric layer adjacent to the first active layer.
摘要翻译：公开了一种制造半导体器件的半导体器件和方法。用于制造半导体器件的示例性半导体器件和方法增强载流子迁移率。该方法包括提供衬底并在衬底上形成电介质层。该方法还包括在电介质层内形成第一沟槽，其中第一沟槽延伸穿过电介质层并且外延（epi）在第一沟槽内生长第一有源层，并用辐射能选择性地固化与第一沟槽相邻的介电层活动层

39. 发明申请

US20130020617A1 Nickel Alloy Target Including a Secondary Metal 有权
标题翻译：包含二次金属的镍合金靶材
公开(公告)号：US20130020617A1
公开(公告)日：2013-01-24
申请号：US13188182
申请日：2011-07-21
申请人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen
发明人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen
IPC分类号： H01L29/78 , C23C14/14
CPC分类号： H01L29/45 , C23C14/14 , C23C14/3414 , H01L21/28052 , H01L21/28518 , H01L21/2855 , H01L21/823418 , H01L29/456 , H01L29/665 , Y10T29/41
摘要： A target includes nickel and a secondary metal. The secondary metal has a volume percentage between about 1 percent and about 10 percent. The secondary metal has a density between about 5,000 kg/m3 and about 15,000 kg/m3.
摘要翻译：目标包括镍和二次金属。次级金属的体积百分比在约1％至约10％之间。二次金属具有约5,000kg / m 3至约15,000kg / m 3的密度。

40. 发明申请

US20090181164A1 Oxidation-Free Copper Metallization Process Using In-situ Baking 有权
标题翻译：使用原位烘烤的无氧铜金属化工艺
公开(公告)号：US20090181164A1
公开(公告)日：2009-07-16
申请号：US11972785
申请日：2008-01-11
申请人： Yu-Sheng Wang , Shih-Ho Lin , Kei-Wei Chen , Szu-An Wu , Ying-Lang Wang
发明人： Yu-Sheng Wang , Shih-Ho Lin , Kei-Wei Chen , Szu-An Wu , Ying-Lang Wang
IPC分类号： H05K3/46
CPC分类号： H01L21/76814 , H01L21/02063 , H01L21/76828 , H01L21/76843
摘要： A method of forming an integrated circuit structure includes providing a substrate; forming a metal feature over the substrate; forming a dielectric layer over the metal feature; and forming an opening in the dielectric layer. At least a portion of the metal feature is exposed through the opening. An oxide layer is accordingly formed on an exposed portion of the metal feature. The method further includes, in a production tool having a vacuum environment, performing an oxide-removal process to remove the oxide layer. Between the step of forming the opening and the oxide-removal process, no additional oxide-removal process is performed to the metal feature outside the production tool. The method further includes, in the production tool, forming a diffusion barrier layer in the opening, and forming a seed layer on the diffusion barrier layer
摘要翻译：形成集成电路结构的方法包括提供基板; 在衬底上形成金属特征; 在金属特征上形成介电层; 并在介电层中形成开口。金属特征的至少一部分通过开口露出。相应地，在金属特征的暴露部分上形成氧化物层。该方法还包括在具有真空环境的生产工具中进行氧化物去除工艺以去除氧化物层。在形成开口的步骤和氧化物去除工艺之间，对生产工具外部的金属特征没有进行额外的氧化物去除处理。该方法还包括在生产工具中在开口中形成扩散阻挡层，并在扩散阻挡层上形成种子层

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