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31. 发明授权

US07755165B2 iTFC with optimized C(T) 有权
标题翻译： iTFC优化C（T）
公开(公告)号：US07755165B2
公开(公告)日：2010-07-13
申请号：US11972583
申请日：2008-01-10
申请人： Cengiz A. Palanduz , Dustin P. Wood
发明人： Cengiz A. Palanduz , Dustin P. Wood
IPC分类号： H01L29/00
CPC分类号： H05K1/162 , H01G4/1209 , H01G4/20 , H01G4/33 , H01L2224/16225 , H05K1/0306 , H05K1/097 , H05K3/4629 , H05K3/4641 , H05K2201/0175 , H05K2201/0187 , H05K2201/0355 , H05K2201/068 , H05K2201/09309 , H05K2201/0969 , H05K2201/10015 , H05K2201/10545 , Y10T29/435
摘要： A method including depositing a suspension of a colloid comprising an amount of nano-particles of a ceramic material on a substrate; and thermally treating the suspension to form a thin film. A method including depositing a plurality of nano-particles of a ceramic material to pre-determined locations across a surface of a substrate; and thermally treating the plurality of nano-particles to form a thin film. A system including a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate comprising at least one capacitor structure formed on a surface, the capacitor structure comprising a first electrode, a second electrode, and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material comprises columnar grains.
摘要翻译：一种方法，包括将包含一定量的陶瓷材料的纳米颗粒的胶体悬浮液沉积在基底上; 并对悬浮液进行热处理以形成薄膜。一种方法，包括将陶瓷材料的多个纳米颗粒沉积在衬底的表面上的预定位置; 并对多个纳米颗粒进行热处理以形成薄膜。一种包括计算设备的系统，包括微处理器，所述微处理器通过衬底耦合到印刷电路板，所述衬底包括形成在表面上的至少一个电容器结构，所述电容器结构包括第一电极，第二电极和陶瓷设置在第一电极和第二电极之间的材料，其中陶瓷材料包括柱状晶粒。

32. 发明授权

US07675160B2 Individual sub-assembly containing a ceramic interposer, silicon voltage regulator, and array capacitor 有权
标题翻译：包含陶瓷插入器，硅电压调节器和阵列电容器的单独子组件
公开(公告)号：US07675160B2
公开(公告)日：2010-03-09
申请号：US11648301
申请日：2006-12-29
申请人： Sriram Dattaguru , Larry Binder , Cengiz A. Palanduz , Chris Jones , Dave Bach , Kaladhar Radhakrishnan , Timothe Litt
发明人： Sriram Dattaguru , Larry Binder , Cengiz A. Palanduz , Chris Jones , Dave Bach , Kaladhar Radhakrishnan , Timothe Litt
IPC分类号： H01L23/48
CPC分类号： H01L23/49827 , H01L23/13 , H01L23/50 , H01L23/642 , H01L24/14 , H01L24/16 , H01L2224/16225 , H01L2224/16227 , H01L2924/00011 , H01L2924/00014 , H01L2924/14 , H01L2924/15159 , H01L2924/15787 , H05K1/0231 , H05K1/0262 , H05K2201/10378 , H05K2201/10515 , H05K2201/10545 , H05K2201/10674 , H05K2201/10712 , H01L2924/00 , H01L2224/0401
摘要： In some embodiments, an individual sub-assembly containing a ceramic interposer, silicon voltage regulator, and array capacitor is presented. In this regard, an apparatus is introduced having a table-shaped ceramic interposer containing conductive traces, a silicon voltage regulator coupled with contacts on a first surface of the ceramic interposer, and an array capacitor coupled with contacts on a second surface of the ceramic interposer. Other embodiments are also disclosed and claimed.
摘要翻译：在一些实施例中，呈现包含陶瓷插入件，硅电压调节器和阵列电容器的单独子组件。在这方面，引入了具有包含导电迹线的台式陶瓷插入器的装置，与陶瓷插入器的第一表面上的触点耦合的硅电压调节器，以及与陶瓷插入器的第二表面上的触点耦合的阵列电容器。还公开并要求保护其他实施例。

33. 发明授权

US07638928B2 Piezo actuator for cooling 有权
标题翻译：用于冷却的压电致动器
公开(公告)号：US07638928B2
公开(公告)日：2009-12-29
申请号：US11173903
申请日：2005-06-30
申请人： Cengiz A. Palanduz , Ioan Sauciuc , Reza Paydar
发明人： Cengiz A. Palanduz , Ioan Sauciuc , Reza Paydar
IPC分类号： H01L41/08
CPC分类号： F04D33/00 , H01L41/083 , H01L41/1871 , H01L41/273 , H01L41/313 , H01L41/338
摘要： A piezo actuator includes a plurality of layers of ceramic material, a plurality of layers of conductive material interspersed between the plurality of layers of ceramic material, and a plate attached to an end of the actuator. The plate of the piezo actuator includes an overhang portion.
摘要翻译：压电致动器包括多层陶瓷材料，散布在多层陶瓷材料之间的多层导电材料，以及连接到致动器端部的板。压电致动器的板包括突出部分。

34. 发明申请

US20090316374A1 Reduced Porosity High-K Thin Film Mixed Grains for Thin Film Capacitor Applications 审中-公开
标题翻译：用于薄膜电容器应用的减少孔隙率的高K薄膜混合晶粒
公开(公告)号：US20090316374A1
公开(公告)日：2009-12-24
申请号：US12549325
申请日：2009-08-27
申请人： Cengiz A. Palanduz
发明人： Cengiz A. Palanduz
IPC分类号： H05K1/16 , H01G4/06
CPC分类号： H01L28/56 , H01G4/12 , H01G4/1209 , H01L21/31691 , H01L2224/16225 , H05K1/162 , H05K2201/0175 , H05K2201/0195 , H05K2201/0355
摘要： A method including forming a layer of a first ceramic material on a substrate; and after forming the layer, forming a second ceramic material on the layer of the first ceramic material, the formed second ceramic material including an average grain size less than a grain size of the first ceramic material. An apparatus including a first electrode; a second electrode; and a sintered ceramic material, wherein the ceramic material comprises first ceramic grains defining grain boundaries therebetween and second ceramic grains having an average grain size smaller than a grain size of the first ceramic grains. A system including a device including a microprocessor, the microprocessor coupled to a circuit board through a substrate, the substrate including a capacitor structure formed on a surface, the capacitor structure including a first electrode, a second electrode, and a sintered ceramic material disposed between the first electrode and the second electrode.
摘要翻译：一种方法，包括在基板上形成第一陶瓷材料层; 在形成该层之后，在第一陶瓷材料的层上形成第二陶瓷材料，所形成的第二陶瓷材料的平均晶粒尺寸小于第一陶瓷材料的晶粒尺寸。一种装置，包括：第一电极; 第二电极; 和烧结陶瓷材料，其中所述陶瓷材料包括在其间限定晶界的第一陶瓷晶粒和平均晶粒尺寸小于所述第一陶瓷晶粒的晶粒尺寸的第二陶瓷晶粒。一种包括微处理器的装置，所述微处理器通过衬底耦合到电路板，所述衬底包括形成在表面上的电容器结构，所述电容器结构包括第一电极，第二电极和烧结陶瓷材料，第一电极和第二电极。

35. 发明授权

US07547957B2 Thin film capacitors and methods of making the same 有权
标题翻译：薄膜电容器及其制造方法
公开(公告)号：US07547957B2
公开(公告)日：2009-06-16
申请号：US11929788
申请日：2007-10-30
申请人： Cengiz A. Palanduz
发明人： Cengiz A. Palanduz
IPC分类号： H01L39/00
CPC分类号： H05K1/162 , H01G4/1209 , H01G4/20 , H01G4/33 , H01L23/49822 , H01L2924/0002 , H01L2924/3011 , H05K2201/0175 , H05K2201/0195 , H05K2201/0326 , Y10T29/43 , Y10T29/435 , Y10T29/49002 , Y10T29/49155 , H01L2924/00
摘要： An apparatus including a first electrode; a second electrode; a first and second ceramic material disposed between the first electrode and the second electrode, the second ceramic material having a greater electrical conductivity than the first ceramic material. A method including forming a first ceramic material film and a different second ceramic material film on a first electrode; and forming a second electrode on the second ceramic material film to form a capacitor structure having the first ceramic material film and the second ceramic material film disposed between the first electrode and the second electrode, wherein the first ceramic material has a conductivity selected to dampen undesired oscillations in electrical device operation to which the capacitor structure may be exposed. An apparatus including a first electrode; a second electrode; and a composite dielectric including a plurality of dielectric films including a different Curie temperature.
摘要翻译：一种装置，包括：第一电极; 第二电极; 设置在所述第一电极和所述第二电极之间的第一和第二陶瓷材料，所述第二陶瓷材料具有比所述第一陶瓷材料更大的导电性。一种包括在第一电极上形成第一陶瓷材料膜和不同的第二陶瓷材料膜的方法; 以及在所述第二陶瓷材料膜上形成第二电极以形成具有所述第一陶瓷材料膜并且所述第二陶瓷材料膜设置在所述第一电极和所述第二电极之间的电容器结构，其中所述第一陶瓷材料具有选择的电导率，可能会暴露电容器结构的电气设备操作中的振荡。一种装置，包括：第一电极; 第二电极; 以及包括具有不同居里温度的多个介电膜的复合电介质。

36. 发明授权

US07375412B1 iTFC with optimized C(T) 有权
标题翻译： iTFC优化C（T）
公开(公告)号：US07375412B1
公开(公告)日：2008-05-20
申请号：US11096313
申请日：2005-03-31
申请人： Cengiz A. Palanduz , Dustin P. Wood
发明人： Cengiz A. Palanduz , Dustin P. Wood
IPC分类号： H01L29/00
CPC分类号： H05K1/162 , H01G4/1209 , H01G4/20 , H01G4/33 , H01L2224/16225 , H05K1/0306 , H05K1/097 , H05K3/4629 , H05K3/4641 , H05K2201/0175 , H05K2201/0187 , H05K2201/0355 , H05K2201/068 , H05K2201/09309 , H05K2201/0969 , H05K2201/10015 , H05K2201/10545 , Y10T29/435
摘要： A method including depositing a suspension of a colloid comprising an amount of nano-particles of a ceramic material on a substrate; and thermally treating the suspension to form a thin film. A method including depositing a plurality of nano-particles of a ceramic material to pre-determined locations across a surface of a substrate; and thermally treating the plurality of nano-particles to form a thin film. A system including a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate comprising at least one capacitor structure formed on a surface, the capacitor structure comprising a first electrode, a second electrode, and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material comprises columnar grains.
摘要翻译：一种方法，包括将包含一定量的陶瓷材料的纳米颗粒的胶体悬浮液沉积在基底上; 并对悬浮液进行热处理以形成薄膜。一种方法，包括将陶瓷材料的多个纳米颗粒沉积在衬底的表面上的预定位置; 并对多个纳米颗粒进行热处理以形成薄膜。一种包括计算设备的系统，包括微处理器，所述微处理器通过衬底耦合到印刷电路板，所述衬底包括形成在表面上的至少一个电容器结构，所述电容器结构包括第一电极，第二电极和陶瓷设置在第一电极和第二电极之间的材料，其中陶瓷材料包括柱状晶粒。

37. 发明授权

US07216406B2 Method forming split thin film capacitors with multiple voltages 有权
标题翻译：形成具有多个电压的分体薄膜电容器的方法
公开(公告)号：US07216406B2
公开(公告)日：2007-05-15
申请号：US10954644
申请日：2004-09-29
申请人： Cengiz A. Palanduz , Larry E. Mosley
发明人： Cengiz A. Palanduz , Larry E. Mosley
IPC分类号： H04R17/00 , H01G4/06
CPC分类号： H01G4/33 , H01G4/228 , H01L23/49822 , H01L23/5223 , H01L27/016 , H01L28/40 , H01L2224/16 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/10253 , H01L2924/1305 , H01L2924/13091 , H01L2924/15312 , Y10T29/42 , Y10T29/43 , Y10T29/435 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , H01L2924/00 , H01L2224/0401
摘要： A method for forming a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit such as a microprocessor, that may need a closely coupled capacitor supplying and moderating power to the microprocessor in order to quickly respond to instantaneous power demands that may be found in high clock rate devices. The method may supply a lower voltage power supply level for minimum sized transistors in the fast core logic portions of the microprocessor, and a higher voltage power supply level for the cache memory and I/O transistors.
摘要翻译：用于形成用于向电气设备（例如集成电路）提供多个功率和参考电源电压电平的分裂薄膜电容器的方法可用于空间受限的应用中，并且在需要电力消耗器和功率之间非常紧密的电连接的应用中供应。空间限制应用和紧密耦合应用的示例可以是诸如微处理器的集成电路，其可能需要紧密耦合的电容器向微处理器供电和调节电力，以便快速响应可能发现的瞬时功率需求在高速时钟设备。该方法可以为微处理器的快速核心逻辑部分中的最小尺寸的晶体管提供较低电压电源电平，以及用于高速缓冲存储器和I / O晶体管的较高电压电源电平。

38. 发明授权

US07081650B2 Interposer with signal and power supply through vias 有权
标题翻译：内置信号和通过通孔的电源
公开(公告)号：US07081650B2
公开(公告)日：2006-07-25
申请号：US10403312
申请日：2003-03-31
申请人： Cengiz A. Palanduz , Nicholas Holmberg , Dong Zhong
发明人： Cengiz A. Palanduz , Nicholas Holmberg , Dong Zhong
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L23/66 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L24/17 , H01L2223/6622 , H01L2224/16225 , H01L2224/16235 , H01L2924/01019 , H01L2924/0102 , H01L2924/01029 , H01L2924/01078 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/3011 , H01L2924/3025 , H05K1/115 , H05K1/141 , H05K1/162 , H05K3/4641 , H05K2201/09236 , H05K2201/09309 , H05K2201/09809 , H05K2201/10378 , H05K2201/10674 , H05K2201/10734 , H01L2924/00
摘要： A planar thin film multi-layer capacitor having a high dielectric constant with a plurality of conductive through vias and a plurality of pairs of conductive through vias having a low dielectric constant and operating in a transverse electromagnetic wave mode for high frequency signals on the pairs of vias. Vias coupled to the capacitor are arranged to propagate alternate polarity. The interposer is adapted for coupling directly to a die.
摘要翻译：一种具有高介电常数的平面薄膜多层电容器，具有多个导电通孔和多对导电通孔，导电通孔具有低介电常数，并以横向电磁波模式工作，用于高频信号对通孔耦合到电容器的通孔布置成传播交替的极性。插入器适于直接耦合到管芯。

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