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31. 发明申请

US20050180205A1 Magnetic random access memory and method of reading data from the same 审中-公开
标题翻译：磁性随机存取存储器和从其读取数据的方法
公开(公告)号：US20050180205A1
公开(公告)日：2005-08-18
申请号：US11025841
申请日：2004-12-30
申请人： Wan-jun Park , Tae-wan Kim , Sang-jin Park , Dae-jeong Kim , Seung-jun Lee , Hyung-soon Shin
发明人： Wan-jun Park , Tae-wan Kim , Sang-jin Park , Dae-jeong Kim , Seung-jun Lee , Hyung-soon Shin
IPC分类号： G11C11/15 , G11C7/06 , G11C7/14 , G11C11/16 , G11C11/14
CPC分类号： G11C7/14 , G11C7/062 , G11C11/1659 , G11C11/1673
摘要： In a magnetic random access memory (MRAM), and a method of reading data from the same, the MRAM includes a memory cell having one transistor and one magnetic tunneling junction (MTJ) layer, and a reference cell that is operable for use as a basis when reading data stored in the memory cell, wherein the reference cell includes first and second MTJ layers provided in parallel to each other, and first and second transistors provided in parallel to each other, the first and second transistors being respectively connected in series to the first and second MTJ layers. Alternatively, one transistor having a driving capability corresponding to twice a driving capability of the transistor of the memory cell may be substituted for the first and second transistors of the reference cell.
摘要翻译：在磁性随机存取存储器（MRAM）中，以及从其读取数据的方法，MRAM包括具有一个晶体管和一个磁性隧道结（MTJ）层的存储单元，以及可操作用作读取存储在存储单元中的数据的基础，其中参考单元包括彼此并联设置的第一和第二MTJ层，以及彼此并联设置的第一和第二晶体管，第一和第二晶体管分别串联连接到第一和第二MTJ层。或者，具有对应于存储器单元的晶体管的驱动能力的两倍的驱动能力的一个晶体管可以代替参考单元的第一和第二晶体管。

32. 发明授权

US06781871B2 Magnetic random access memory and method of operating the same 有权
标题翻译：磁性随机存取存储器及其操作方法
公开(公告)号：US06781871B2
公开(公告)日：2004-08-24
申请号：US10316844
申请日：2002-12-12
申请人： Wan-jun Park , Tae-wan Kim , I-hun Song , Sang-jin Park , Richard J. Gambino
发明人： Wan-jun Park , Tae-wan Kim , I-hun Song , Sang-jin Park , Richard J. Gambino
IPC分类号： G11C1100
CPC分类号： G11C19/0808 , G11C11/15 , G11C11/16
摘要： A magnetic random access memory using magnetic domain drag and giant magnetoresistance (GMR) or tunnel magnetoresistance (TMR) and a method of operating the same, wherein the magnetic random access memory includes a data storage unit including a fixed layer, a non-magnetic layer, and a free layer having two ends; a data input means electrically connected to both ends of the free layer, for applying current to the free layer to input data into the data storage unit; and a data output means electrically connected to the free layer and the fixed layer to output data stored in the data storage unit. Accordingly, a magnetic random access memory according to the present invention has superior performance than one using a switching field to record data.
摘要翻译：一种使用磁畴阻力和巨磁阻（GMR）或隧道磁阻（TMR）的磁性随机存取存储器及其操作方法，其中磁性随机存取存储器包括数据存储单元，其包括固定层，非磁性层和具有两端的自由层; 电连接到自由层的两端的数据输入装置，用于向自由层施加电流以将数据输入数据存储单元; 以及电连接到所述自由层和所述固定层的数据输出装置，以输出存储在所述数据存储单元中的数据。因此，根据本发明的磁性随机存取存储器具有比使用切换字段来记录数据的磁性随机存取存储器更好的性能。

33. 发明申请

US20090061613A1 Method of forming aluminum oxide layer and method of manufacturing charge trap memory device using the same 有权
标题翻译：形成氧化铝层的方法和使用其制造电荷陷阱存储器件的方法
公开(公告)号：US20090061613A1
公开(公告)日：2009-03-05
申请号：US12153655
申请日：2008-05-22
申请人： Sang-moo Choi , Kwang-soo Seol , Woong-chul Shin , Sang-jin Park , Eun-ha Lee , Jung-hun Sung
发明人： Sang-moo Choi , Kwang-soo Seol , Woong-chul Shin , Sang-jin Park , Eun-ha Lee , Jung-hun Sung
IPC分类号： H01L21/3205 , H01L21/44
CPC分类号： H01L21/28282 , H01L21/02178 , H01L21/02263 , H01L21/02356 , H01L21/02362 , H01L21/31604 , H01L21/3162
摘要： Provided is a method of forming an aluminum oxide layer and a method of manufacturing a charge trap memory device using the same. The method of forming an aluminum oxide layer may include forming an amorphous aluminum oxide layer on an underlying layer, forming a crystalline auxiliary layer on the amorphous aluminum oxide layer, and crystallizing the amorphous aluminum oxide layer. Forming the crystalline auxiliary layer may include forming an amorphous auxiliary layer on the amorphous aluminum oxide layer; and crystallizing the amorphous auxiliary layer.
摘要翻译：提供一种形成氧化铝层的方法以及使用其形成电荷阱存储装置的方法。形成氧化铝层的方法可以包括在下层上形成非晶态氧化铝层，在非晶态氧化铝层上形成结晶性辅助层，并使无定形氧化铝层结晶。形成结晶辅助层可以包括在无定形氧化铝层上形成非晶态辅助层; 并使无定形辅助层结晶。

34. 发明申请

US20090045455A1 Nonvolatile memory device and method of fabricating the same 审中-公开
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20090045455A1
公开(公告)日：2009-02-19
申请号：US12219465
申请日：2008-07-23
申请人： Kwang-soo Seol , Sang-jin Park , Sang-moo Choi , Hyo-sug Lee , Jung-hun Sung
发明人： Kwang-soo Seol , Sang-jin Park , Sang-moo Choi , Hyo-sug Lee , Jung-hun Sung
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L29/4234 , H01L29/40117 , H01L29/513 , H01L29/66833
摘要： Example embodiments relate to nonvolatile semiconductor memory devices using an electric charge storing layer as a storage node and fabrication methods thereof. An electric charge trap type nonvolatile memory device may include a tunneling film, an electric charge storing layer, a blocking insulation film, and a gate electrode. The blocking insulation film may be an aluminum oxide having an energy band gap larger than that of a γ-phase aluminum oxide film. An α-phase crystalline aluminum oxide film as a blocking insulation film may have an energy band gap of about 7.0 eV or more along with fewer defects. The crystalline aluminum oxide film may be formed by providing a source film (e.g., AlF3 film) on or within a preliminary blocking insulation film (e.g., amorphous aluminum oxide film) and performing a heat treatment. Alternatively, an aluminum compound (e.g., AlF3) may be introduced into the preliminary blocking insulation film by other diffusion methods or ion implantation. Accordingly, the ability of the memory device to maintain electric charges may be improved, the operating voltage for programming and erasing may be lowered, and the operating speed may be increased.
摘要翻译：示例性实施例涉及使用电荷存储层作为存储节点的非易失性半导体存储器件及其制造方法。电荷阱型非易失性存储器件可以包括隧穿膜，电荷存储层，阻挡绝缘膜和栅电极。阻挡绝缘膜可以是具有比γ相氧化铝膜的能带隙大的能带隙的氧化铝。作为阻挡绝缘膜的α相结晶氧化铝膜可以具有约7.0eV以上的能带隙和更少的缺陷。结晶氧化铝膜可以通过在预先隔离绝缘膜（例如无定形氧化铝膜）上或内部提供源膜（例如，AlF 3膜）并进行热处理而形成。或者，可以通过其它扩散方法或离子注入将铝化合物（例如，AlF 3）引入到初步阻挡绝缘膜中。因此，可以提高存储器件保持电荷的能力，可以降低用于编程和擦除的操作电压，并且可以提高操作速度。

35. 发明申请

US20080296739A1 Method of forming a thin film structure and stack structure comprising the thin film 审中-公开
标题翻译：形成薄膜结构的方法和包括该薄膜的堆叠结构
公开(公告)号：US20080296739A1
公开(公告)日：2008-12-04
申请号：US12005371
申请日：2007-12-27
申请人： Eun-ha Lee , Sang-moo Choi , Kwang-soo Seol , Sang-jin Park
发明人： Eun-ha Lee , Sang-moo Choi , Kwang-soo Seol , Sang-jin Park
IPC分类号： H01L23/58 , H01L21/31
CPC分类号： H01L21/31691 , C30B1/02 , C30B29/20 , H01L21/02178 , H01L21/02194 , H01L21/022 , H01L21/02356
摘要： Provided is a method of forming a thin film structure and a stack structure comprising the thin film. The method may include forming a crystalline AlxOy film, forming a LaAlO film on the crystalline AlxOy film, and crystallizing the LaAlO film by annealing the LaAlO film.
摘要翻译：提供一种形成薄膜结构的方法和包括该薄膜的堆叠结构。该方法可以包括形成结晶Al x O y膜，在结晶Al x O y膜上形成LaAlO膜，并通过退火LaAlO膜使LaAlO膜结晶。

36. 发明申请

US20080205157A1 Method of operating nonvolatile memory device 有权
标题翻译：操作非易失性存储器件的方法
公开(公告)号：US20080205157A1
公开(公告)日：2008-08-28
申请号：US12071961
申请日：2008-02-28
申请人： Kwang-soo Seol , Sang-jin Park , Sung-hoon Lee , Sung-il Park , Jong-seob Kim
发明人： Kwang-soo Seol , Sang-jin Park , Sung-hoon Lee , Sung-il Park , Jong-seob Kim
IPC分类号： G11C16/06
CPC分类号： G11C16/349
摘要： Provided is a method of operating a nonvolatile memory device to perform a programming operation or an erase operation. The method includes applying a composite pulse including a direct current (DC) pulse and an AC perturbation pulse to the nonvolatile memory device to perform the programming operation or the erase operation.
摘要翻译：提供了一种操作非易失性存储器件以执行编程操作或擦除操作的方法。该方法包括将包括直流（DC）脉冲和AC扰动脉冲的复合脉冲施加到非易失性存储器件以执行编程操作或擦除操作。

37. 发明申请

US20080185633A1 Charge trap memory device with blocking insulating layer having higher-dielectric constant and larger energy band-gap and method of manufacturing the same 审中-公开
标题翻译：具有较高介电常数和较大能带隙的阻挡绝缘层的电荷陷阱存储器及其制造方法
公开(公告)号：US20080185633A1
公开(公告)日：2008-08-07
申请号：US12068060
申请日：2008-02-01
申请人： Sang-moo Choi , Hyo-sug Lee , Kwang-soo Seol , Sang-jin Park , Eun-ha Lee
发明人： Sang-moo Choi , Hyo-sug Lee , Kwang-soo Seol , Sang-jin Park , Eun-ha Lee
IPC分类号： H01L29/788 , H01L29/792 , H01L21/336
CPC分类号： H01L29/7881 , H01L29/513 , H01L29/792
摘要： A charge trap memory device according to example embodiments may include a tunnel insulating layer provided on a substrate. A charge trap layer may be provided on the tunnel insulating layer. A blocking insulating layer may be provided on the charge trap layer, wherein the blocking insulating layer may include a lanthanide (e.g., lanthanum). The blocking insulating layer may further include aluminum and oxygen, wherein the ratio of lanthanide to aluminum may be greater than 1 (e.g., about 1.5 to about 2). The charge trap memory device may further include a buffer layer provided between the charge trap layer and the blocking insulating layer, and a gate electrode provided on the blocking insulating layer.
摘要翻译：根据示例性实施例的电荷陷阱存储器件可以包括设置在衬底上的隧道绝缘层。电荷陷阱层可以设置在隧道绝缘层上。阻挡绝缘层可以设置在电荷陷阱层上，其中阻挡绝缘层可以包括镧系元素（例如镧）。阻挡绝缘层可以进一步包括铝和氧，其中镧系元素与铝的比可以大于1（例如约1.5至约2）。电荷陷阱存储器件还可以包括设置在电荷陷阱层和阻挡绝缘层之间的缓冲层，以及设置在阻挡绝缘层上的栅电极。

38. 发明申请

US20080150010A1 Al-doped charge trap layer, non-volatile memory device and methods of fabricating the same 有权
标题翻译： Al掺杂电荷陷阱层，非易失性存储器件及其制造方法
公开(公告)号：US20080150010A1
公开(公告)日：2008-06-26
申请号：US11892849
申请日：2007-08-28
申请人： Eun-ha Lee , Hion-suck Baik , Kwang-soo Seol , Sang-jin Park , Jong-bong Park , Min-ho Yang
发明人： Eun-ha Lee , Hion-suck Baik , Kwang-soo Seol , Sang-jin Park , Jong-bong Park , Min-ho Yang
IPC分类号： H01L29/792 , B32B5/16 , H01L21/31 , H01L21/336
CPC分类号： H01L29/42332 , Y10T428/259
摘要： Provided is an aluminum (Al) doped charge trap layer, a non-volatile memory device and methods of fabricating the same. The charge trap layer may include a plurality of silicon nano dots that trap charges and a silicon oxide layer that covers the silicon nano dots, wherein the charge trap layer is doped with aluminum (Al). The non-volatile memory device may include a substrate including a source and a drain on separate regions of the substrate, a tunneling film on the substrate contacting the source and the drain, the charge trap layer according to example embodiments, a blocking film on the charge trap layer, and a gate electrode on the blocking film.
摘要翻译：提供了铝（Al）掺杂的电荷阱层，非易失性存储器件及其制造方法。电荷陷阱层可以包括捕获电荷的多个硅纳米点和覆盖硅纳米点的氧化硅层，其中电荷陷阱层掺杂有铝（Al）。非挥发性存储器件可以包括衬底，该衬底包括在衬底的分离区域上的源极和漏极，在衬底上接触源极和漏极的隧道膜，根据示例性实施例的电荷陷阱层，电荷陷阱层和阻挡膜上的栅电极。

39. 发明申请

US20080093662A1 Semiconductor memory device including recessed control gate electrode 失效
标题翻译：半导体存储器件包括凹入控制栅电极
公开(公告)号：US20080093662A1
公开(公告)日：2008-04-24
申请号：US11808982
申请日：2007-06-14
申请人： Sang-jin Park , Kwang-soo Seol , Yoon-dong Park , Sang-min Shin , In-jun Hwang , Sang-moo Choi , Ju-hee Park
发明人： Sang-jin Park , Kwang-soo Seol , Yoon-dong Park , Sang-min Shin , In-jun Hwang , Sang-moo Choi , Ju-hee Park
IPC分类号： H01L29/792
CPC分类号： H01L29/42324 , G11C16/0408 , H01L21/28273 , H01L21/28282 , H01L29/42336 , H01L29/4234 , H01L29/42352 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792
摘要： A semiconductor memory device may include a semiconductor substrate, at least one control gate electrode, at least one storage node layer, at least one tunneling insulating layer, at least one blocking insulating layer, and/or first and second channel regions. The at least one control gate electrode may be recessed into the semiconductor substrate. The at least one storage node layer may be between a sidewall of the at least one control gate electrode and the semiconductor substrate. The at least one tunneling insulating layer may be between the at least one storage node layer and the at least one control gate electrode. The at least one blocking insulating layer may be between the storage node layer and the control gate electrode. The first and second channel regions may be between the at least one tunneling insulating layer and the semiconductor substrate to surround at least a portion of the sidewall of the control gate electrode and/or may be separated from each other.
摘要翻译：半导体存储器件可以包括半导体衬底，至少一个控制栅电极，至少一个存储节点层，至少一个隧道绝缘层，至少一个阻挡绝缘层和/或第一和第二沟道区。至少一个控制栅电极可以凹进到半导体衬底中。所述至少一个存储节点层可以在所述至少一个控制栅电极的侧壁和所述半导体衬底之间。所述至少一个隧道绝缘层可以在所述至少一个存储节点层和所述至少一个控制栅电极之间。所述至少一个阻挡绝缘层可以在所述存储节点层和所述控制栅电极之间。第一和第二沟道区可以在至少一个隧道绝缘层和半导体衬底之间，以围绕控制栅电极的侧壁的至少一部分和/或可以彼此分离。

40. 发明申请

US20080075605A1 VALVE AND MICRO FLUID PUMP HAVING THE SAME 有权
标题翻译：阀门和微型流体泵具有相同的功能
公开(公告)号：US20080075605A1
公开(公告)日：2008-03-27
申请号：US11617865
申请日：2006-12-29
申请人： Duck-jong Kim , Yun-wook Hwang , Yu-chang Kim , Sang-jin Park , Pil-woo Heo , Eui-soo Yoon , Deuk-yong Koh
发明人： Duck-jong Kim , Yun-wook Hwang , Yu-chang Kim , Sang-jin Park , Pil-woo Heo , Eui-soo Yoon , Deuk-yong Koh
IPC分类号： F04F1/06
CPC分类号： F04F1/06 , F04B19/006 , F04B53/141 , Y10T137/4643
摘要： Disclosed herein are a valve and a micro fluid pump having the same. The valve is mounted in a micro fluid pump having a capillary tube, to which a gas supply unit and a fluid transfer pipe are connected, for controlling the introduction and the discharge of fluid. The valve includes a discharge pipe filled with liquid such that the discharge pipe has a predetermined resistance pressure and constructed in a structure in which one end of the discharge pipe is connected to the capillary tube such that the discharge pipe communicates with the interior of the capillary tube, and the other end of the discharge pipe is open, thereby allowing gas out of the capillary tube through the discharge pipe when a gas pressure in the capillary tube exceeds the resistance pressure of the discharge pipe.
摘要翻译：本文公开了具有该阀和微流体泵的阀。阀安装在具有毛细管的微流体泵中，气体供给单元和流体输送管连接到毛细管上，用于控制流体的引入和排出。阀包括填充有液体的排出管，使得排出管具有预定的电阻压力，并且构造成排出管的一端连接到毛细管的结构，使得排出管与毛细管的内部连通管，排出管的另一端开放，从而当毛细管中的气体压力超过排出管的阻力压力时，通过排出管使气体从毛细管流出。

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