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31. 发明授权

US08868887B2 Programmable event driven yield mechanism which may activate other threads 有权
标题翻译：可编程事件驱动的产生机制，可以激活其他线程
公开(公告)号：US08868887B2
公开(公告)日：2014-10-21
申请号：US10982261
申请日：2004-11-05
申请人： Hong Wang , Per Hammarlund , Xiang Zou , John Shen , Xinmin Tian , Milind Girkar , Perry Wang , Piyush Desai
发明人： Hong Wang , Per Hammarlund , Xiang Zou , John Shen , Xinmin Tian , Milind Girkar , Perry Wang , Piyush Desai
IPC分类号： G06F9/00
CPC分类号： G06F13/24 , G06F9/3005 , G06F9/3009 , G06F9/30145 , G06F9/3851 , G06F9/4843 , G06F11/3024 , G06F11/348 , G06F12/0875 , G06F2201/86 , G06F2201/88 , G06F2201/885 , G06F2212/452
摘要： Method, apparatus, and program means for a programmable event driven yield mechanism that may activate other threads. In one embodiment, an apparatus includes execution resources to execute a plurality of instructions and a monitor to detect a condition indicating a low level of progress. The monitor can disrupt processing of a program by transferring to a handler in response to detecting the condition indicating a low level of progress. In another embodiment, thread switch logic may be coupled to a plurality of event monitors which monitor events within the multithreading execution logic. The thread switch logic switches threads based at least partially on a programmable condition of one or more of the performance monitors.
摘要翻译：用于可激活其他线程的可编程事件驱动产量机制的方法，装置和程序装置。在一个实施例中，一种装置包括执行多个指令的执行资源和用于检测指示低水平进展的状况的监视器。响应于检测到指示低水平进展的状况，监视器可以通过传送到处理程序来中断程序的处理。在另一个实施例中，线程切换逻辑可以耦合到监视多线程执行逻辑内的事件的多个事件监视器。线程开关逻辑至少部分地基于一个或多个性能监视器的可编程状态来切换线程。

32. 发明授权

US08074274B2 User-level privilege management 有权
标题翻译：用户级特权管理
公开(公告)号：US08074274B2
公开(公告)日：2011-12-06
申请号：US11648009
申请日：2006-12-29
申请人： Hong Wang , Gautham Chinya , Perry Wang , Jamison Collins , Richard A. Hankins , Per Hammarlund , John Shen
发明人： Hong Wang , Gautham Chinya , Perry Wang , Jamison Collins , Richard A. Hankins , Per Hammarlund , John Shen
IPC分类号： G06F7/00
CPC分类号： G06F9/468 , G06F12/1027 , G06F2212/1052
摘要： In one embodiment, the present invention includes a method for receiving a request from a user-level agent for programming of a user-level privilege for at least one architectural resource of an application-managed sequencer (AMS) and programming the user-level privilege for the at least one architectural resource using an operating system-managed sequencer (OMS) coupled to the AMS. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，本发明包括一种用于从用户级代理接收针对应用管理的定序器（AMS）的至少一个架构资源的用户级特权的编程并且编程用户级特权的请求的方法对于使用耦合到AMS的操作系统管理的定序器（OMS）的至少一个架构资源。描述和要求保护其他实施例。

33. 发明授权

US07904696B2 Communication paths for enabling inter-sequencer communication following lock competition and accelerator registration 有权
标题翻译：用于启用锁定竞争和加速器登记后的序列发生器通信的通信路径
公开(公告)号：US07904696B2
公开(公告)日：2011-03-08
申请号：US11901178
申请日：2007-09-14
申请人： Perry Wang , Jamison Collins , Hong Wang
发明人： Perry Wang , Jamison Collins , Hong Wang
IPC分类号： G06F13/00
CPC分类号： G06F9/30 , G06F9/3877 , G06F9/3879 , G06F9/3881 , G06F15/17368 , G06F15/7832
摘要： In one embodiment, the present invention includes a method for communicating an assertion signal from a first instruction sequencer to a plurality of accelerators coupled to the first instruction sequencer via a dedicated interconnect, detecting the assertion signal in the accelerators and communicating a request for a lock on a second interconnect coupled to the first instruction sequencer and the accelerators, and registering an accelerator that achieves the lock by communication of a registration message for the accelerator to the first instruction sequencer via the second interconnect. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，本发明包括一种用于将断言信号从第一指令定序器传送到经由专用互连耦合到第一指令定序器的多个加速器的方法，检测加速器中的断言信号并传送锁定请求在耦合到所述第一指令定序器和所述加速器的第二互连上，以及通过经由所述第二互连将所述加速器的用于所述加速器的注册消息通信到所述第一指令定序器来登记实现所述锁定的加速器。描述和要求保护其他实施例。

34. 发明申请

US20090158248A1 Compiler and Runtime for Heterogeneous Multiprocessor Systems 有权
标题翻译：用于异构多处理器系统的编译器和运行时
公开(公告)号：US20090158248A1
公开(公告)日：2009-06-18
申请号：US11958307
申请日：2007-12-17
申请人： Michael D. Linderman , Jamison D. Collins , Perry Wang , Hong Wang
发明人： Michael D. Linderman , Jamison D. Collins , Perry Wang , Hong Wang
IPC分类号： G06F9/44
CPC分类号： G06F9/505 , G06F2209/5017
摘要： Presented are embodiments of methods and systems for library-based compilation and dispatch to automatically spread computations of a program across heterogeneous cores in a processing system. The source program contains a parallel-programming keyword, such as mapreduce, from a high-level, library-oriented parallel programming language. The compiler inserts one or more calls for a generic function, associated with the parallel-programming keyword, into the compiled code. A runtime library provides a predicate-based library system that includes multiple hardware specific implementations (“variants”) of the generic function. A runtime dispatch engine dynamically selects the best-available (e.g., most specific) variant, from a bundle of hardware-specific variants, for a given input and machine configuration. That is, the dispatch engine may take into account run-time availability of processing elements, choose one of them, and then select for dispatch an appropriate variant to be executed on the selected processing element. Other embodiments are also described and claimed.
摘要翻译：提出了用于基于库的编译和调度的方法和系统的实施例，以便在处理系统中跨异构核心自动扩展程序的计算。源程序包含一个并行编程关键字，如mapreduce，来自高级的面向库的并行编程语言。编译器将一个或多个与并行编程关键字关联的通用函数的调用插入到编译代码中。运行时库提供了一个基于谓词的库系统，它包含通用函数的多个硬件特定实现（“变体”）。对于给定的输入和机器配置，运行时调度引擎从一组特定于硬件的变体动态地选择最佳可用（例如，最具体的）变体。也就是说，调度引擎可以考虑处理元件的运行时间可用性，选择其中之一，然后选择在所选择的处理元件上调度要执行的适当变体。还描述和要求保护其他实施例。

35. 发明授权

US07069545B2 Quantization and compression for computation reuse 失效
公开(公告)号：US07069545B2
公开(公告)日：2006-06-27
申请号：US09751930
申请日：2000-12-29
申请人： Hong Wang , Perry Wang , Ralph Kling , Neil A. Chazin , John Shen
发明人： Hong Wang , Perry Wang , Ralph Kling , Neil A. Chazin , John Shen
IPC分类号： G06F9/44
CPC分类号： G06F8/4441
摘要： Software reuse instances are found from an execution trace through a process of quantization, discovery, and synthesis. Quantization includes mapping n-dimensional vectors that correspond to instructions, live-in states, and live-out states to one dimensional symbols, and arranging the symbols into a text in program execution order. Discovery includes the identification of recurrent symbols and recurrent phrases of symbols within the text. Recurrent symbols and phrases correspond to reuse instances. Compression algorithms are applied to identify the recurrent symbols and phrases. Synthesis can include correlating the reuse instances with the binary program to identify the reuse regions within the software program. Synthesis can also include generating non-essential code and corresponding triggers for a conjugate processor.

36. 发明申请

US20050125802A1 User-programmable low-overhead multithreading 有权
标题翻译：用户可编程的低开销多线程
公开(公告)号：US20050125802A1
公开(公告)日：2005-06-09
申请号：US10728649
申请日：2003-12-05
申请人： Perry Wang , Hong Wang , John Shen , Ashok Seshadri , Anthony Mah , William Greene , Ravi Chandran , Piyush Desai , Steve Liao
发明人： Perry Wang , Hong Wang , John Shen , Ashok Seshadri , Anthony Mah , William Greene , Ravi Chandran , Piyush Desai , Steve Liao
IPC分类号： G06F9/30 , G06F9/38 , G06F9/46 , G06F9/48
CPC分类号： G06F9/4843 , G06F9/3009 , G06F9/3851 , G06F9/542
摘要： A virtual multithreading hardware mechanism provides multi-threading on a single-threaded processor. Thread switches are triggered by user-defined triggers. Synchronous triggers may be defined in the form of special trigger instructions. Asynchronous triggers may be defined via special marking instructions that identify an asynchronous trigger condition. The asynchronous trigger condition may be based on a plurality of atomic processor events. Minimal context information, such as only an instruction pointer address, is maintained by the hardware upon a thread switch. In contrast to traditional simultaneous multithreading schemes, the virtual multithreading hardware provides thread switches that are transparent to an operating system and that may be performed without operating system intervention.
摘要翻译：虚拟多线程硬件机制在单线程处理器上提供多线程。线程切换由用户定义的触发器触发。可以以特殊触发指令的形式定义同步触发。可以通过标识异步触发条件的特殊标记指令定义异步触发。异步触发条件可以基于多个原子处理器事件。在线程切换时，由硬件维护的最小上下文信息，例如仅指令指针地址。与传统的同时多线程方案相反，虚拟多线程硬件提供对操作系统透明的线程切换，可以在不进行操作系统干预的情况下执行。

37. 发明授权

US07768518B2 Enabling multiple instruction stream/multiple data stream extensions on microprocessors 有权
标题翻译：在微处理器上启用多个指令流/多个数据流扩展
公开(公告)号：US07768518B2
公开(公告)日：2010-08-03
申请号：US11528121
申请日：2006-09-27
申请人： Jamison Collins , Perry Wang , Bernard Lint , Koichi Yamada , Asit Mallick , Richard A. Hankins , Gautham Chinya
发明人： Jamison Collins , Perry Wang , Bernard Lint , Koichi Yamada , Asit Mallick , Richard A. Hankins , Gautham Chinya
IPC分类号： G06F15/80
CPC分类号： G06F9/455 , G06F9/461
摘要： Embodiments described herein disclose a system for enabling emulation of a MIMD ISA extension which supports user-level sequencer management and control, and a set of privileged code executed by both operating system managed sequencers and application managed sequencers, including different sets of persistent per-CPU and per-thread data. In one embodiment, a lightweight code layer executes beneath the operating system. This code layer is invoked in response to particular monitored events, such as the need for communication between an operating system managed sequencer and an application managed sequencer. Control is transferred to this code layer, for execution of special operations, after which control returns back to originally executing code. The code layer is normally dormant and can be invoked at any time when either a user application or the operating system is executing.
摘要翻译：本文描述的实施例公开了一种用于启用支持用户级定序器管理和控制的MIMD ISA扩展的仿真的系统，以及由操作系统管理的顺控程序和应用程序管理的定序器执行的一组特权代码，包括不同的持续性每个CPU 和每线程数据。在一个实施例中，在操作系统之下执行轻量级代码层。响应于特定的监视事件，例如对操作系统管理的定序器和应用程序管理的定序器之间的通信的需要，该代码层被调用。控制被传送到该代码层，用于执行特殊操作，之后控制返回到原始执行的代码。代码层通常处于休眠状态，可以在用户应用程序或操作系统正在执行时随时调用。

38. 发明申请

US20080077909A1 Enabling multiple instruction stream/multiple data stream extensions on microprocessors 有权
标题翻译：在微处理器上启用多个指令流/多个数据流扩展
公开(公告)号：US20080077909A1
公开(公告)日：2008-03-27
申请号：US11528121
申请日：2006-09-27
申请人： Jamison Collins , Perry Wang , Bernard Lint , Koichi Yamada , Asit Mallick , Richard A. Hankins , Gautham Chinya
发明人： Jamison Collins , Perry Wang , Bernard Lint , Koichi Yamada , Asit Mallick , Richard A. Hankins , Gautham Chinya
IPC分类号： G06F9/44
CPC分类号： G06F9/455 , G06F9/461
摘要： Embodiments described herein disclose a system for enabling emulation of a MIMD ISA extension which supports user-level sequencer management and control, and a set of privileged code executed by both operating system managed sequencers and application managed sequencers, including different sets of persistent per-CPU and per-thread data. In one embodiment, a lightweight code layer executes beneath the operating system. This code layer is invoked in response to particular monitored events, such as the need for communication between an operating system managed sequencer and an application managed sequencer. Control is transferred to this code layer, for execution of special operations, after which control returns back to originally executing code. The code layer is normally dormant and can be invoked at any time when either a user application or the operating system is executing.
摘要翻译：本文描述的实施例公开了一种用于启用支持用户级定序器管理和控制的MIMD ISA扩展的仿真的系统，以及由操作系统管理的顺控程序和应用程序管理的定序器执行的一组特权代码，包括不同的持续性每个CPU 和每线程数据。在一个实施例中，在操作系统之下执行轻量级代码层。响应于特定的监视事件，例如对操作系统管理的定序器和应用程序管理的定序器之间的通信的需要，该代码层被调用。控制被传送到该代码层，用于执行特殊操作，之后控制返回到原始执行的代码。代码层通常处于休眠状态，可以在用户应用程序或操作系统正在执行时随时调用。

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