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31. 发明授权

US06992926B2 Driver circuit for semiconductor storage device and portable electronic apparatus 失效
标题翻译：用于半导体存储设备和便携式电子设备的驱动电路
公开(公告)号：US06992926B2
公开(公告)日：2006-01-31
申请号：US10848605
申请日：2004-05-19
申请人： Yasuaki Iwase , Yoshifumi Yaoi , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
发明人： Yasuaki Iwase , Yoshifumi Yaoi , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
IPC分类号： G11C16/06
CPC分类号： H01L21/28282 , G11C16/08 , H01L29/792
摘要： A semiconductor storage device is provided with a gate electrode, a semiconductor layer, a gate insulating film sandwiched between the gate electrode and the semiconductor layer, a channel region under the gate electrode, diffusion regions provided respectively on two sides of the channel regions and being of the other conductivity region than the channel region, memory elements 1 provided respectively on two sides of the gate electrode and having a function of holding charges, and a word line driver circuit, in which the CMOS technique is used. The driver circuit includes a common node for supplying a potential for activating an output inverter for driving a row word line. While the semiconductor storage device is in a read mode, a CMOS inverter other than the output inverter controls a signal at the common node, the CMOS inverter connected to a read input line. While the semiconductor storage device is in writing/erasing mode, a plurality of writing/erasing transistors connected in series to the node are activated in accordance with an address signal, in order to lower the common node to a low potential.
摘要翻译：半导体存储装置设置有栅电极，半导体层，夹在栅极电极和半导体层之间的栅极绝缘膜，栅电极下方的沟道区域，分别设置在沟道区域的两侧的扩散区域，的另一个导电区域，分别设置在栅电极的两侧并具有保持电荷的功能的存储元件1和使用CMOS技术的字线驱动电路。驱动器电路包括用于提供用于激活用于驱动行字线的输出反相器的电位的公共节点。当半导体存储装置处于读取模式时，除了输出反相器之外的CMOS反相器控制公共节点处的信号，CMOS反相器连接到读取输入线。当半导体存储装置处于写入/擦除模式时，根据地址信号激活与该节点串联连接的多个写/擦除晶体管，以便将公共节点降低到低电位。

32. 发明授权

US06975551B2 Semiconductor storage, mobile electronic device, and detachable storage 失效
标题翻译：半导体存储，移动电子设备和可拆卸存储
公开(公告)号：US06975551B2
公开(公告)日：2005-12-13
申请号：US10483064
申请日：2002-07-09
申请人： Hiroshi Iwata , Akihide Shibata
发明人： Hiroshi Iwata , Akihide Shibata
IPC分类号： G11C11/406 , G11C11/407 , H01L21/8242 , H01L21/8247 , H01L27/108 , H01L29/423 , H01L29/788 , H01L29/792 , G11C7/00
CPC分类号： H01L29/7881 , G11C11/406 , G11C2207/2227 , G11C2211/4067 , H01L29/42332 , H01L29/792
摘要： While a memory section (1) is in standby mode, a power supply/interruption circuit (2) supplies electric power to a memory section (1) only during periods in which a refresh operation is performed in synchronization with a timing of the refresh operation generated by the clock circuit (3), and interrupts power supply to the memory section (1) during periods in which the refresh operation is not performed. Thus, power consumption of the memory section that performs the refresh operations is suppressed, by which a power consumption reduction of the semiconductor storage device is realized.
摘要翻译：当存储器部分（1）处于待机模式时，电源/中断电路（2）仅在与更新操作的定时同步地进行刷新操作的时段期间向存储器部分（1）供电由时钟电路（3）产生，并且在不执行刷新操作的时段期间中断对存储器部分（1）的供电。因此，抑制执行刷新操作的存储部分的功耗，从而实现半导体存储装置的功耗降低。

33. 发明申请

US20050151127A1 Variable resistance functional body, manufacturing method therefor and storage device 有权
标题翻译：可变电阻功能体及其制造方法和存储装置
公开(公告)号：US20050151127A1
公开(公告)日：2005-07-14
申请号：US10926151
申请日：2004-08-26
申请人： Hiroshi Iwata , Nobutoshi Arai
发明人： Hiroshi Iwata , Nobutoshi Arai
IPC分类号： H01C10/00 , H01C10/10 , H01L21/02 , H01L21/822 , H01L23/525 , H01L27/04 , H01L27/10 , H01L29/06 , H01L29/66 , H01L45/00
CPC分类号： H01L45/14 , H01C10/00 , H01C10/103 , H01L23/5252 , H01L28/24 , H01L45/04 , H01L45/1206 , H01L45/1608 , H01L2924/0002 , H01L2924/12044 , Y10S977/774 , H01L2924/00
摘要： A variable resistance functional body has an insulator interposed between a first electrode and a second electrode and interposed between a third electrode and a fourth electrode. The insulator contains a plurality of conductive particles. The conductive particles are formed by implanting a substance for forming the conductive particles into the insulator by the negative ion implantation method. The conductive particles are provided so that an electrical resistance between the third electrode and the fourth electrode changes on the basis of a size effect or a change in size between before and after application of a prescribed voltage across the first electrode and the second electrode.
摘要翻译：可变电阻功能体具有插入在第一电极和第二电极之间且介于第三电极和第四电极之间的绝缘体。绝缘体包含多个导电颗粒。通过负离子注入法将用于形成导电粒子的物质注入绝缘体中形成导电粒子。导电颗粒被设置成使得第三电极和第四电极之间的电阻基于在施加第一电极和第二电极之间的规定电压之前和之后的尺寸效应或尺寸变化而改变。

34. 发明申请

US20050145905A1 Solid-state imaging device and production method of the same 审中-公开
标题翻译：固态成像装置及其制作方法相同
公开(公告)号：US20050145905A1
公开(公告)日：2005-07-07
申请号：US11004381
申请日：2004-12-03
申请人： Hiroshi Iwata
发明人： Hiroshi Iwata
IPC分类号： H01L27/146 , H01L31/062 , H01L31/10 , H04N5/335 , H04N5/369 , H04N5/374
CPC分类号： H01L27/14689 , H01L27/14609 , H01L27/1462 , H01L27/14643
摘要： A solid-state imaging device is provided, which comprises unit pixel portions. Each unit pixel portion comprises a first conductivity type substrate, a second conductivity type semiconductor layer, a first conductivity type well region, a light receiving region for generating electric charges when irradiated with light, an electric charge accumulation region for accumulating the electric charges from the light receiving region, and a transistor capable of reading out a signal corresponding to an amount of the electric charges accumulated in the electric charge accumulation region. A surface of the light receiving region is covered with an insulating film made of the same material as that of a gate insulating film of the transistor.
摘要翻译：提供了一种固态成像装置，其包括单位像素部分。每个单位像素部分包括第一导电型衬底，第二导电类型半导体层，第一导电类型阱区域，用于在用光照射时产生电荷的光接收区域，用于累积来自电荷的电荷的电荷积聚区域光接收区域和能够读出对应于积累在电荷积聚区域中的电荷量的信号的晶体管。光接收区域的表面覆盖有与晶体管的栅极绝缘膜相同的材料制成的绝缘膜。

35. 发明授权

US06853208B2 Vertical probe card 失效
标题翻译：垂直探针卡
公开(公告)号：US06853208B2
公开(公告)日：2005-02-08
申请号：US09851946
申请日：2001-05-10
申请人： Masao Okubo , Kazumasa Okubo , Hiroshi Iwata
发明人： Masao Okubo , Kazumasa Okubo , Hiroshi Iwata
IPC分类号： G01R31/26 , G01R1/073 , G01R3/00 , H01L21/66 , G01R31/02
CPC分类号： G01R1/07357 , G01R3/00
摘要： Purpose: To present a vertical probe card capable of reusing without replacing a broken probe if a probe is broken. Constitution: A vertical probe card having vertical probes 100, being used in measurement of electric characteristics of an LSI chip 610 to be measured, comprising a main substrate 300 forming conductive patterns 310, a plurality of probes 100 drooping vertically from the main substrate 300, and a probe support 200 provided at the back side of the main substrate 300 for supporting the probes 100, in which the probe support 200 is disposed parallel to the main substrate 300, and has an upper guide plate 210 and a lower guide plate 220 for supporting the probes 100 by passing the through-holes 211,221 opened in each, and the lower guide plate 220 is composed of three substrates 220A, 220B, 220C laminated separably.
摘要翻译：目的：提供一个能够重复使用的垂直探针卡，而不会在探头损坏时更换损坏的探头。结构：具有垂直探针100的垂直探针卡，用于测量要测量的LSI芯片610的电特性，包括形成导电图案310的主基板300，从主基板300垂直下垂的多个探针100，以及设置在主基板300的背侧的探针支撑件200，用于支撑探针支撑件200平行于主基板300设置的探针100，并且具有上引导板210和下引导板220，通过使每个开放的通孔211,221通过来支撑探针100，下引导板220由可分离地层叠的三个基板220A，220B，220C组成。

36. 发明申请

US20050002244A1 Semiconductor storage device, redundancy circuit thereof, and portable electronic device 有权
标题翻译：半导体存储装置，其冗余电路和便携式电子装置
公开(公告)号：US20050002244A1
公开(公告)日：2005-01-06
申请号：US10848481
申请日：2004-05-19
申请人： Yoshifumi Yaoi , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
发明人： Yoshifumi Yaoi , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
IPC分类号： G11C16/04 , G11C7/00 , G11C16/02 , G11C16/06 , G11C16/22 , G11C29/00 , G11C29/04 , H01L21/82 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/423 , H01L29/788 , H01L29/792
CPC分类号： G11C29/838 , G11C16/0475 , G11C16/22 , G11C29/785 , G11C29/787 , G11C29/789 , H01L29/42332 , H01L29/7887 , H01L29/7923
摘要： A semiconductor storage device includes a plurality of memory elements and a redundancy circuit. Each of the memory elements includes (i) a gate electrode provided on a semiconductor layer, a gate insulating film intervening between the gate electrode and the semiconductor layer, (ii) a channel region provided under the gate electrode, (iii) diffusion regions respectively provided at both sides of the channel region, the diffusion regions having a conductivity type which is opposite a conductivity type of the channel region, and (iv) memory functioning members respectively provided at both sides of the gate electrode, the memory functioning members having a function of holding charge. The redundancy circuit includes an addressing arrangement for a single chip memory including cells associated with a plurality of redundant lines. A decoder for selecting a redundant row is selected by an address signal, and the decoder is programmed. The redundancy circuit requires no additional package pin, and programming is executed after packaging is completed. The semiconductor storage device further includes an arrangement for permanently inactivating any further programming of the redundancy circuit, in order to prevent a user from performing inadvertent programming.
摘要翻译：半导体存储装置包括多个存储元件和冗余电路。每个存储元件包括（i）设置在半导体层上的栅极电极，介于栅极电极和半导体层之间的栅极绝缘膜，（ii）设置在栅电极下方的沟道区域，（iii）扩散区域设置在通道区域的两侧，扩散区域具有与沟道区域的导电类型相反的导电类型，以及（iv）分别设置在栅极电极的两侧的存储功能部件，存储功能部件具有保持电荷的功能。冗余电路包括用于单个芯片存储器的寻址布置，其包括与多个冗余线相关联的单元。通过地址信号选择用于选择冗余行的解码器，并对解码器进行编程。冗余电路不需要额外的封装引脚，封装完成后执行编程。半导体存储装置还包括用于永久地停用冗余电路的任何进一步编程的装置，以便防止用户执行无意的编程。

37. 发明申请

US20050002240A1 Semiconductor memory device and portable electronic apparatus 失效
标题翻译：半导体存储器件和便携式电子设备
公开(公告)号：US20050002240A1
公开(公告)日：2005-01-06
申请号：US10849481
申请日：2004-05-18
申请人： Koji Hamaguchi , Masaru Nawaki , Yoshinao Morikawa , Hiroshi Iwata , Akihide Shibata
发明人： Koji Hamaguchi , Masaru Nawaki , Yoshinao Morikawa , Hiroshi Iwata , Akihide Shibata
IPC分类号： G11C16/02 , G11C16/06 , G11C29/00 , G11C29/14 , G11C29/46 , H01L21/8234 , H01L21/8247 , H01L27/088 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： G11C29/46 , G11C16/04 , G11C16/06 , G11C29/14
摘要： The present invention provides a semiconductor memory device including: a memory cell array in which memory cells are arranged; a plurality of terminals for accepting commands issued by an external user; a command interface circuit for interfacing between the external user and the memory cell array; a write state machine for controlling the programming and erasing operations; and an output circuit for outputting an internal signal to the plurality of terminals, wherein the memory cell includes a gate electrode formed over a semiconductor layer via a gate insulating film, a channel region disposed below the gate electrode, diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional elements formed on both sides of the gate electrode and having the function of retaining charges.
摘要翻译：本发明提供一种半导体存储器件，包括：存储单元阵列，其中存储单元被布置; 用于接受由外部用户发出的命令的多个终端; 用于在外部用户和存储单元阵列之间进行接口的命令接口电路; 用于控制编程和擦除操作的写状态机; 以及输出电路，用于向所述多个端子输出内部信号，其中所述存储单元包括通过栅极绝缘膜形成在半导体层上的栅极电极，设置在所述栅极电极下方的沟道区域，设置在所述栅极绝缘膜两侧的扩散区域所述沟道区域具有与沟道区的导电类型相反的导电类型，以及形成在栅电极的两侧上并具有保持电荷的功能的存储功能元件。

38. 发明申请

US20050001262A1 Driver circuit for semiconductor storage device and portable electronic apparatus 失效
标题翻译：用于半导体存储设备和便携式电子设备的驱动电路
公开(公告)号：US20050001262A1
公开(公告)日：2005-01-06
申请号：US10848605
申请日：2004-05-19
申请人： Yasuaki Iwase , Yoshifumi Yaoi , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
发明人： Yasuaki Iwase , Yoshifumi Yaoi , Hiroshi Iwata , Akihide Shibata , Yoshinao Morikawa , Masaru Nawaki
IPC分类号： G11C16/06 , G11C16/02 , G11C16/04 , G11C16/08 , H01L21/28 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792 , H01L29/76
CPC分类号： H01L21/28282 , G11C16/08 , H01L29/792
摘要： A semiconductor storage device is provided with a gate electrode, a semiconductor layer, a gate insulating film sandwiched between the gate electrode and the semiconductor layer, a channel region under the gate electrode, diffusion regions provided respectively on two sides of the channel regions and being of the other conductivity region than the channel region, memory elements 1 provided respectively on two sides of the gate electrode and having a function of holding charges, and a word line driver circuit, in which the CMOS technique is used. The driver circuit includes a common node for supplying a potential for activating an output inverter for driving a row word line. While the semiconductor storage device is in a read mode, a CMOS inverter other than the output inverter controls a signal at the common node, the CMOS inverter connected to a read input line. While the semiconductor storage device is in writing/erasing mode, a plurality of writing/erasing transistors connected in series to the node are activated in accordance with an address signal, in order to lower the common node to a low potential.
摘要翻译：半导体存储装置设置有栅电极，半导体层，夹在栅极电极和半导体层之间的栅极绝缘膜，栅电极下方的沟道区域，分别设置在沟道区域的两侧的扩散区域，的另一个导电区域，分别设置在栅电极的两侧并具有保持电荷的功能的存储元件1和使用CMOS技术的字线驱动电路。驱动器电路包括用于提供用于激活用于驱动行字线的输出反相器的电位的公共节点。当半导体存储装置处于读取模式时，除了输出反相器之外的CMOS反相器控制公共节点处的信号，CMOS反相器连接到读取输入线。当半导体存储装置处于写入/擦除模式时，根据地址信号激活与该节点串联连接的多个写/擦除晶体管，以便将公共节点降低到低电位。

39. 发明授权

US06388749B1 Monitoring apparatus 失效
标题翻译：监控装置
公开(公告)号：US06388749B1
公开(公告)日：2002-05-14
申请号：US09442233
申请日：1999-11-17
申请人： Hiroshi Yamashita , Hiroshi Iwata , Setsuo Suzuki , Toshihiro Tokudome , Masayuki Ogawa , Isao Kodaka , Masatoshi Kaku , Hisao Usogoe
发明人： Hiroshi Yamashita , Hiroshi Iwata , Setsuo Suzuki , Toshihiro Tokudome , Masayuki Ogawa , Isao Kodaka , Masatoshi Kaku , Hisao Usogoe
IPC分类号： G01N2184
CPC分类号： B65H26/025 , B65H2511/413 , B65H2553/42 , B65H2801/84 , D21F7/04 , B65H2220/01
摘要： There is provided a monitoring apparatus for preventing paper breakage. For this monitoring apparatus, a light source 9 is disposed on the upper side of a wet paper 1, and a light emitting face thereof faces downward. An operation-side camera 5a and a drive-side camera 5b are disposed on the side opposite to the light source 9 with respect to the wet paper 1, and a lens face thereof faces upward. Light 9a of the light source 9 passes through the wet paper 1 after being reflected from a mirror 11, and is caught by the cameras 5a and 5b. Thus, the cameras 5a and 5b photograph a silhouette (image) of the light 9a of the light source 9, which has passed through the wet paper 1. This image is sent to an image processing unit 6, where the image is processed. The coordinates of a boundary line such that the wet paper 1 separates from a center roll 2 is detected from the images photographed from two directions. This coordinate value is sent to a computer 8. The computer 8 converts the value into a movement amount in each sampling cycle to determine the change amount and frequency of a separation point 3 and the whole shape of separation lines 3a and 3b. Thereby, a machine trouble resulting in paper breakage can be predicted.
摘要翻译：提供了一种用于防止纸张断裂的监控装置。对于该监视装置，光源9设置在湿纸1的上侧，并且其发光面朝下。操作侧照相机5a和驱动侧照相机5b相对于湿纸1设置在与光源9相反的一侧，并且其透镜面朝上。光源9的光9a在从反射镜11反射之后穿过湿纸1，被照相机5a和5b夹住。因此，相机5a和5b拍摄已经通过湿纸1的光源9的光9a的轮廓（图像）。该图像被发送到处理图像的图像处理单元6。从两个方向拍摄的图像中检测出湿纸1与中心卷2分离的边界线的坐标。该坐标值被发送到计算机8.计算机8将该值转换为每个采样周期中的移动量，以确定分离点3的变化量和频率以及分离线3a和3b的整体形状。因此，可以预测导致纸破损的机器故障。

40. 发明授权

US06300783B1 Probe, manufacture of same, and vertically operative type probe card assembly employing same 有权
标题翻译：探针，制造相同，以及使用该探针卡组件的垂直操作型探针卡组件
公开(公告)号：US06300783B1
公开(公告)日：2001-10-09
申请号：US09148147
申请日：1998-09-04
申请人： Masao Okubo , Kazumasa Okubo , Hiroshi Iwata
发明人： Masao Okubo , Kazumasa Okubo , Hiroshi Iwata
IPC分类号： G01R3102
CPC分类号： G01R3/00 , G01R1/07357
摘要： A first assembly configuration features in including: a plurality of probes having a buckling portion to buckle, upon a contact by an end of a contact portion onto an electrode of semiconductor integrated circuit; a first board provided with a first wiring pattern connected with a connecting portion of the probe; a second board removably fastened with the first board and provided with a second wiring pattern connected with the first wiring pattern; housing members mounted with the second board for holding the contact portion of the probe. Next configuration features in including: two kinds of probes; measurement probes and connection probes anew, and a plurality of connection probes include buckling portions to buckle, upon a contact by an end of contact portion onto the wiring pattern provided with the first board when inserted into holes provided with the a second board; wherein through holes provided with the second board are positioned to align to the arrangement of wiring pattern provided with the first board. Thereby, undesirable deviation of contact point by the probe is avoided and a suitable contact pressure is preferably kept, and further convenience in the work of exchanging damaged probes is brought about.
摘要翻译：第一组装构造的特征在于包括：多个探针，其在接触部分的端部接触到半导体集成电路的电极上时具有弯曲部分以弯曲; 第一板，其设置有与所述探针的连接部分连接的第一布线图案; 第二板，其与所述第一板可移除地紧固并设置有与所述第一布线图形连接的第二布线图案; 安装有第二板的壳体构件用于保持探针的接触部分。下一个配置功能包括：两种探头; 重新测量探针和连接探针，并且当插入设置有第二板的孔中时，接触部分的端部与设置有第一板的布线图案接触时，多个连接探针包括弯曲部分以弯曲; 其中设置有第二板的通孔被定位成与设置有第一板的布线图案的布置对准。因此，避免了由探针引起的接触点的不期望的偏差，并且优选地保持适当的接触压力，并且进一步方便了更换损坏的探针的工作。

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