专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明授权

US07206057B2 Liquid crystal display panel and fabricating method thereof 有权
标题翻译：液晶显示面板及其制造方法
公开(公告)号：US07206057B2
公开(公告)日：2007-04-17
申请号：US10981542
申请日：2004-11-05
申请人： Soon Sung Yoo , Youn Gyoung Chang , Heung Lyul Cho
发明人： Soon Sung Yoo , Youn Gyoung Chang , Heung Lyul Cho
IPC分类号： G02F1/1339 , G02F1/1337
CPC分类号： H01L27/1288 , G02F1/133707 , G02F1/13394 , G02F1/13458 , G02F2001/136231 , H01L27/1214
摘要： A liquid crystal display (LCD) panel is fabricated in a simplified process. The LCD panel includes a thin film transistor (TFT) array substrate with a gate and data lines crossing each other to define a pixel area, a TFT at the crossings of the gate and data lines, a protective film, and a pixel electrode connected to the TFT and formed within a pixel opening that is arranged at the pixel area and formed through the protective film and a gate insulating film. A color filter array substrate is joined to the TFT array substrate. A pattern spacer is between the TFT and color filter array substrate and overlaps at least one of the gate line, the data line, and the thin film transistor. A rib is formed from the same layer as the pattern spacer and overlaps the pixel electrode. Liquid crystal material is provided within the LCD panel.
摘要翻译：以简化的工艺制造液晶显示器（LCD）面板。 LCD面板包括薄膜晶体管（TFT）阵列基板，栅极和数据线彼此交叉以限定像素区域，在栅极和数据线的交叉处的TFT，保护膜和连接到 TFT形成在像素区域内，并形成在像素区域并形成在保护膜和栅极绝缘膜上的像素开口内。滤色器阵列基板连接到TFT阵列基板。图案间隔物位于TFT和滤色器阵列基板之间，并与栅极线，数据线和薄膜晶体管中的至少一个重叠。肋由与图案间隔物相同的层形成，并与像素电极重叠。液晶材料设置在LCD面板内。

32. 发明授权

US07649609B2 Method of fabricating and repairing a short defect in LCD device having a residue pattern of a predetermined line width removed after forming photo-resist pattern through rear exposure 有权
标题翻译：在通过后曝光形成光刻胶图案之后，在具有预定线宽的残留图案的LCD装置中制造和修复短缺陷的方法
公开(公告)号：US07649609B2
公开(公告)日：2010-01-19
申请号：US11445193
申请日：2006-06-02
申请人： Soon Sung Yoo , Heung Lyul Cho
发明人： Soon Sung Yoo , Heung Lyul Cho
IPC分类号： G02F1/13
CPC分类号： G02F1/136259
摘要： A method for repairing a short defect according to the present invention includes forming a first conductive pattern on a substrate, forming a photo-resist pattern on the first conductive pattern using a rear exposure for the first conductive pattern being shorted by a residue pattern, and removing the residue pattern exposed through the photo-resist pattern.
摘要翻译：根据本发明的用于修复短缺陷的方法包括在衬底上形成第一导电图案，在第一导电图案上使用后曝光形成第一导电图案的残留图案短路的光刻胶图案，以及去除通过光刻胶图案曝光的残留图案。

33. 发明授权

US07781156B2 Printing plate, method of fabricating the same, and method of fabricating flat panel display using the same 有权
标题翻译：印版，其制造方法以及使用其制造平板显示器的方法
公开(公告)号：US07781156B2
公开(公告)日：2010-08-24
申请号：US11413571
申请日：2006-04-28
申请人： Soon Sung Yoo , Youn Gyoung Chang , Heung Lyul Cho
发明人： Soon Sung Yoo , Youn Gyoung Chang , Heung Lyul Cho
IPC分类号： G03C11/00 , G03F1/00 , H01L21/00
CPC分类号： B41N1/006 , B41C1/00 , B41M3/003 , B41N1/04 , B41N1/06 , B82Y10/00 , B82Y40/00 , G03F7/0002 , H01L27/1214 , H01L27/1288 , H01L27/3244 , H01L51/0004 , H01L51/56 , H05K3/0079 , H05K3/1275 , H05K2203/0143 , H05K2203/0534 , H05K2203/0537
摘要： A method of fabricating a printing plate includes: preparing a substrate; forming a metal layer on an entire surface of the substrate; forming a resist pattern on the metal layer, the resist pattern having a fine pattern exposing a portion of the metal layer; wet etching the exposed metal layer, and removing the resist pattern to form a metal layer pattern exposing a portion of the substrate; wet etching the exposed substrate, and removing the metal layer pattern to form a recessed pattern; and forming a compensation layer on an entire surface of the substrate where the recessed pattern is formed.
摘要翻译：印版的制造方法包括：准备基板; 在所述基板的整个表面上形成金属层; 在所述金属层上形成抗蚀剂图案，所述抗蚀剂图案具有暴露所述金属层的一部分的微细图案; 湿蚀刻暴露的金属层，以及去除抗蚀剂图案以形成暴露基板的一部分的金属层图案; 湿蚀刻暴露的衬底，并且去除金属层图案以形成凹陷图案; 以及在形成凹陷图案的基板的整个表面上形成补偿层。

34. 发明授权

US07202500B2 Thin film transistor array substrate and method of manufacturing the same 有权
标题翻译：薄膜晶体管阵列基板及其制造方法
公开(公告)号：US07202500B2
公开(公告)日：2007-04-10
申请号：US10958264
申请日：2004-10-06
申请人： Soon Sung Yoo , Heung Lyul Cho
发明人： Soon Sung Yoo , Heung Lyul Cho
IPC分类号： H01L29/04
CPC分类号： H01L27/1248 , H01L27/124 , H01L27/1255 , H01L29/458
摘要： A thin film transistor array substrate includes a gate pattern on a substrate. The gate pattern includes a gate electrode, a gate line connected to the gate electrode, and a lower gate pad electrode connected to the gate line. A source/drain pattern includes a source electrode and a drain electrode, a data line connected to the source electrode, and a lower data pad electrode connected to the data line. A semiconductor pattern is formed beneath the source/drain pattern. A transparent electrode pattern includes a pixel electrode connected to the drain electrode, an upper gate pad electrode connected to the lower gate pad electrode, and an upper data pad electrode connected to the lower data pad electrode. The thin film array substrate further includes a gate insulating pattern and a passivation film pattern stacked at remaining areas excluding areas within which the transparent electrode pattern is formed.
摘要翻译：薄膜晶体管阵列基板在基板上包括栅极图案。栅极图案包括栅电极，连接到栅电极的栅极线和连接到栅极线的下栅极焊盘电极。源极/漏极图案包括源电极和漏电极，连接到源电极的数据线和连接到数据线的下数据焊盘电极。在源极/漏极图案之下形成半导体图案。透明电极图案包括连接到漏电极的像素电极，连接到下栅极焊盘电极的上栅极焊盘电极和连接到下数据焊盘电极的上数据焊盘电极。薄膜阵列基板还包括层叠在除了形成透明电极图案的区域之外的其余区域的栅极绝缘图案和钝化膜图案。

35. 发明授权

US07166498B2 Thin film transistor array substrate and manufacturing method of the same 有权
公开(公告)号：US07166498B2
公开(公告)日：2007-01-23
申请号：US10705913
申请日：2003-11-13
申请人： Soon Sung Yoo , Youn Gyoung Chang , Heung Lyul Cho
发明人： Soon Sung Yoo , Youn Gyoung Chang , Heung Lyul Cho
IPC分类号： H01L21/00
CPC分类号： H01L27/124 , G02F1/13458 , G02F1/136213 , G02F1/136227 , G02F2001/136236 , H01L27/1214 , H01L27/1255 , H01L27/1288 , Y10S438/942
摘要： A thin film transistor array substrate has a gate electrode of the thin film transistor, a gate line connected to the gate electrode, and a gate pad connected to the gate line; a source/drain pattern including a source electrode and a drain electrode of the thin film transistor, a data line connected to the source electrode, a data pad connected to the data line, a storage electrode formed and superimposed with the gate line; a semiconductor pattern formed in low part of the substrate; a transparent electrode pattern including a pixel electrode connected to the drain electrode and the storage electrode, a gate pad protection electrode covering the gate pad, and a data pad protection electrode covering the data pad; and a protection pattern and a gate insulation pattern stacked in a region other than the region where the transparent electrode pattern is formed.

36. 发明授权

US07608541B2 Method of forming fine pattern, liquid crystal display device having a fine pattern and fabricating method thereof 有权
标题翻译：形成精细图案的方法，具有精细图案的液晶显示装置及其制造方法
公开(公告)号：US07608541B2
公开(公告)日：2009-10-27
申请号：US11451482
申请日：2006-06-13
申请人： Soon Sung Yoo , Heung Lyul Cho
发明人： Soon Sung Yoo , Heung Lyul Cho
IPC分类号： H01L21/302
CPC分类号： G02F1/13439 , G02F1/134363 , G03F7/40
摘要： A method of forming fine pattern includes providing a film, forming a photo-resist pattern on the film, ashing the photo-resist pattern and patterning the film by using the ashed photo-resist pattern as a mask.
摘要翻译：形成精细图案的方法包括提供膜，在膜上形成光致抗蚀剂图案，使光刻胶图案灰化并通过使用灰化的光致抗蚀剂图案作为掩模来图案化膜。

37. 发明授权

US07576822B2 Thin film transistor substrate using horizontal electric field and fabricating method thereof 有权
标题翻译：使用水平电场的薄膜晶体管基板及其制造方法
公开(公告)号：US07576822B2
公开(公告)日：2009-08-18
申请号：US10978431
申请日：2004-11-02
申请人： Soon Sung Yoo , Heung Lyul Cho
发明人： Soon Sung Yoo , Heung Lyul Cho
IPC分类号： G02F1/1343
CPC分类号： G02F1/13439 , G02F1/134363 , G02F1/136286 , G02F2001/136295
摘要： A thin film transistor substrate structure for using a horizontal electric field includes a substrate; a gate line and a common line formed parallel with each other from a first conductive layer on the substrate; a gate insulating film formed on the substrate, the gate line and the first common line; a data line formed from a second conductive layer on the gate insulating film, the data line crossing the gate line and the common line to define a pixel area; a thin film transistor connected to the gate line and the data line; a protective film covering the data line and the thin film transistor; a common electrode formed connected to the common line from a third conductive layer, the common electrode being disposed within a first hole through the protective film and the gate insulating film; and a pixel electrode connected to the thin film transistor and formed from a third conductive layer, the pixel electrode being disposed within a second hole through the protective film and the gate insulating film at the pixel area, the pixel electrode and the common electrode being disposed to define a horizontal electric field.
摘要翻译：用于使用水平电场的薄膜晶体管衬底结构包括：衬底; 由基板上的第一导电层彼此平行地形成的栅极线和公共线; 形成在基板上的栅极绝缘膜，栅极线和第一公共线; 由栅极绝缘膜上的第二导电层形成的数据线，与栅极线和公共线交叉的数据线，以限定像素区域; 连接到栅极线和数据线的薄膜晶体管; 覆盖数据线和薄膜晶体管的保护膜; 从第三导电层连接到公共线的公共电极，公共电极设置在通过保护膜和栅极绝缘膜的第一孔内; 以及像素电极，与所述薄膜晶体管连接，由第三导电层形成，所述像素电极配置在所述像素区域内的所述保护膜和所述栅极绝缘膜的第二孔内，所述像素电极和所述公共电极被配置以定义水平电场。

38. 发明授权

US07573556B2 In-plane switching mode liquid crystal display device and method of manufacturing the same 有权
标题翻译：面内切换模式液晶显示装置及其制造方法
公开(公告)号：US07573556B2
公开(公告)日：2009-08-11
申请号：US11477385
申请日：2006-06-30
申请人： Soon Sung Yoo , Heung Lyul Cho
发明人： Soon Sung Yoo , Heung Lyul Cho
IPC分类号： G02F1/1343
CPC分类号： G02F1/134363 , G02F2201/40
摘要： A method of manufacturing an in-plane switching mode liquid crystal display device includes forming an insulation layer on a substrate, patterning a resist layer on the insulation layer, etching the insulation layer to form an insulation layer pattern having tapered edges, forming electrode layers on exposed surfaces of the substrate, the tapered edges, and the resist layer, etching the electrode layers formed on the exposed surfaces and on the resist layer, and removing the resist layer to form the common electrode and the pixel electrode with slopes and that are arranged parallel to each other on the tapered edges of the insulation layer. The common electrode and the pixel electrode each have a width less than 1 μm, which increases aperture ratio and transmittance.
摘要翻译：一种面内切换模式液晶显示装置的制造方法包括在基板上形成绝缘层，在绝缘层上形成抗蚀剂层，蚀刻绝缘层，形成具有锥形边缘的绝缘层图案，形成电极层衬底的暴露表面，锥形边缘和抗蚀剂层，蚀刻形成在暴露表面和抗蚀剂层上的电极层，并且去除抗蚀剂层以形成具有斜面的公共电极和像素电极，并且布置在绝缘层的锥形边缘上彼此平行。公共电极和像素电极各自具有小于1um的宽度，这增加了开口率和透射率。

39. 发明授权

US07492430B2 In-plane switching mode liquid crystal display device and method of manufacturing the same 有权
标题翻译：面内切换模式液晶显示装置及其制造方法
公开(公告)号：US07492430B2
公开(公告)日：2009-02-17
申请号：US11474498
申请日：2006-06-26
申请人： Heung Lyul Cho , Soon Sung Yoo
发明人： Heung Lyul Cho , Soon Sung Yoo
IPC分类号： G02F1/1343 , G02F1/13
CPC分类号： G02F1/134363 , G02F2201/123 , G02F2201/40
摘要： A method of manufacturing an IPS switching mode liquid crystal display device includes forming a first insulation layer on a substrate, forming an electrode layer on the substrate containing the first insulation layer, forming a second insulation layer on the electrode layer, etching the second insulation layer such that the second insulation layer remains on sides of the first insulation layer, and etching the electrode layer using the remaining second insulation layer as a mask to form a plurality of electrodes. The plurality of electrodes are formed to have widths of about 0.1 μm to 2 μm, thus aperture ratio and transmittance are increased.
摘要翻译：一种制造IPS开关模式液晶显示装置的方法包括在基板上形成第一绝缘层，在包含第一绝缘层的基板上形成电极层，在电极层上形成第二绝缘层，蚀刻第二绝缘层使得第二绝缘层保留在第一绝缘层的侧面上，并且使用剩余的第二绝缘层作为掩模来蚀刻电极层以形成多个电极。多个电极形成为具有约0.1μm至2μm的宽度，因此孔径比和透射率增加。

40. 发明授权

US07488632B2 Thin film transistor substrate for display device and fabricating method thereof 有权
标题翻译：用于显示装置的薄膜晶体管基板及其制造方法
公开(公告)号：US07488632B2
公开(公告)日：2009-02-10
申请号：US11713046
申请日：2007-03-02
申请人： Byung Chul Ahn , Soon Sung Yoo , Heung Lyul Cho
发明人： Byung Chul Ahn , Soon Sung Yoo , Heung Lyul Cho
IPC分类号： H01L29/15 , G02F1/1365
CPC分类号： G02F1/136227 , G02F1/136213 , H01L27/124 , H01L27/1255 , H01L27/1288
摘要： A thin film transistor (TFT) substrate is fabricated in three mask processes. In a first mask process, a gate line and a gate electrode are formed. In a second mask process, a data line, a source electrode, a drain electrode, a semiconductor layer, and a first upper storage electrode overlapping the gate line are formed from a gate insulating film, undoped and doped amorphous silicon layers, and a data metal layer. In a third mask process, a pixel hole is formed through protective and gate insulating films within and outside a pixel area, the first upper storage electrode is partially removed, a pixel electrode contacts a side of the drain electrode within the pixel hole at the pixel area, and a second upper storage electrode contacts a side of the first upper storage electrode in the pixel hole outside the pixel area.
摘要翻译：在三个掩模工艺中制造薄膜晶体管（TFT）衬底。在第一掩模工艺中，形成栅极线和栅电极。在第二掩模处理中，从栅极绝缘膜，未掺杂和掺杂的非晶硅层形成数据线，源电极，漏极，半导体层和与栅极线重叠的第一上部存储电极，以及数据金属层。在第三掩模处理中，通过像素区域内和外部的保护栅极绝缘膜形成像素孔，部分地去除第一上部存储电极，像素电极在像素的像素孔内接触漏电极的一侧并且第二上部存储电极接触像素区域外的像素孔中的第一上部存储电极的一侧。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式