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31. 发明申请

US20060040437A1 Methods of forming field effect transistors 有权
公开(公告)号：US20060040437A1
公开(公告)日：2006-02-23
申请号：US10925100
申请日：2004-08-23
申请人： Gurtej Sandhu , H. Manning , Cem Basceri
发明人： Gurtej Sandhu , H. Manning , Cem Basceri
IPC分类号： H01L21/337
CPC分类号： H01L29/66666 , H01L29/7827
摘要： A mass of material is formed over a semiconductor substrate. Semiconductive material is formed laterally proximate the mass of material. A space is provided laterally between the mass of material and the semiconductive material. The space comprises an outermost portion and a portion immediately adjacent thereto. The outermost portion has a maximum lateral width which is greater than that of the adjacent portion. Gate dielectric material and conductive gate material are formed within the space. The gate dielectric material and the conductive gate material in combination fill the adjacent portion of the space but do not fill the outermost portion of the space. At least the conductive gate material is etched from at least a majority of the outermost portion of the space. Source/drain regions are formed operatively proximate the conductive gate material and the semiconductive material is used as a channel region of the field effect transistor.

32. 发明申请

US20050287780A1 Semiconductor constructions 有权
标题翻译：半导体结构
公开(公告)号：US20050287780A1
公开(公告)日：2005-12-29
申请号：US11188050
申请日：2005-07-22
申请人： H. Manning , Thomas Graettinger , Marsela Pontoh
发明人： H. Manning , Thomas Graettinger , Marsela Pontoh
IPC分类号： H01L21/02 , H01L21/3205 , H01L21/334 , H01L21/8242 , H01L27/02 , H01L27/108
CPC分类号： H01L28/91 , H01L27/0207 , H01L27/10817 , H01L27/10852 , H01L27/10894 , H01L29/66181
摘要： The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some of the containers, and subsequently the insulative material is removed to expose outer surfaces of the containers. The retaining structure can alleviate toppling or other loss of structural integrity of the container structures. The electrically conductive containers correspond to first capacitor electrodes. After the outer sidewalls of the containers are exposed, dielectric material is formed within the containers and along the exposed outer sidewalls. Subsequently, a second capacitor electrode is formed over the dielectric material. The first and second capacitor electrodes, together with the dielectric material, form a plurality of capacitor devices.
摘要翻译：本发明包括半导体结构，并且还包括形成多个电容器器件的方法。本发明的示例性方法包括在绝缘材料的开口内形成导电储存节点材料以形成导电容器。形成与至少一些容器物理接触的保持结构格子，随后去除绝缘材料以露出容器的外表面。保持结构可以减轻容器结构的结构完整性的倒塌或其它损失。导电容器对应于第一电容器电极。在容器的外侧壁暴露之后，电介质材料形成在容器内并沿外露的外侧壁。随后，在电介质材料上形成第二电容器电极。第一和第二电容器电极与电介质材料一起形成多个电容器器件。

33. 发明申请

US20050207256A1 Semiconductor devices, capacitor antifuses, dynamic random access memories, and cell plate bias connection methods 有权
标题翻译：半导体器件，电容器反熔丝，动态随机存取存储器和单元板偏置连接方法
公开(公告)号：US20050207256A1
公开(公告)日：2005-09-22
申请号：US11129630
申请日：2005-05-13
申请人： H. Manning
发明人： H. Manning
IPC分类号： G11C5/00 , G11C11/4074 , G11C17/16 , G11C17/18 , H01L23/525 , H01L27/108 , H01L29/00
CPC分类号： G11C11/4074 , G11C17/16 , G11C17/18 , H01L23/5252 , H01L27/10814 , H01L27/10897 , H01L2924/0002 , H01L2924/00
摘要： In one aspect, a semiconductor device includes an array of memory cells. Individual memory cells of the array include a capacitor having first and second electrodes, a dielectric layer disposed between the first and second electrodes. Select individual capacitors are energized so as to blow the dielectric layer to establish a connection between the first and second electrodes such that, after blowing the dielectric layer, the second electrode is coupled to a cell plate generator establishing a bias connection therebetween. Cell plate bias connection methods are also described.
摘要翻译：一方面，一种半导体器件包括一组存储单元。阵列的单个存储单元包括具有第一和第二电极的电容器，设置在第一和第二电极之间的电介质层。选择各个电容器通电以便吹动电介质层以建立第一和第二电极之间的连接，使得在吹制电介质层之后，第二电极耦合到电池板发生器，从而在它们之间建立偏置连接。还描述了单元板偏置连接方法。

34. 发明申请

US20070202677A1 Contact formation 审中-公开
标题翻译：接触层
公开(公告)号：US20070202677A1
公开(公告)日：2007-08-30
申请号：US11363661
申请日：2006-02-27
申请人： James Mathew , H. Manning
发明人： James Mathew , H. Manning
IPC分类号： H01L21/44
CPC分类号： H01L21/76804 , H01L21/76801 , H01L21/76831 , H01L27/0207 , H01L27/10855 , H01L27/10888
摘要： The present disclosure includes various method, circuit, device, and system embodiments. One such method embodiment includes creating a trench in an insulator stack material having a portion of the trench positioned between two of a number of gates and depositing a spacer material to at least one side surface of the trench. This method also includes depositing a conductive material into the trench and depositing a cap material into the trench.
摘要翻译：本公开包括各种方法，电路，设备和系统实施例。一种这样的方法实施例包括在绝缘体堆叠材料中形成沟槽，其具有位于多个栅极中的两个之间的沟槽的一部分，并且将间隔物材料沉积到沟槽的至少一个侧表面。该方法还包括将导电材料沉积到沟槽中并将盖材料沉积到沟槽中。

35. 发明申请

US20070173030A1 Methods of forming a plurality of capacitors 失效
公开(公告)号：US20070173030A1
公开(公告)日：2007-07-26
申请号：US11724500
申请日：2007-03-14
申请人： H. Manning
发明人： H. Manning
IPC分类号： H01L21/20 , H01L21/8242
CPC分类号： H01L28/91 , H01L27/0207 , H01L27/10814 , H01L27/10817 , H01L27/10852
摘要： The invention includes methods of forming a plurality of capacitors. In one implementation, a plurality of capacitor electrode openings is formed over a substrate. Individual of the capacitor electrode openings are bounded on a first pair of opposing sides by a first capacitor electrode-forming material at one elevation and on a second pair of opposing sides by a different second capacitor electrode-forming material at the one elevation. Individual capacitor electrodes are formed within individual of the capacitor electrode openings. The capacitor electrodes are incorporated into a plurality of capacitors. Other aspects and implementations are contemplated.

36. 发明申请

US20070165199A1 Immersion photolithography scanner 有权
标题翻译：浸入式光刻扫描仪
公开(公告)号：US20070165199A1
公开(公告)日：2007-07-19
申请号：US11335251
申请日：2006-01-18
申请人： H. Manning
发明人： H. Manning
IPC分类号： G03B27/42
CPC分类号： G03F7/70358 , G03F7/70341
摘要： An immersion photolithography system includes a lens system positioned to focus radiation emitted from the radiation source onto a workpiece or wafer on a stage. A liquid supply system provides liquid between the lens of the lens system closest to the wafer. A seal element encloses a volume of liquid which keeps the lower or wetted surface of the lens wet. The seal element may be located at a lens parking location adjacent to the stage. The system provides an improved way for keeping the lens wet between exposure processing.
摘要翻译：浸没式光刻系统包括透镜系统，其被定位成将从辐射源发射的辐射聚焦到台上的工件或晶片上。液体供应系统在最接近晶片的透镜系统的透镜之间提供液体。密封元件包围一定体积的液体，其保持透镜的下部或底部表面湿润。密封元件可以位于与舞台相邻的镜头停车位置。该系统提供了在曝光处理之间保持透镜湿润的改进方式。

37. 发明申请

US20070015359A1 Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects 有权
公开(公告)号：US20070015359A1
公开(公告)日：2007-01-18
申请号：US11525762
申请日：2006-09-21
申请人： Cem Basceri , Gurtej Sandhu , H. Manning
发明人： Cem Basceri , Gurtej Sandhu , H. Manning
IPC分类号： H01L21/44
CPC分类号： H01L21/76823 , H01L21/28512 , H01L21/76895 , Y10T428/12542
摘要： The invention comprises methods of forming a conductive contact to a source/drain region of a field effect transistor, and methods of forming local interconnects. In one implementation, a method of forming a conductive contact to a source/drain region of a field effect transistor includes providing gate dielectric material intermediate a transistor gate and a channel region of a field effect transistor. At least some of the gate dielectric material extends to be received over at least one source/drain region of the field effect transistor. The gate dielectric material received over the one source/drain region is exposed to conditions effective to change it from being electrically insulative to being electrically conductive and in conductive contact with the one source/drain region. Other aspects and implementations are contemplated.

38. 发明申请

US20060261440A1 Methods of forming a plurality of capacitors, and integrated circuitry comprising a pair of capacitors 有权
标题翻译：形成多个电容器的方法以及包括一对电容器的集成电路
公开(公告)号：US20060261440A1
公开(公告)日：2006-11-23
申请号：US11131575
申请日：2005-05-18
申请人： H. Manning
发明人： H. Manning
IPC分类号： H01L29/00 , H01L21/00 , H01L21/8242
CPC分类号： H01L27/0805 , H01L27/101 , H01L27/10808 , H01L27/10852 , H01L28/90 , H01L28/91
摘要： The invention includes methods and integrated circuitry. Pillars project outwardly from openings in a first material over individual capacitor storage node locations. Insulative material is deposited over the first material laterally about sidewalls of the projecting pillars, and is anisotropically etched effective to expose underlying first material and leave electrically insulative material received laterally about the sidewalls of the projecting pillars. Openings are formed within a second material to the pillars. The pillars are etched from the substrate through the openings in the second material, and individual capacitor electrodes are formed within the openings in electrical connection with the storage node locations. The individual capacitor electrodes have the anisotropically etched insulative material received laterally about their outer sidewalls. The individual capacitor electrodes are incorporated into a plurality of capacitors. Other implementations and aspects are contemplated.
摘要翻译：本发明包括方法和集成电路。支柱从单个电容器存储节点位置的第一材料的开口向外突出。绝缘材料在突出柱的侧壁周围横向沉积在第一材料上，并且被各向异性蚀刻有效地暴露下面的第一材料并且留下横向于突出支柱的侧壁横向接收的电绝缘材料。开口形成在支柱的第二材料内。支柱通过第二材料中的开口从衬底上蚀刻出来，并且单独的电容器电极形成在与存储节点位置电连接的开口内。单独的电容器电极具有各向异性蚀刻的绝缘材料，其横向地围绕其外侧壁接收。各个电容器电极被并入到多个电容器中。考虑其他实现和方面。

39. 发明申请

US20060249776A1 Memory cell, device, system and method for forming same 有权
标题翻译：存储单元，器件，系统及其形成方法
公开(公告)号：US20060249776A1
公开(公告)日：2006-11-09
申请号：US11122854
申请日：2005-05-05
申请人： H. Manning , David Wells
发明人： H. Manning , David Wells
IPC分类号： H01L29/76 , H01L21/20
CPC分类号： H01L27/10885 , H01L27/0207 , H01L27/10823
摘要： A memory cell, device, and system include a memory cell having a shared digitline, a storage capacitor, and a plurality of access transistors configured to selectively electrically couple the storage capacitor with the shared digitline. The digitline couples with adjacent memory cells and the access transistors selects which adjacent memory cell is coupled to the shared digitline. A method of forming the memory cell includes forming a buried digitline in the substrate and a vertical pillar in the substrate immediately adjacent to the buried digitline. A dual gate transistor is formed on the vertical pillar with a first end electrically coupled to the buried digitline and a second end coupled to a storage capacitor formed thereto.
摘要翻译：存储器单元，器件和系统包括具有共享数字线的存储单元，存储电容器和被配置为选择性地将存储电容器与共享数字线电耦合的多个存取晶体管。数字线与相邻存储单元耦合，并且存取晶体管选择哪个相邻的存储单元耦合到共享数字线。形成存储单元的方法包括在衬底中形成掩埋的数字线，并且在与衬底数字线紧邻的衬底中形成垂直柱。双栅晶体管形成在垂直柱上，第一端电耦合到掩埋数字线，第二端耦合到形成于其上的存储电容器。

40. 发明申请

US20060246697A1 Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects 有权
公开(公告)号：US20060246697A1
公开(公告)日：2006-11-02
申请号：US11478715
申请日：2006-06-30
申请人： Cem Basceri , Gurtei Sandhu , H. Manning
发明人： Cem Basceri , Gurtei Sandhu , H. Manning
IPC分类号： H01L21/44
CPC分类号： H01L21/76823 , H01L21/28512 , H01L21/76895 , Y10T428/12542
摘要： The invention comprises methods of forming a conductive contact to a source/drain region of a field effect transistor, and methods of forming local interconnects. In one implementation, a method of forming a conductive contact to a source/drain region of a field effect transistor includes providing gate dielectric material intermediate a transistor gate and a channel region of a field effect transistor. At least some of the gate dielectric material extends to be received over at least one source/drain region of the field effect transistor. The gate dielectric material received over the one source/drain region is exposed to conditions effective to change it from being electrically insulative to being electrically conductive and in conductive contact with the one source/drain region. Other aspects and implementations are contemplated.

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