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31. 发明申请

US20120039109A1 Memory Cells, Non-Volatile Memory Arrays, Methods Of Operating Memory Cells, Methods Of Reading To And Writing From A Memory Cell, And Methods Of Programming A Memory Cell 有权
标题翻译：存储单元，非易失性存储器阵列，操作存储器单元的方法，从存储器单元读取和写入的方法以及编程存储单元的方法
公开(公告)号：US20120039109A1
公开(公告)日：2012-02-16
申请号：US12855624
申请日：2010-08-12
申请人： Bhaskar Srinivasan , Gurtej S. Sandhu
发明人： Bhaskar Srinivasan , Gurtej S. Sandhu
IPC分类号： G11C11/00
CPC分类号： G11C13/0002 , G11C13/0007 , G11C13/0011 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C2213/12 , G11C2213/32 , G11C2213/34 , G11C2213/52 , G11C2213/56 , G11C2213/77 , H01L27/101 , H01L45/08 , H01L45/085 , H01L45/1206
摘要： In one aspect, a method of operating a memory cell includes using different electrodes to change a programmed state of the memory cell than are used to read the programmed state of the memory cell. In one aspect, a memory cell includes first and second opposing electrodes having material received there-between. The material has first and second lateral regions of different composition relative one another. One of the first and second lateral regions is received along one of two laterally opposing edges of the material. Another of the first and second lateral regions is received along the other of said two laterally opposing edges of the material. At least one of the first and second lateral regions is capable of being repeatedly programmed to at least two different resistance states. Other aspects and implementations are disclosed.
摘要翻译：一方面，操作存储单元的方法包括使用不同的电极来改变存储器单元的编程状态，而不是用于读取存储器单元的编程状态。在一个方面，存储单元包括第一和第二相对电极，其间具有接收在其间的材料。该材料具有彼此不同组成的第一和第二横向区域。第一和第二横向区域中的一个沿材料的两个横向相对的边缘中的一个接收。第一和第二横向区域中的另一个沿着材料的所述两个横向相对的边缘中的另一个被容纳。第一和第二横向区域中的至少一个能够被重复编程至至少两个不同的阻力状态。公开了其他方面和实现。

32. 发明申请

US20110069529A1 Methods Of Reading And Using Memory Cells 有权
标题翻译：阅读和使用记忆单元的方法
公开(公告)号：US20110069529A1
公开(公告)日：2011-03-24
申请号：US12564265
申请日：2009-09-22
申请人： Bhaskar Srinivasan , Gurtej S. Sandhu
发明人： Bhaskar Srinivasan , Gurtej S. Sandhu
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C13/004 , G11C13/0002 , G11C13/0007 , G11C13/0061 , G11C2013/0052 , G11C2213/72
摘要： Some embodiments include methods of reading memory cells. The memory cells have a write operation that occurs only if a voltage of sufficient absolute value is applied for a sufficient duration of time; and the reading is conducted with a pulse that is of too short of a time duration to be sufficient for the write operation. In some embodiments, the pulse utilized for the reading may have an absolute value of voltage that is greater than or equal to the voltage utilized for the write operation. In some embodiments, the memory cells may comprise non-ohmic devices; such as memristors and diodes.
摘要翻译：一些实施例包括读取存储器单元的方法。存储器单元具有写入操作，只有当足够的绝对值的电压施加足够的持续时间时才发生; 并且读取是用太短的持续时间的脉冲来进行的，以足以用于写入操作。在一些实施例中，用于读取的脉冲可以具有大于或等于用于写入操作的电压的绝对值。在一些实施例中，存储器单元可以包括非欧姆器件; 如忆阻器和二极管。

33. 发明申请

US20100330770A1 Diodes, And Methods Of Forming Diodes 有权
标题翻译：二极管和形成二极管的方法
公开(公告)号：US20100330770A1
公开(公告)日：2010-12-30
申请号：US12875007
申请日：2010-09-02
申请人： Gurtej S. Sandhu , Bhaskar Srinivasan
发明人： Gurtej S. Sandhu , Bhaskar Srinivasan
IPC分类号： H01L21/02
CPC分类号： H01L45/00 , Y10S257/91 , Y10S438/90 , Y10S438/902 , Y10S438/983
摘要： Some embodiments include methods of forming diodes. The methods may include oxidation of an upper surface of a conductive electrode to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of an oxidizable material over a conductive electrode, and subsequent oxidation of the oxidizable material to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of a metal halide layer over a conductive electrode. Some embodiments include diodes that contain a metal halide layer between a pair of diode electrodes.
摘要翻译：一些实施例包括形成二极管的方法。所述方法可以包括氧化导电电极的上表面以在导电电极上形成氧化物层。在一些实施方案中，所述方法可包括在导电电极上形成可氧化材料，以及随后氧化可氧化材料以在导电电极上形成氧化物层。在一些实施例中，所述方法可包括在导电电极上形成金属卤化物层。一些实施例包括在一对二极管电极之间包含金属卤化物层的二极管。

34. 发明申请

US20090294967A1 Diodes, And Methods Of Forming Diodes 有权
标题翻译：二极管和形成二极管的方法
公开(公告)号：US20090294967A1
公开(公告)日：2009-12-03
申请号：US12128334
申请日：2008-05-28
申请人： Gurtej S. Sandhu , Bhaskar Srinivasan
发明人： Gurtej S. Sandhu , Bhaskar Srinivasan
IPC分类号： H01L29/66 , H01L21/04
CPC分类号： H01L45/00 , Y10S257/91 , Y10S438/90 , Y10S438/902 , Y10S438/983
摘要： Some embodiments include methods of forming diodes. The methods may include oxidation of an upper surface of a conductive electrode to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of an oxidizable material over a conductive electrode, and subsequent oxidation of the oxidizable material to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of a metal halide layer over a conductive electrode. Some embodiments include diodes that contain a metal halide layer between a pair of diode electrodes.
摘要翻译：一些实施例包括形成二极管的方法。所述方法可以包括氧化导电电极的上表面以在导电电极上形成氧化物层。在一些实施方案中，所述方法可包括在导电电极上形成可氧化材料，以及随后氧化可氧化材料以在导电电极上形成氧化物层。在一些实施例中，所述方法可包括在导电电极上形成金属卤化物层。一些实施例包括在一对二极管电极之间包含金属卤化物层的二极管。

35. 发明授权

US09099314B2 Pitch multiplication spacers and methods of forming the same 有权
标题翻译：间距倍增器及其形成方法
公开(公告)号：US09099314B2
公开(公告)日：2015-08-04
申请号：US12827506
申请日：2010-06-30
申请人： Gurtej S. Sandhu , Kirk D. Prall
发明人： Gurtej S. Sandhu , Kirk D. Prall
IPC分类号： H01L21/3213 , H01L21/033 , H01L21/308 , H01L21/3205
CPC分类号： H01L21/67063 , H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/32053 , H01L21/32134
摘要： Spacers in a pitch multiplication process are formed without performing a spacer etch. Rather, the mandrels are formed over a substrate and then the sides of the mandrels are reacted, e.g., in an oxidization, nitridation, or silicidation step, to form a material that can be selectively removed relative to the unreacted portions of the mandrel. The unreacted portions are selectively removed to leave a pattern of free-standing spacers. The free-standing spacers can serve as a mask for subsequent processing steps, such as etching the substrate.
摘要翻译：在不执行间隔物蚀刻的情况下形成间距倍增过程中的间隔物。相反，心轴形成在衬底上，然后心轴的侧面例如在氧化，氮化或硅化步骤中反应，以形成相对于心轴的未反应部分可以选择性去除的材料。选择性地去除未反应部分以留下独立间隔物的图案。独立的间隔物可以用作后续处理步骤的掩模，例如蚀刻基底。

36. 发明授权

US08999492B2 Method to produce nanometer-sized features with directed assembly of block copolymers 有权
标题翻译：通过嵌段共聚物的定向组装制备纳米尺寸特征的方法
公开(公告)号：US08999492B2
公开(公告)日：2015-04-07
申请号：US12026214
申请日：2008-02-05
申请人： Dan B. Millward , Gurtej S. Sandhu
发明人： Dan B. Millward , Gurtej S. Sandhu
IPC分类号： G03G7/00 , B05D5/02 , C08F2/46 , C03C25/68 , G03F7/00 , B81C99/00 , B82Y10/00 , B05D1/28 , B82Y30/00 , B82Y40/00
CPC分类号： B41N1/08 , B05D1/283 , B41N3/036 , B81C99/009 , B81C2201/0149 , B82Y10/00 , B82Y30/00 , B82Y40/00 , G03F7/0002 , G03F7/0017 , Y02C20/30 , Y10T428/24802
摘要： Methods for fabricating stamps and systems for patterning a substrate, and devices resulting from those methods are provided.
摘要翻译：提供用于制造用于图案化衬底的印记和系统的方法以及由这些方法产生的器件。

37. 发明授权

US08946903B2 Electrically conductive laminate structure containing graphene region 有权
标题翻译：导电层压结构
公开(公告)号：US08946903B2
公开(公告)日：2015-02-03
申请号：US12833074
申请日：2010-07-09
申请人： Gurtej S. Sandhu
发明人： Gurtej S. Sandhu
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01B13/00 , H01L21/768 , H01L23/532
CPC分类号： H01L23/53276 , H01L21/76805 , H01L21/76843 , H01L21/76847 , H01L21/76865 , H01L21/76877 , H01L23/53209 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Some embodiments include electrical interconnects. The interconnects may contain laminate structures having a graphene region sandwiched between non-graphene regions. In some embodiments the graphene and non-graphene regions may be nested within one another. In some embodiments an electrically insulative material may be over an upper surface of the laminate structure, and an opening may extend through the insulative material to a portion of the laminate structure. Electrically conductive material may be within the opening and in electrical contact with at least one of the non-graphene regions of the laminate structure. Some embodiments include methods of forming electrical interconnects in which non-graphene material and graphene are alternately formed within a trench to form nested non-graphene and graphene regions.
摘要翻译：一些实施例包括电互连。互连可以包含层压结构，其具有夹在非石墨烯区域之间的石墨烯区域。在一些实施例中，石墨烯和非石墨烯区域可以彼此嵌套。在一些实施例中，电绝缘材料可以在层压结构的上表面之上，并且开口可以延伸穿过绝缘材料到层压结构的一部分。导电材料可以在开口内并且与层压结构的非石墨烯区域中的至少一个电接触。一些实施例包括形成电互连的方法，其中在沟槽内交替形成非石墨烯材料和石墨烯以形成嵌套的非石墨烯和石墨烯区域。

38. 发明授权

US08923038B2 Memory cells, semiconductor device structures, memory systems, and methods of fabrication 有权
标题翻译：存储单元，半导体器件结构，存储器系统和制造方法
公开(公告)号：US08923038B2
公开(公告)日：2014-12-30
申请号：US13527173
申请日：2012-06-19
申请人： Witold Kula , Gurtej S. Sandhu , Stephen J. Kramer
发明人： Witold Kula , Gurtej S. Sandhu , Stephen J. Kramer
IPC分类号： G11C11/15 , G11C11/00 , H01L29/82
CPC分类号： H01L43/08 , G11C11/161 , H01L27/228 , H01L43/02 , H01L43/12
摘要： Methods of forming magnetic memory cells are disclosed. Magnetic and non-magnetic materials are formed into a primal precursor structure in an initial stress state of essentially no strain, compressive strain, or tensile strain. A stress-compensating material, e.g., a non-sacrificial, conductive material, is formed to be disposed on the primal precursor structure to form a stress-compensated precursor structure in a net beneficial stress state. Thereafter, the stress-compensated precursor structure may be patterned to form a cell core of a memory cell. The net beneficial stress state of the stress-compensated precursor structure lends to formation of one or more magnetic regions, in the cell core, exhibiting a vertical magnetic orientation without deteriorating a magnetic strength of the one or more magnetic regions. Also disclosed are memory cells, memory cell structures, semiconductor device structures, and spin torque transfer magnetic random access memory (STT-MRAM) systems.
摘要翻译：公开了形成磁存储器单元的方法。磁性和非磁性材料在基本上没有应变，压缩应变或拉伸应变的初始应力状态下形成原始前体结构。形成应力补偿材料，例如非牺牲导电材料，以设置在原始前体结构上以在净有益应力状态下形成应力补偿前体结构。此后，应力补偿前体结构可以被图案化以形成存储单元的单元芯。应力补偿前体结构的净有益应力状态有助于在电池芯中形成一个或多个磁性区域，呈现垂直磁性取向而不会使一个或多个磁性区域的磁强度恶化。还公开了存储器单元，存储单元结构，半导体器件结构和自旋转矩传递磁随机存取存储器（STT-MRAM）系统。

39. 发明授权

US08772841B2 Reactive metal implated oxide based memory 有权
标题翻译：反应性金属注入氧化物基记忆
公开(公告)号：US08772841B2
公开(公告)日：2014-07-08
申请号：US13616307
申请日：2012-09-14
申请人： D.V. Nirmal Ramaswamy , Gurtej S. Sandhu
发明人： D.V. Nirmal Ramaswamy , Gurtej S. Sandhu
IPC分类号： H01L29/66 , H01L29/94 , H01L21/70 , H01L27/108
CPC分类号： H01L45/08 , G11C13/0007 , H01L45/145 , H01L45/165
摘要： Methods, devices, and systems associated with oxide based memory can include a method of forming an oxide based memory cell. Forming an oxide based memory cell can include forming a first conductive element, forming an oxide over the first conductive element, implanting a reactive metal into the oxide, and forming a second conductive element over the oxide.
摘要翻译：与基于氧化物的存储器相关联的方法，装置和系统可以包括形成基于氧化物的存储器单元的方法。形成基于氧化物的存储单元可以包括形成第一导电元件，在第一导电元件上形成氧化物，将活性金属注入到氧化物中，以及在氧化物上形成第二导电元件。

40. 发明授权

US08686535B2 Trench isolation implantation 有权
标题翻译：沟槽隔离植入
公开(公告)号：US08686535B2
公开(公告)日：2014-04-01
申请号：US12758488
申请日：2010-04-12
申请人： Gurtej S. Sandhu , John A. Smythe, III
发明人： Gurtej S. Sandhu , John A. Smythe, III
IPC分类号： H01L21/70
CPC分类号： H01L21/76237 , G11C11/401 , H01L27/10844 , H01L27/11517
摘要： Embodiments of the disclosure include a shallow trench isolation structure having a dielectric material with energetic species implanted to a predetermined depth of the dielectric material. Embodiments further include methods of fabricating the trench structures with the implant of energetic species to the predetermined depth. In various embodiments the implant of energetic species is used to densify the dielectric material to provide a uniform wet etch rate across the surface of the dielectric material. Embodiments also include memory devices, integrated circuits, and electronic systems that include shallow trench isolation structures having the dielectric material with the high flux of energetic species implanted to the predetermined depth of the dielectric material.
摘要翻译：本公开的实施例包括浅沟槽隔离结构，其具有将能量物质注入电介质材料的预定深度的电介质材料。实施例还包括使能量物质的植入物到预定深度制造沟槽结构的方法。在各种实施例中，能量物质的注入用于致密化电介质材料，以提供穿过电介质材料表面的均匀的湿蚀刻速率。实施例还包括存储器件，集成电路和电子系统，其包括浅沟槽隔离结构，其具有植入到介电材料的预定深度的高能量物质的高通量的电介质材料。

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