会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 33. 发明申请
    • METHOD OF MAKING EYEGLASS FRAME BY INJECTION MOLDING
    • 通过注射成型制造眼睑框架的方法
    • US20130069274A1
    • 2013-03-21
    • US13239384
    • 2011-09-21
    • Yan ZhangYin Sang Lam
    • Yan ZhangYin Sang Lam
    • B29C45/14
    • B29C45/1671B29C45/14688B29C45/14811B29C2045/14237B29C2045/14721B29K2995/0074B29L2012/005G02C5/008
    • Disclosed herein are methods of making an eyeglass frame comprising a frame front and/or a pair of temples, wherein each of the frame front and temples independently comprises a top layer and a patterned layer having the shape of a frame front and/or a pair of temples, and wherein the patterned layer comprises a laminate and a design pattern on a surface of the laminate, the method comprising the steps of: a) providing a mold having a cavity, wherein the shape of the cavity corresponds to the shape of the frame front and/or the temples; b) setting the patterned layer for the frame front and/or the temples in the mold; and c) injecting a melt of a first polymer composition into the cavity to form the top layer. In some embodiments, at least one of the frame front and temples further comprises a bottom layer.
    • 本文公开了制造包括框架前部和/或一对镜腿的眼镜框的方法,其中框架前部和镜腿中的每一个独立地包括顶层和具有框架前部和/或对的形状的图案化层 的图案层,并且其中所述图案层包括层压体和在所述层压体的表面上的设计图案,所述方法包括以下步骤:a)提供具有空腔的模具,其中所述空腔的形状对应于 框架前部和/或寺庙; b)将框架前部和/或模具中的图案层设置在模具中; 和c)将第一聚合物组合物的熔体注入所述空腔中以形成顶层。 在一些实施例中,框架前部和镜腿中的至少一个还包括底层。
    • 37. 发明授权
    • Home gateway device
    • 家庭网关设备
    • US08036235B2
    • 2011-10-11
    • US12299005
    • 2007-04-29
    • Han LiYan ZhangJinglei LiuCongxing OuyangBing WeiYuhong Huang
    • Han LiYan ZhangJinglei LiuCongxing OuyangBing WeiYuhong Huang
    • H04L12/28H04L12/56
    • H04L12/66H04L29/12367H04L29/12584H04L29/12839H04L61/2514H04L61/2596H04L61/6022
    • The present invention relates to a home gateway device. The home gateway device comprises a main processor generate information process signals and control signals, a computer bus signal Ethernet adapter unit connected to the main processor to translate the signals between computer bus signals and Ethernet signals, an Ethernet frame process unit connected to the computer bus signal Ethernet adapter unit to forward the received Ethernet frame based on a prearranged policy, an inner interface unit connected to the Ethernet frame process unit to connect interior networking devices, and an outer communication module connected to the main processor and the Ethernet frame process unit. The centralized control of the home gateway device of the present invention can decrease the requirement that the household appliances should be intellectualized, thereby achieving more flexible control and reducing the cost. The uplink and downlink Ethernet signals are controlled by using the prearranged policy to separate the Ethernet signals for Internet access from the Ethernet signals of the household information appliances, and avoid the threat due to the unsafe factors.
    • 家庭网关设备技术领域本发明涉及家庭网关设备。 家庭网关设备包括主处理器产生信息处理信号和控制信号,连接到主处理器的计算机总线信号以太网适配器单元以在计算机总线信号和以太网信号之间转换信号,连接到计算机总线的以太网帧处理单元 信号以太网适配器单元,用于基于预先布置的策略转发所接收的以太网帧,连接到以太网帧处理单元的内部接口单元以连接内部网络设备,以及连接到主处理器和以太网帧处理单元的外部通信模块。 本发明的家庭网关设备的集中控制可以降低家用电器智能化的要求,从而实现更灵活的控制和降低成本。 上行链路和下行链路以太网信号通过使用预先安排的策略来控制,以将以太网信号与互联网接入的以太网信号与家用信息设备的以太网信号分开,并避免由于不安全因素引起的威胁。
    • 39. 发明申请
    • Large-Scale Lateral Nanowire Arrays Nanogenerators
    • 大型横向纳米线阵列纳米发生器
    • US20110107569A1
    • 2011-05-12
    • US12943499
    • 2010-11-10
    • Zhong L. WangChen XuYong QinGuang ZhuRusen YangYoufan HuYan Zhang
    • Zhong L. WangChen XuYong QinGuang ZhuRusen YangYoufan HuYan Zhang
    • H02N2/18
    • H01L41/316H02N2/18
    • In a method of making a generating device, a plurality of spaced apart elongated seed members are deposited onto a surface of a flexible non-conductive substrate. An elongated conductive layer is applied to a top surface and a first side of each seed member, thereby leaving an exposed second side opposite the first side. A plurality of elongated piezoelectric nanostructures is grown laterally from the second side of each seed layer. A second conductive material is deposited onto the substrate adjacent each elongated first conductive layer so as to be coupled the distal end of each of the plurality of elongated piezoelectric nanostructures. The second conductive material is selected so as to form a Schottky barrier between the second conductive material and the distal end of each of the plurality of elongated piezoelectric nanostructures and so as to form an electrical contact with the first conductive layer.
    • 在制造发生装置的方法中,多个间隔开的细长种子构件沉积在柔性非导电基底的表面上。 将细长的导电层施加到每个种子构件的顶表面和第一侧,从而留下与第一侧相对的暴露的第二侧。 多个细长的压电纳米结构从每个种子层的第二侧横向生长。 第二导电材料沉积在每个细长的第一导电层上的衬底上,以便耦合到多个细长压电纳米结构中的每一个的远端。 选择第二导电材料以在第二导电材料和多个细长压电纳米结构中的每一个的远端之间形成肖特基势垒,并且与第一导电层形成电接触。
    • 40. 发明授权
    • Glitch-free clock signal multiplexer circuit and method of operation
    • 无毛刺时钟信号多路复用电路及其操作方法
    • US07911239B2
    • 2011-03-22
    • US11453733
    • 2006-06-14
    • Martin Saint-LaurentYan Zhang
    • Martin Saint-LaurentYan Zhang
    • H03K17/00G06F1/04
    • H04L7/0083G06F1/08
    • Techniques for the design and use of a digital signal processor, including for processing transmissions in a communications system. Reduced glitch occurs in switching from a first clock input to a second clock input driving a clock multiplexer. The clock multiplexer receives a first clock input and provides a clock output and determines a low phase output level in the clock output. For a limited period of time, a low phase output level is forced. The clock multiplexer receives a second clock input and determines a low phase input level in the second clock input signal. Switching to providing the clock output in response to the second clock input occurs during the low phase input level in the second clock input signal. Then, the output of the clock multiplexer follows the phase level of the second clock signal.
    • 用于设计和使用数字信号处理器的技术,包括用于处理通信系统中的传输。 在从第一时钟输入切换到驱动时钟多路复用器的第二时钟输入时发生减小的毛刺。 时钟多路复用器接收第一时钟输入并提供时钟输出并确定时钟输出中的低相位输出电平。 在有限的时间段内,强制执行低相输出电平。 时钟复用器接收第二时钟输入并确定第二时钟输入信号中的低相位输入电平。 响应于第二时钟输入而提供时钟输出的切换发生在第二时钟输入信号中的低相位输入电平期间。 然后,时钟复用器的输出跟随第二时钟信号的相位电平。