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31. 发明授权

US08564897B1 Systems and methods for enhanced sync mark detection 有权
标题翻译：用于增强同步标记检测的系统和方法
公开(公告)号：US08564897B1
公开(公告)日：2013-10-22
申请号：US13529572
申请日：2012-06-21
申请人： Shaohua Yang , Yoon L. Liow , Wu Chang
发明人： Shaohua Yang , Yoon L. Liow , Wu Chang
IPC分类号： G11B5/09
CPC分类号： G11B5/59688 , G11B5/59616
摘要： The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for detecting patterns in a data stream.
摘要翻译：本发明涉及用于数据处理的系统和方法，更具体地涉及用于检测数据流中的模式的系统和方法。

32. 发明授权

US08499231B2 Systems and methods for reduced format non-binary decoding 有权
标题翻译：缩减格式非二进制解码的系统和方法
公开(公告)号：US08499231B2
公开(公告)日：2013-07-30
申请号：US13167771
申请日：2011-06-24
申请人： Zongwang Li , Wu Chang , Chung-Li Wang , Changyou Xu , Shaohua Yang , Yang Han
发明人： Zongwang Li , Wu Chang , Chung-Li Wang , Changyou Xu , Shaohua Yang , Yang Han
IPC分类号： G06F11/00 , H03M13/00
CPC分类号： H03M13/1171 , H03M13/27 , H03M13/3723 , H03M13/612
摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detecting circuit having: a first vector translation circuit, a second vector translation circuit, and a data detector core circuit. The data detecting circuit is operable to receive an input data set and at least one input vector in a first format. The at least one input vector corresponds to a portion of the input data set. The first vector translation circuit is operable to translate the at least one vector to a second format. The data detector core circuit is operable to apply a data detection algorithm to the input data set and the at least one vector in the second format to yield a detected output. The second vector translation circuit operable to translate a derivative of the detected output to the first format to yield an output vector.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。作为示例，公开了一种数据处理电路，其包括具有第一向量转换电路，第二向量转换电路和数据检测器核心电路的数据检测电路。数据检测电路可操作以接收第一格式的输入数据集和至少一个输入向量。至少一个输入向量对应于输入数据集的一部分。第一向量翻译电路可操作以将至少一个向量转换为第二格式。数据检测器核心电路可操作以将数据检测算法应用于输入数据集和第二格式的至少一个向量以产生检测到的输出。第二向量转换电路可操作以将检测到的输出的导数转换为第一格式以产生输出向量。

33. 发明授权

US08560929B2 Systems and methods for non-binary decoding 有权
标题翻译：用于非二进制解码的系统和方法
公开(公告)号：US08560929B2
公开(公告)日：2013-10-15
申请号：US13167764
申请日：2011-06-24
申请人： Zongwang Li , Wu Chang , Chung-Li Wang , Changyou Xu , Shaohua Yang , Yang Han
发明人： Zongwang Li , Wu Chang , Chung-Li Wang , Changyou Xu , Shaohua Yang , Yang Han
IPC分类号： H03M13/00
CPC分类号： H04L1/0047 , H03M13/1171 , H03M13/134 , H03M13/255
摘要： Various embodiments of the present invention provide systems and methods for data processing. A data processing circuit is disclosed that includes: a data detector circuit, a first symbol constrained arrangement circuit, and a second symbol constrained arrangement circuit. The data detector circuit is operable to apply a data detection algorithm to a combination of a first input data set and a decoded data set to yield a detected output that includes a number of non-binary symbols. The first symbol constrained arrangement circuit is operable to receive the detected output and to re-arrange the detected output in accordance with a first arrangement algorithm to yield a re-arranged output. The bits for at least one non-binary symbol from the detected output are maintained together in the re-arranged output. The second symbol constrained arrangement circuit is operable to receive a second input data set and to re-arrange the second data input in accordance with a second arrangement algorithm to yield the decoded data set. The bits for at least one non-binary symbol from the second input data set are maintained together in the decoded data set output.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。公开了一种数据处理电路，其包括：数据检测器电路，第一符号约束布置电路和第二符号约束布置电路。数据检测器电路可操作以将数据检测算法应用于第一输入数据集合和解码数据集合的组合，以产生包括多个非二进制符号的检测输出。第一符号约束布置电路可操作以接收检测到的输出并根据第一布置算法重新布置检测的输出以产生重新排列的输出。来自检测到的输出的至少一个非二进制符号的位在重新布置的输出中保持在一起。第二符号约束布置电路可操作以接收第二输入数据集并且根据第二布置算法重排第二数据输入以产生解码数据集。用于来自第二输入数据集的至少一个非二进制符号的位在解码数据集输出中一起保持。

34. 发明申请

US20120331370A1 Systems and Methods for Non-Binary Decoding 有权
标题翻译：非二进制解码的系统和方法
公开(公告)号：US20120331370A1
公开(公告)日：2012-12-27
申请号：US13167764
申请日：2011-06-24
申请人： Zongwang Li , Wu Chang , Chung-Li Wang , Changyou Xu , Shaohua Yang , Yang Han
发明人： Zongwang Li , Wu Chang , Chung-Li Wang , Changyou Xu , Shaohua Yang , Yang Han
IPC分类号： G06F11/08
CPC分类号： H04L1/0047 , H03M13/1171 , H03M13/134 , H03M13/255
摘要： Various embodiments of the present invention provide systems and methods for data processing. A data processing circuit is disclosed that includes: a data detector circuit, a first symbol constrained arrangement circuit, and a second symbol constrained arrangement circuit. The data detector circuit is operable to apply a data detection algorithm to a combination of a first input data set and a decoded data set to yield a detected output that includes a number of non-binary symbols. The first symbol constrained arrangement circuit is operable to receive the detected output and to re-arrange the detected output in accordance with a first arrangement algorithm to yield a re-arranged output. The bits for at least one non-binary symbol from the detected output are maintained together in the re-arranged output. The second symbol constrained arrangement circuit is operable to receive a second input data set and to re-arrange the second data input in accordance with a second arrangement algorithm to yield the decoded data set. The bits for at least one non-binary symbol from the second input data set are maintained together in the decoded data set output.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。公开了一种数据处理电路，其包括：数据检测器电路，第一符号约束布置电路和第二符号约束布置电路。数据检测器电路可操作以将数据检测算法应用于第一输入数据集合和解码数据集合的组合，以产生包括多个非二进制符号的检测输出。第一符号约束布置电路可操作以接收检测到的输出并根据第一布置算法重新布置检测的输出以产生重新排列的输出。来自检测到的输出的至少一个非二进制符号的位在重新布置的输出中保持在一起。第二符号约束排列电路可操作以接收第二输入数据集并且根据第二布置算法重新布置第二数据输入以产生解码的数据集。用于来自第二输入数据集的至少一个非二进制符号的位在解码数据集输出中一起保持。

35. 发明授权

US08819527B2 Systems and methods for mitigating stubborn errors in a data processing system 有权
标题翻译：减轻数据处理系统中顽固错误的系统和方法
公开(公告)号：US08819527B2
公开(公告)日：2014-08-26
申请号：US13186234
申请日：2011-07-19
申请人： Haitao Xia , Wu Chang , Shaohua Yang
发明人： Haitao Xia , Wu Chang , Shaohua Yang
IPC分类号： H03M13/03 , H03M13/11 , H03M13/15 , H03M13/29 , H03M13/37 , H03M13/41 , H03M13/39 , H03M13/45 , H03M13/00
CPC分类号： H03M13/1102 , H03M13/1515 , H03M13/2957 , H03M13/3746 , H03M13/41 , H03M13/42 , H03M13/451 , H03M13/458 , H03M13/6331
摘要： Various embodiments of the present invention provide data processing circuits that include: a data detector circuit, a data decoder circuit, and a modification circuit. The data detector circuit is operable to apply a data detection algorithm to a data input to yield a detected output. The data decoder circuit is operable to apply a data decode algorithm to a decode input to yield a decoded output. The decode input is selected between at least the detected output, and a modified version of the detected output. The modification circuit is operable to receive the detected output and to provide the modified version of the detected output.
摘要翻译：本发明的各种实施例提供数据处理电路，其包括：数据检测器电路，数据解码器电路和修改电路。数据检测器电路可操作以将数据检测算法应用于数据输入以产生检测到的输出。数据解码器电路可操作以将数据解码算法应用于解码输入以产生解码输出。在至少检测到的输出和检测到的输出的修改版本之间选择解码输入。修改电路可操作以接收所检测的输出并提供所检测输出的修改版本。

36. 发明授权

US08788921B2 Detector with soft pruning 有权
标题翻译：检测器软修剪
公开(公告)号：US08788921B2
公开(公告)日：2014-07-22
申请号：US13283549
申请日：2011-10-27
申请人： Wu Chang , Victor Krachkovsky , Shaohua Yang , Haitao Xia
发明人： Wu Chang , Victor Krachkovsky , Shaohua Yang , Haitao Xia
IPC分类号： H03M13/03
CPC分类号： H03M13/2957 , G11B20/10268 , H03M13/1102 , H03M13/6331 , H03M13/6561
摘要： Various embodiments of the present invention provide apparatuses, systems and methods for data detection in a detector with soft pruning. For example, a data detector is disclosed that includes a branch metric calculator operable to calculate branch metrics for transitions between states in a trellis for the data detector, and a branch metric offset circuit operable to apply branch metric offsets to the branch metrics to yield soft pruned branch metrics. The branch metric offsets comprise a range of probability values from zero percent to one hundred percent.
摘要翻译：本发明的各种实施例提供了具有软修剪的检测器中的数据检测的装置，系统和方法。例如，公开了一种数据检测器，其包括分支度量计算器，其可操作以计算用于数据检测器的网格中的状态之间的转换的分支度量;以及分支度量偏移电路，其可操作以将分支度量偏移应用于分支度量以产生软修剪分支指标。分支度量偏移包括从零百分之一百百分率的概率值的范围。

37. 发明申请

US20140082450A1 Systems and Methods for Efficient Transfer in Iterative Processing 审中-公开
标题翻译：迭代处理中有效传输的系统和方法
公开(公告)号：US20140082450A1
公开(公告)日：2014-03-20
申请号：US13621341
申请日：2012-09-17
申请人： Shaohua Yang , Wu Chang , Razmik Karabed , Victor Krachkovsky
发明人： Shaohua Yang , Wu Chang , Razmik Karabed , Victor Krachkovsky
IPC分类号： H03M13/11
CPC分类号： H03M13/1154 , H03M13/1102 , H03M13/1515 , H03M13/6331 , H03M13/6356
摘要： Embodiments of the present inventions are related to systems and methods for data processing, and more particularly to systems and methods for format efficient data processing.
摘要翻译：本发明的实施例涉及用于数据处理的系统和方法，更具体地涉及用于格式化数据处理的系统和方法。

38. 发明申请

US20130111306A1 Detector with Soft Pruning 有权
标题翻译：检测器软修剪
公开(公告)号：US20130111306A1
公开(公告)日：2013-05-02
申请号：US13283549
申请日：2011-10-27
申请人： Wu Chang , Victor Krachkovsky , Shaohua Yang , Haitao Xia
发明人： Wu Chang , Victor Krachkovsky , Shaohua Yang , Haitao Xia
IPC分类号： H03M13/25 , G06F11/10
CPC分类号： H03M13/2957 , G11B20/10268 , H03M13/1102 , H03M13/6331 , H03M13/6561
摘要： Various embodiments of the present invention provide apparatuses, systems and methods for data detection in a detector with soft pruning. For example, a data detector is disclosed that includes a branch metric calculator operable to calculate branch metrics for transitions between states in a trellis for the data detector, and a branch metric offset circuit operable to apply branch metric offsets to the branch metrics to yield soft pruned branch metrics. The branch metric offsets comprise a range of probability values from zero percent to one hundred percent.
摘要翻译：本发明的各种实施例提供了具有软修剪的检测器中的数据检测的装置，系统和方法。例如，公开了一种数据检测器，其包括分支度量计算器，其可操作以计算用于数据检测器的网格中的状态之间的转换的分支度量;以及分支度量偏移电路，其可操作以将分支度量偏移应用于分支度量以产生软修剪分支指标。分支度量偏移包括从零百分之一百百分率的概率值的范围。

39. 发明申请

US20120331363A1 Systems and Methods for Reduced Format Non-Binary Decoding 有权
标题翻译：减少格式非二进制解码的系统和方法
公开(公告)号：US20120331363A1
公开(公告)日：2012-12-27
申请号：US13167771
申请日：2011-06-24
申请人： Zongwang Li , Wu Chang , Chung-Li Wang , Changyou Xu , Shaohua Yang , Yang Han
发明人： Zongwang Li , Wu Chang , Chung-Li Wang , Changyou Xu , Shaohua Yang , Yang Han
IPC分类号： G06F11/07
CPC分类号： H03M13/1171 , H03M13/27 , H03M13/3723 , H03M13/612
摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detecting circuit having: a first vector translation circuit, a second vector translation circuit, and a data detector core circuit. The data detecting circuit is operable to receive an input data set and at least one input vector in a first format. The at least one input vector corresponds to a portion of the input data set. The first vector translation circuit is operable to translate the at least one vector to a second format. The data detector core circuit is operable to apply a data detection algorithm to the input data set and the at least one vector in the second format to yield a detected output. The second vector translation circuit operable to translate a derivative of the detected output to the first format to yield an output vector.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。作为示例，公开了一种数据处理电路，其包括具有第一向量转换电路，第二向量转换电路和数据检测器核心电路的数据检测电路。数据检测电路可操作以接收第一格式的输入数据集和至少一个输入向量。至少一个输入向量对应于输入数据集的一部分。第一向量翻译电路可操作以将至少一个向量转换为第二格式。数据检测器核心电路可操作以将数据检测算法应用于输入数据集和第二格式的至少一个向量以产生检测到的输出。第二向量转换电路可操作以将检测到的输出的导数转换为第一格式以产生输出向量。

40. 发明申请

US20130124950A1 Low Latency Enumeration Endec 有权
标题翻译：低延迟枚举Endec
公开(公告)号：US20130124950A1
公开(公告)日：2013-05-16
申请号：US13296022
申请日：2011-11-14
申请人： Victor Krachkovsky , Wu Chang , Razmik Karabed , Shaohua Yang
发明人： Victor Krachkovsky , Wu Chang , Razmik Karabed , Shaohua Yang
IPC分类号： G06F11/07
CPC分类号： H03M13/1102 , G11B2020/1287 , G11B2020/1476 , G11B2220/2516 , H03M13/33 , H03M13/6331
摘要： Various embodiments of the present invention provide apparatuses and methods for encoding and decoding data.
摘要翻译：本发明的各种实施例提供用于对数据进行编码和解码的装置和方法。

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