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    • 31. 发明申请
    • Dual-band detector system for x-ray imaging of biological samples
    • 用于生物样品X射线成像的双波段检测器系统
    • US20050226376A1
    • 2005-10-13
    • US10990198
    • 2004-11-16
    • Wenbing YunYuxin WangDavid Scott
    • Wenbing YunYuxin WangDavid Scott
    • G01J1/42G01N23/04G01T1/00G01T1/20G01T1/202
    • G01T1/202G01T1/2018G21K2207/005
    • A digital dual-band detector functions as an imaging platform capable of extracting hard and soft tissue images, for example. The detector has a first detector system comprising a first scintillator for converting x-rays from a sample to an first optical signal, and a first detector for detecting the first optical signal in combination with a second detector system comprising a second scintillator for converting x-rays from the sample and passing through the first scintillator to a second optical signal, and a second detector for detecting the second optical signal. The detector can facilitate the implementation and deployment of recent developments and can permit low cost practical deployment in clinical applications as well as biomedical research applications where significant improvement in spatial resolution and image contrast is required. These improvements include an increase of feature detection sensitivity by more than an order of magnitude, simultaneous imaging of soft and hard (or mineralized) tissue at extremely high time resolution that is not limited by detector readout speed, and an increase in the signal to noise ratio of images by reducing the substantial background resulting from Compton scattering.
    • 例如,数字双频带检测器用作能够提取硬和软组织图像的成像平台。 检测器具有第一检测器系统,该第一检测器系统包括用于将来自样品的x射线转换成第一光信号的第一闪烁器,以及用于与第二检测器系统一起检测第一光信号的第一检测器,该第二检测器系统包括第二闪烁器, 来自样品的光并通过第一闪烁体到第二光信号;以及第二检测器,用于检测第二光信号。 检测器可以促进近期发展的实施和部署,并且可以允许临床应用中的低成本实际部署以及需要显着改善空间分辨率和图像对比度的生物医学研究应用。 这些改进包括将特征检测灵敏度提高超过一个数量级,以非常高的时间分辨率同时成像软和硬(或矿化的)组织,其不受检测器读出速度的限制,并且信号与噪声的增加 通过减少由康普顿散射产生的实质背景,图像的比例。
    • 33. 发明申请
    • Design method and system for optimum performance in integrated circuits that use power management
    • 使用电源管理的集成电路中的最佳性能设计方法和系统
    • US20050149887A1
    • 2005-07-07
    • US10993815
    • 2004-11-19
    • Amitava ChatterjeeDavid ScottTheodore HoustonSong ZhaoShaoping TangZhiqiang Wu
    • Amitava ChatterjeeDavid ScottTheodore HoustonSong ZhaoShaoping TangZhiqiang Wu
    • G06F17/50
    • G06F17/505
    • The present invention provides a method (100) of designing a circuit. The method comprises specifying (105) a design parameter for memory transistors and logic transistors and selecting (110) a test retention-mode bias voltage for the memory transistors. The method further comprises determining (115) a first relationship of a retention-mode leakage current and the design parameter at the test retention-mode bias voltage and obtaining (120) a second relationship of an active-mode drive current and the design parameter. The first and second relationships are used (125) to assess whether there is a range of values of the design parameter where the retention-mode leakage current and the active-mode drive current are within a predefined circuit specification. The method also includes adjusting (130) the test retention-mode bias voltage and repeating the determining and the using if the retention-mode total leakage current or the active-mode drive current is outside of the predefined circuit specification.
    • 本发明提供一种设计电路的方法(100)。 该方法包括指定(105)存储晶体管和逻辑晶体管的设计参数,并选择(110)存储晶体管的测试保持模式偏置电压。 所述方法还包括在所述测试保持模式偏置电压下确定(115)保持模式漏电流和所述设计参数的第一关系,并获得(120)所述有源模式驱动电流与所述设计参数的第二关系。 使用第一和第二关系(125)来评估是否存在保持模式漏电流和有源模式驱动电流在预定电路规范内的设计参数值的范围。 该方法还包括调整(130)测试保持模式偏置电压,并重复确定和使用如果保持模式总泄漏电流或有源模式驱动电流超出预定电路规范。
    • 35. 发明申请
    • Slow wave optical waveguide for velocity matched semiconductor modulators
    • 用于速度匹配半导体调制器的慢波光波导
    • US20050094917A1
    • 2005-05-05
    • US10700245
    • 2003-11-03
    • Wenshen WangDavid ScottElizabeth Kunkee
    • Wenshen WangDavid ScottElizabeth Kunkee
    • G02B6/26G02B6/42G02F1/025G02F1/295
    • B82Y20/00B82Y10/00G02F1/025G02F2201/127G02F2201/307G02F2202/32
    • A PIN electro-optical traveling wave modulator (10) including diffraction gratings (34, 36) positioned at opposing sides of an optical waveguide (20) that act to change the propagation pattern of the waveguide (20). The modulator (10) includes an N-type layer (14), a P-type layer (18) and an intrinsic layer (16) acting as the waveguide (20). A metal electrode (26) is in electrical contact with the N-type layer (14), and a metal electrode (30) is in electrical contact with the P-type layer (18). The electrodes (26, 30) define an RF transmission line. An optical wave (22) propagates along the waveguide (20) and interacts with the gratings (34, 36) which slow the optical wave (22) to match its speed to the speed of the RF wave in the transmission line. In one embodiment, the gratings (34, 36) are 2-D gratings formed by vertical holes (38) in the waveguide (20).
    • 一种PIN电光行波调制器(10),其包括位于光波导(20)的相对侧的衍射光栅(34,36),其用于改变波导(20)的传播图案。 调制器(10)包括N型层(14),P型层(18)和用作波导(20)的本征层(16)。 金属电极(26)与N型层(14)电接触,金属电极(30)与P型层(18)电接触。 电极(26,30)限定RF传输线。 光波(22)沿着波导(20)传播并与光栅(34,36)相互作用,光栅(34,36)使光波(22)的速度与传输线中的RF波的速度相匹配。 在一个实施例中,光栅(34,36)是由波导(20)中的垂直孔(38)形成的2-D光栅。
    • 37. 发明授权
    • Parallel processing pattern generation system for an integrated circuit
tester
    • 用于集成电路测试仪的并行处理模式生成系统
    • US6073263A
    • 2000-06-06
    • US960014
    • 1997-10-29
    • Brian J. ArkinGarry C. GilletteDavid Scott
    • Brian J. ArkinGarry C. GilletteDavid Scott
    • G01R31/3183G01R31/3181G01R31/319G06F11/22G06F17/30G01R31/28
    • G01R31/31813G01R31/31921
    • A parallel processing pattern generation system for an integrated circuit tester includes two pattern memories, a main pattern generator, and two auxiliary pattern generators. Each pattern memory may receive and store data patterns from a host computer before the test. All three pattern generators may produce data pattern sequences in a variety of ways by executing separately stored algorithmic programs. The pattern sequences generated by each of the two auxiliary pattern generators separately address the two pattern memories so that either one or both of the two pattern memories may read out pattern data during a test. The main pattern generator includes a routing circuit for receiving as inputs a portion of the pattern data generated by the main pattern generator itself and the pattern data read out of the two pattern memories. The routing circuit, controlled by another portion of the pattern data produced by the main pattern generator, selects from among its inputs on a bit-by-bit, cycle-by-cycle basis to provide pattern data for controlling tester activities during each cycle of a test.
    • 用于集成电路测试器的并行处理模式生成系统包括两个模式存储器,主模式发生器和两个辅助模式发生器。 每个模式存储器可以在测试之前从主计算机接收和存储数据模式。 所有三个模式生成器可以通过执行单独存储的算法程序以各种方式产生数据模式序列。 由两个辅助图形发生器中的每一个生成的图案序列分别地对两个图案存储器进行寻址,使得两个图案存储器中的任一个或两个可以在测试期间读出图案数据。 主模式生成器包括路由电路,用于接收由主模式发生器本身产生的模式数据的一部分和从两个模式存储器读出的模式数据作为输入。 由主模式发生器产生的模式数据的另一部分控制的路由电路在逐位逐周期的基础上从其输入中选择,以提供用于在每个周期期间控制测试者活动的模式数据 一个测试。
    • 38. 发明授权
    • Tracking system
    • 跟踪系统
    • US5457464A
    • 1995-10-10
    • US90131
    • 1993-11-05
    • David ScottBrian C. L. Scott
    • David ScottBrian C. L. Scott
    • H01Q3/12
    • H01Q3/12
    • A tracking system for enabling maintenance of alignment between a receiver of electro-magnetic radiation and a source of electro-magnetic radiation signals, the system comprising: a receiver; a sensor associated, in use, with the receiver to sense the strength of the signal received by the receiver; and an interrupter device, which in use, intermittently interrupts one or more discontinuous eccentric portions of the signal being received by the receiver thereby attenuating the received signal by an extent which is dependent upon the degree of misalignment of the receiver from the transmitter.
    • PCT No.PCT / GB92 / 00079 Sec。 371日期:1993年11月5日 102(e)日期1993年11月5日PCT提交1992年1月14日PCT公布。 公开号WO92 / 12551 日期1992年7月23日。一种跟踪系统,用于维持电磁辐射的接收器与电磁辐射信号源之间的对准,所述系统包括:接收器; 在使用中与接收器相关联的感测器,以感测由接收器接收的信号的强度; 以及在使用中间断地中断由接收器接收的信号的一个或多个不连续偏心部分的断续器装置,从而衰减接收信号的程度,该程度取决于接收器从发射器的未对准程度。
    • 39. 发明授权
    • Pet safety restraint
    • 宠物安全限制
    • US5167203A
    • 1992-12-01
    • US778406
    • 1991-10-17
    • David ScottFrederic StackColeman Stack
    • David ScottFrederic StackColeman Stack
    • A01K1/02A01K27/00
    • A01K1/0263A01K1/0272A01K27/002
    • A pet safety restraint is disclosed for the restraining of a pet in a vehicle equipped with a seat belt. The pet safety restraint includes a harness portion for securement around the body of a pet, the harness portion having a pair of lateral straps for respectively extending along the sides of the pet's body, and an attachment frame for connecting the lateral straps with the vehicle seat belt at spaced apart locations along the seat belt. The attachment frame has at least one seat belt receiving opening and the lateral straps of the harness portion are respectively affixable to the attachment frame at attachment points which are spaced apart in the longitudinal direction of the seat belt. The lateral straps each include a buckle for selective separation of the harness portion from the attachment frame. The pet safety restraint limits forward and lateral movement of pet during head-on and sideways collisions respectively, may be used in both the cargo area and the passenger compartment of the vehicle and is universally usable in combination with different types of seat belts.
    • 公开了一种用于限制配备有安全带的车辆中的宠物的宠物安全限制器。 宠物安全约束包括用于固定在宠物身体周围的线束部分,线束部分具有分别沿着宠物的侧面延伸的一对侧带,以及用于将侧带与车辆座椅连接的附接框架 皮带沿安全带的间隔开位置。 附接框架具有至少一个座椅安全带接收开口,并且线束部分的侧带分别在安全带的纵向方向间隔开的附接点处可附接到附接框架。 侧带每个都包括用于将线束部分与附接框架选择性分离的带扣。 宠物安全限制分别限制宠物在正面和侧面碰撞期间的前后运动,可以在车辆的货物区域和乘客舱中使用,并且可以与不同类型的安全带组合使用。