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31. 发明授权

US07816985B2 Switching amplifiers 有权
标题翻译：开关放大器
公开(公告)号：US07816985B2
公开(公告)日：2010-10-19
申请号：US12270692
申请日：2008-11-13
申请人： Brian E Attwood , Wilson E. Taylor , Larry E. Hand
发明人： Brian E Attwood , Wilson E. Taylor , Larry E. Hand
IPC分类号： H03F3/217
CPC分类号： H03F3/217 , H03F3/2173 , H03F2200/03 , H03F2200/271 , H03F2200/273
摘要： Systems and methods implemented in a switching amplifier for providing consistent, matching switching between top and bottom switching devices in a switching amplifier. One embodiment includes a half-bridge circuit output stage, a driver stage and a transformer. The driver stage, which drives the switches of the output stage, is very fast, has a low propagation delay, and has minimal input capacitance. The transformer drives the drive paths from the transformer inputs to the switches. The transformer avoids resonances within the audio band and at the amplifier switching frequencies, has low and spread free leakage inductance, has enough magnetizing inductance to keep transformer currents low in proportion to the total driver stage current drain, has low core losses at the switching frequency, has minimal inductance change and operates well below its saturation point. The amplifier stage provides a substantially constant amplitude drive signal to the output power switching devices.
摘要翻译：在开关放大器中实现的系统和方法，用于在开关放大器中的顶部和底部开关器件之间提供一致的匹配切换。一个实施例包括半桥电路输出级，驱动级和变压器。驱动输出级开关的驱动级非常快，传播延迟低，输入电容最小。变压器驱动变压器输入到开关的驱动路径。变压器避免了音频频带内的谐振，在放大器开关频率下，具有低和无扩展的漏电感，具有足够的磁化电感，以保持变压器电流与总驱动级电流消耗成比例的低电平，开关频率具有较低的磁芯损耗，具有最小的电感变化，并且运行在其饱和点以下。放大器级向输出功率开关器件提供基本恒定的振幅驱动信号。

32. 发明申请

US20090063828A1 Systems and Methods for Communication between a PC Application and the DSP in a HDA Audio Codec 审中-公开
标题翻译： PC应用程序与HDA音频编解码器中的DSP之间的通信系统和方法
公开(公告)号：US20090063828A1
公开(公告)日：2009-03-05
申请号：US12202356
申请日：2008-09-01
申请人： Daniel L. Chieng , Douglas D. Gephardt , Larry E. Hand , Jeffrey M. Klaas , Adam Zaharias
发明人： Daniel L. Chieng , Douglas D. Gephardt , Larry E. Hand , Jeffrey M. Klaas , Adam Zaharias
IPC分类号： G06F9/315
CPC分类号： G06F3/162
摘要： Systems and methods implemented in a PC for enabling communication between an application executing on the CPU and a DSP that is incorporated into a codec in the High Definition Audio (HDA) system, wherein the communication is carried out via the HDA bus. In one embodiment, an HDA codec includes one or more conventional HDA widgets coupled to a programmable processor such as a DSP. The codec includes a set of registers that are configured to store HDA verbs and data transmitted via the HDA bus. The programmable processor is configured to identify verbs that indicate associated information is a communication from an application executing on the CPU, read the associated information, and process the information according to the associated verbs. The information may be program instructions, parametric data, requests for information, etc.
摘要翻译：在PC中实现的用于实现在CPU上执行的应用程序与被并入高清晰度音频（HDA）系统中的编解码器的DSP之间的通信的系统和方法，其中通过HDA总线进行通信。在一个实施例中，HDA编解码器包括耦合到诸如DSP的可编程处理器的一个或多个常规HDA小部件。编解码器包括一组寄存器，用于存储通过HDA总线传输的HDA动词和数据。可编程处理器被配置为识别指示相关信息的动词是来自在CPU上执行的应用程序的通信，读取相关联的信息，以及根据相关联的动词处理信息。该信息可以是程序指令，参数数据，信息请求等。

33. 发明申请

US20090062948A1 Systems and Methods for Controlling Audio Volume in the Processor of a High Definition Audio Codec 失效
标题翻译：用于控制高分辨率音频编解码器处理器中音频音量的系统和方法
公开(公告)号：US20090062948A1
公开(公告)日：2009-03-05
申请号：US12202355
申请日：2008-09-01
申请人： Daniel L. Chieng , Douglas D. Gephardt , Larry E. Hand , Jeffrey M. Klaas , Adam Zaharias
发明人： Daniel L. Chieng , Douglas D. Gephardt , Larry E. Hand , Jeffrey M. Klaas , Adam Zaharias
IPC分类号： G06F17/00
CPC分类号： H03G3/3089 , G06F3/16 , G10L15/26 , G11B20/10527 , G11B2020/10574 , H03F3/217
摘要： Systems and methods for controlling the audio volume of an audio signal in an HDA codec having a programmable processor such as a DSP, wherein the codec receives digital audio signals and audio volume control verbs over an HDA bus, and the audio volume levels associated with the audio volume control verbs are used by the processor in the generation pulse width modulated (PWM) output signals, thereby controlling the audio volume levels of the output signals. The processor may be configured to adjust non-volume parameters such as PWM deadtime, in addition to adjusting audio volume, based on the audio volume levels. The codec may be implemented in a PC or other system that implements an HDA system that includes the HDA bus and HDA codec.
摘要翻译：用于控制具有诸如DSP的可编程处理器的HDA编解码器中的音频信号的音频音量的系统和方法，其中编解码器通过HDA总线接收数字音频信号和音频音量控制动词，以及与音频音量控制动词由处理器在生成脉宽调制（PWM）输出信号中使用，从而控制输出信号的音频音量。除了根据音频音量水平调整音频音量之外，处理器可以被配置为调整诸如PWM死时间之类的非体积参数。编解码器可以在实现包括HDA总线和HDA编解码器的HDA系统的PC或其他系统中实现。

34. 发明授权

US4724396A Digital audio amplifier 失效
标题翻译：数字音频放大器
公开(公告)号：US4724396A
公开(公告)日：1988-02-09
申请号：US874379
申请日：1986-06-13
申请人： Wilson E. Taylor, Jr. , Larry E. Hand
发明人： Wilson E. Taylor, Jr. , Larry E. Hand
IPC分类号： H03F3/217 , H03F3/38
CPC分类号： H03F3/2171 , H03F2200/66
摘要： A digital amplifier contains a circuit for converting the onset of a clipping condition into a missed pulse in a pulse width modulated pulse train generated from an analog signal and an improved circuit for producing a control voltage proportional to the extent of the clipping condition, which circuit includes a pulse counter for counting a predetermined number of missed pulses in the pulse train and a voltage generator for producing a voltage proportional to the extent of clipping when said predetermined number of missed pulses occurs. The generated voltage is applied to an attenuator for attenuating the analog input signal.
摘要翻译：数字放大器包含用于将削波条件的开始转换为从模拟信号产生的脉冲宽度调制脉冲串中的漏失脉冲的电路和用于产生与限幅条件的程度成比例的控制电压的改进电路，该电路包括用于对脉冲串中的预定数量的错误脉冲进行计数的脉冲计数器和用于产生当发生所述预定数量的错过脉冲时与限幅程度成比例的电压的电压发生器。所产生的电压被施加到用于衰减模拟输入信号的衰减器。

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