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31. 发明授权

US07560350B2 Method for forming strained semiconductor device and method for forming source/drain region 有权
标题翻译：用于形成应变半导体器件的方法和用于形成源极/漏极区域的方法
公开(公告)号：US07560350B2
公开(公告)日：2009-07-14
申请号：US11308643
申请日：2006-04-17
申请人： Chin-I Liao
发明人： Chin-I Liao
IPC分类号： H01L21/336
CPC分类号： H01L29/66636 , H01L21/2254 , H01L29/66575 , H01L29/7848
摘要： A method for forming a strained semiconductor device is described. A substrate including a first semiconductor material and having a first conductivity type is provided. A semiconductor layer of a second conductivity type is formed contacting with the substrate, wherein the semiconductor layer includes the first semiconductor material and a second semiconductor material and has a dopant of the second conductivity type. In-situ annealing is then conducted to diffuse the dopant.
摘要翻译：描述形成应变半导体器件的方法。提供了包括第一半导体材料并具有第一导电类型的衬底。形成与基板接触的第二导电类型的半导体层，其中半导体层包括第一半导体材料和第二半导体材料并具有第二导电类型的掺杂剂。然后进行原位退火以扩散掺杂剂。

32. 发明申请

US20060292007A1 Boat propeller with adjustable blades for adjusting the pitch thereof 有权
标题翻译：具有可调叶片的船用螺旋桨，用于调节桨距
公开(公告)号：US20060292007A1
公开(公告)日：2006-12-28
申请号：US11160414
申请日：2005-06-22
申请人： Huei-Jeng Lin , Chin-I Liao , Yan-Min Guo
发明人： Huei-Jeng Lin , Chin-I Liao , Yan-Min Guo
IPC分类号： B64C11/28
CPC分类号： B63H1/20 , B63H3/04
摘要： A boat propeller comprises a hub formed of a first cylindrical member and a second cylindrical member detachably joined together. The second cylindrical member comprises a plurality of insertion cavities formed in the second cylindrical member, an end of each of the insertion cavities having a plurality of receptacle members. The boat propeller also comprises a plurality of blades equal in number to the number of insertion cavities. Each blade comprises a blade piece portion and an adjustment member, a tip of the adjustment member comprising a positioning member such that the positioning member makes contact with at least one of the receptacle members when the adjustment member is inserted into the corresponding insertion cavity. The positioning member of the adjustment member is selectively matched with one or more of the receptacle members for adjusting a pitch of the blades.
摘要翻译：船用螺旋桨包括由第一圆柱形构件形成的轮毂和可拆卸地接合在一起的第二圆柱形构件。第二圆柱形构件包括形成在第二圆柱形构件中的多个插入空腔，每个插入腔的端部具有多个容器构件。船用螺旋桨还包括与插入孔数相等的多个叶片。每个叶片包括刀片部分和调节构件，调节构件的末端包括定位构件，使得当调节构件插入到相应的插入腔中时，定位构件与至少一个容器构件接触。调整构件的定位构件与一个或多个容纳构件选择性地匹配，用于调节叶片的间距。

33. 发明授权

US08709910B2 Semiconductor process 有权
标题翻译：半导体工艺
公开(公告)号：US08709910B2
公开(公告)日：2014-04-29
申请号：US13459262
申请日：2012-04-30
申请人： Chin-I Liao , Chia-Lin Hsu , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee , Min-Chung Cheng
发明人： Chin-I Liao , Chia-Lin Hsu , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee , Min-Chung Cheng
IPC分类号： H01L21/76
CPC分类号： H01L21/0237 , H01L21/02532 , H01L21/02639 , H01L21/76224 , H01L29/66795
摘要： A semiconductor process includes the following steps. A semiconductor substrate is provided. The semiconductor substrate has a patterned isolation layer and the patterned isolation layer has an opening exposing a silicon area of the semiconductor substrate. A silicon rich layer is formed on the sidewalls of the opening. An epitaxial process is performed to form an epitaxial structure on the silicon area in the opening.
摘要翻译：半导体工艺包括以下步骤。提供半导体衬底。半导体衬底具有图案化隔离层，并且图案化隔离层具有暴露半导体衬底的硅区域的开口。在开口的侧壁上形成富硅层。执行外延工艺以在开口中的硅区域上形成外延结构。

34. 发明申请

US20130341638A1 MULTI-GATE FIELD-EFFECT TRANSISTOR AND PROCESS THEREOF 有权
标题翻译：多栅极场效应晶体管及其工艺
公开(公告)号：US20130341638A1
公开(公告)日：2013-12-26
申请号：US13530127
申请日：2012-06-22
申请人： Chin-I Liao , Chia-Lin Hsu , Ming-Yen Li , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee
发明人： Chin-I Liao , Chia-Lin Hsu , Ming-Yen Li , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee
IPC分类号： H01L29/772 , H01L21/20 , H01L29/161
CPC分类号： H01L29/66795 , H01L29/1054 , H01L29/66484 , H01L29/785
摘要： A Multi-Gate Field-Effect Transistor includes a fin-shaped structure, a gate structure, at least an epitaxial structure and a gradient cap layer. The fin-shaped structure is located on a substrate. The gate structure is disposed across a part of the fin-shaped structure and the substrate. The epitaxial structure is located on the fin-shaped structure beside the gate structure. The gradient cap layer is located on each of the epitaxial structures. The gradient cap layer is a compound semiconductor, and the concentration of one of the ingredients of the compound semiconductor has a gradient distribution decreasing from bottom to top. Moreover, the present invention also provides a Multi-Gate Field-Effect Transistor process forming said Multi-Gate Field-Effect Transistor.
摘要翻译：多栅极场效应晶体管包括鳍状结构，栅极结构，至少外延结构和梯度盖层。鳍状结构位于基板上。栅极结构设置在鳍状结构和衬底的一部分上。外延结构位于栅极结构旁边的鳍状结构上。梯度盖层位于每个外延结构上。梯度盖层是化合物半导体，化合物半导体的成分之一的浓度具有从下到上减小的梯度分布。此外，本发明还提供一种形成所述多栅极场效应晶体管的多栅极场效应晶体管工艺。

35. 发明申请

US20130052778A1 SEMICONDUCTOR PROCESS 有权
标题翻译：半导体工艺
公开(公告)号：US20130052778A1
公开(公告)日：2013-02-28
申请号：US13216259
申请日：2011-08-24
申请人： Chin-I Liao , Chia-Lin Hsu , Ming-Yen Li , Hsin-Huei Wu , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee
发明人： Chin-I Liao , Chia-Lin Hsu , Ming-Yen Li , Hsin-Huei Wu , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee
IPC分类号： H01L21/336
CPC分类号： H01L29/66795 , H01L29/66628
摘要： A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate. An oxide layer is formed on the substrate without the fin-shaped structure being formed thereon. A gate is formed to cover a part of the oxide layer and a part of the fin-shaped structure. An etching process is performed to etch a part of the fin-shaped structure beside the gate, therefore at least a recess is formed in the fin-shaped structure. An epitaxial process is performed to form an epitaxial layer in the recess, wherein the epitaxial layer has a hexagon-shaped profile structure.
摘要翻译：半导体工艺包括以下步骤。提供基板。在基板上形成至少一个鳍状结构。在基板上形成氧化层，而不形成鳍状结构。形成栅极以覆盖氧化物层的一部分和鳍状结构的一部分。进行蚀刻处理以蚀刻栅极旁边的鳍状结构的一部分，因此在鳍状结构中至少形成凹部。执行外延工艺以在凹部中形成外延层，其中外延层具有六边形轮廓结构。

36. 发明授权

US08796695B2 Multi-gate field-effect transistor and process thereof 有权
标题翻译：多栅极场效应晶体管及其工艺
公开(公告)号：US08796695B2
公开(公告)日：2014-08-05
申请号：US13530127
申请日：2012-06-22
申请人： Chin-I Liao , Chia-Lin Hsu , Ming-Yen Li , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee
发明人： Chin-I Liao , Chia-Lin Hsu , Ming-Yen Li , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee
IPC分类号： H01L29/772
CPC分类号： H01L29/66795 , H01L29/1054 , H01L29/66484 , H01L29/785
摘要： A Multi-Gate Field-Effect Transistor includes a fin-shaped structure, a gate structure, at least an epitaxial structure and a gradient cap layer. The fin-shaped structure is located on a substrate. The gate structure is disposed across a part of the fin-shaped structure and the substrate. The epitaxial structure is located on the fin-shaped structure beside the gate structure. The gradient cap layer is located on each of the epitaxial structures. The gradient cap layer is a compound semiconductor, and the concentration of one of the ingredients of the compound semiconductor has a gradient distribution decreasing from bottom to top. Moreover, the present invention also provides a Multi-Gate Field-Effect Transistor process forming said Multi-Gate Field-Effect Transistor.
摘要翻译：多栅极场效应晶体管包括鳍状结构，栅极结构，至少外延结构和梯度盖层。鳍状结构位于基板上。栅极结构设置在鳍状结构和衬底的一部分上。外延结构位于栅极结构旁边的鳍状结构上。梯度盖层位于每个外延结构上。梯度盖层是化合物半导体，化合物半导体的成分之一的浓度具有从下到上减小的梯度分布。此外，本发明还提供一种形成所述多栅极场效应晶体管的多栅极场效应晶体管工艺。

37. 发明申请

US20130288448A1 SEMICONDUCTOR PROCESS 有权
标题翻译：半导体工艺
公开(公告)号：US20130288448A1
公开(公告)日：2013-10-31
申请号：US13459262
申请日：2012-04-30
申请人： Chin-I Liao , Chia-Lin Hsu , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee , Min-Chung Cheng
发明人： Chin-I Liao , Chia-Lin Hsu , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee , Min-Chung Cheng
IPC分类号： H01L21/762
CPC分类号： H01L21/0237 , H01L21/02532 , H01L21/02639 , H01L21/76224 , H01L29/66795
摘要： A semiconductor process includes the following steps. A semiconductor substrate is provided. The semiconductor substrate has a patterned isolation layer and the patterned isolation layer has an opening exposing a silicon area of the semiconductor substrate. A silicon rich layer is formed on the sidewalls of the opening. An epitaxial process is performed to form an epitaxial structure on the silicon area in the opening.
摘要翻译：半导体工艺包括以下步骤。提供半导体衬底。半导体衬底具有图案化隔离层，并且图案化隔离层具有暴露半导体衬底的硅区域的开口。在开口的侧壁上形成富硅层。执行外延工艺以在开口中的硅区域上形成外延结构。

38. 发明授权

US07357686B2 Boat propeller with adjustable blades for adjusting the pitch thereof 有权
标题翻译：具有可调叶片的船用螺旋桨，用于调节桨距
公开(公告)号：US07357686B2
公开(公告)日：2008-04-15
申请号：US11160414
申请日：2005-06-22
申请人： Huei-Jeng Lin , Chin-I Liao , Yan-Min Guo
发明人： Huei-Jeng Lin , Chin-I Liao , Yan-Min Guo
IPC分类号： B63H3/00
CPC分类号： B63H1/20 , B63H3/04
摘要： A boat propeller comprises a hub formed of a first cylindrical member and a second cylindrical member detachably joined together. The second cylindrical member comprises a plurality of insertion cavities formed in the second cylindrical member, an end of each of the insertion cavities having a plurality of receptacle members. The boat propeller also comprises a plurality of blades equal in number to the number of insertion cavities. Each blade comprises a blade piece portion and an adjustment member, a tip of the adjustment member comprising a positioning member such that the positioning member makes contact with at least one of the receptacle members when the adjustment member is inserted into the corresponding insertion cavity. The positioning member of the adjustment member is selectively matched with one or more of the receptacle members for adjusting a pitch of the blades.
摘要翻译：船用螺旋桨包括由第一圆柱形构件形成的轮毂和可拆卸地接合在一起的第二圆柱形构件。第二圆柱形构件包括形成在第二圆柱形构件中的多个插入空腔，每个插入腔的端部具有多个容器构件。船用螺旋桨还包括与插入孔数相等的多个叶片。每个叶片包括刀片部分和调节构件，调节构件的末端包括定位构件，使得当调节构件插入到相应的插入腔中时，定位构件与至少一个容器构件接触。调整构件的定位构件与一个或多个容纳构件选择性地匹配，用于调节叶片的间距。

39. 发明申请

US20120080721A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING THE SAME 审中-公开
标题翻译：半导体结构及其制造方法
公开(公告)号：US20120080721A1
公开(公告)日：2012-04-05
申请号：US12897728
申请日：2010-10-04
申请人： Chin-I Liao , Ching-I Li , Shu-Yen Chan
发明人： Chin-I Liao , Ching-I Li , Shu-Yen Chan
IPC分类号： H01L29/772 , H01L21/335
CPC分类号： H01L21/20 , H01L29/165 , H01L29/66636 , H01L29/78 , H01L29/7848
摘要： A semiconductor structure includes a recess disposed in a substrate, a non-doped epitaxial layer and a doped epitaxial layer. The non-doped epitaxial layer is disposed on the inner surface of the recess and substantially consists of Si and an epitaxial layer. The non-doped epitaxial layer has a sidewall and a bottom which together cover the inner surface. The bottom thickness is not greater than 120% of the sidewall thickness. The non-doped epitaxial layer and the doped epitaxial layer together fill up the recess.
摘要翻译：半导体结构包括设置在衬底中的凹槽，非掺杂外延层和掺杂外延层。非掺杂外延层设置在凹槽的内表面上，并且基本上由Si和外延层组成。非掺杂外延层具有一起覆盖内表面的侧壁和底部。底部厚度不大于侧壁厚度的120％。未掺杂的外延层和掺杂的外延层一起填充凹槽。

40. 外观设计

USD421650S Electrical fan 失效
公开(公告)号：USD421650S
公开(公告)日：2000-03-14
申请号：US101233
申请日：1999-03-01
申请人： Chin-I Liao
设计人： Chin-I Liao

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