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31. 发明专利

GB2475668B Adjustable constant current source with continuous conduction mode ("CCM") and discontinuous conduction mode ("DCM") operation 未知
公开(公告)号：GB2475668B
公开(公告)日：2012-12-19
申请号：GB201105424
申请日：2009-09-25
申请人： CIRRUS LOGIC INC
发明人： MELANSON JOHN L
IPC分类号： H02M3/156 , H02M3/158 , H05B44/00
摘要： A converter system and method of operating a converter system are disclosed. The converter system comprises a converter power stage that can operate in a Discontinuous Conduction Mode (DCM) in a range of output currents and a Continuous Conduction Mode (CCM) in another range of output currents. The converter power stage includes at least an inductor with an inductor value and a control switch. The converter power stage provides an average current. A current controller is coupled to the converter power stage. When the converter power stage operates in DCM, the converter power stage provides the average current and the current controller is configured to measure the inductor value of the inductor. Furthermore, the current controller can also be configured to measure an input-to-output conversion ratio from the converter power stage.

32. 发明专利

GB2527677A Reducing audio artifacts in a system for enhancing dynamic range of audio signal path 未知
公开(公告)号：GB2527677A
公开(公告)日：2015-12-30
申请号：GB201510578
申请日：2015-06-16
申请人： CIRRUS LOGIC INC
发明人： DAS TEJASVI , HE KU , MELANSON JOHN L
IPC分类号： H03G3/00 , H03G3/30 , H03M1/70
摘要： A circuit for providing an output signal to an audio transducer includes a digital path that receives a digital input signal. The digital path includes a selectable digital gain 12 and a DAC 14. The circuit also includes an analogue signal path that receives a converted signal from the DAC 14 and has a selectable analogue gain 16. Responsive to the signal level, a controller 20 predicts the occurrence of an event for changing the digital gain 12 and the analogue gain 16. Having predicted the need to change the gain settings, the controller 20 adjusts the gain near a zero crossing of the signal. The adjustment of gain in both the digital and analogue portions of the signal path allows noise and dynamic range to be improved. The invention aims to minimise audio artefacts such as clicks and pops, by switching the gains at zero crossings of the signal. The controller 16 may also predict the peak trend of a signal envelope (fig.4) and adjust the gain settings accordingly to prevent clipping.

33. 发明专利

GB2519012A Systems and methods for determining location of a mobile device based on an audio signal 未知
公开(公告)号：GB2519012A
公开(公告)日：2015-04-08
申请号：GB201500421
申请日：2013-07-08
申请人： CIRRUS LOGIC INC
发明人： MELANSON JOHN L
IPC分类号： H04M1/725 , G01S5/30
摘要： A mobile device includes a display, a microphone, and a controller all within an enclosure sized and shaped such that the enclosure is readily transported on a person of a user of the mobile device. The microphone is configured to receive an audio signal from an audio signal source. The controller is coupled to the microphone and the display, and configured to, based at least on information included in the audio signal, determine a delay between a transmission of the audio signal from the audio signal source to receipt of the audio signal by the microphone. The controller is further configured to, based at least on the delay, determine a geographical location of the mobile device. The controller is also configured to, based on the geographical location of the mobile device, display geographical information to the display indicative of the geographical location.

34. 发明专利

GB2474994B LED lighting system with accurate current control 未知
公开(公告)号：GB2474994B
公开(公告)日：2013-01-09
申请号：GB201102839
申请日：2009-08-31
申请人： CIRRUS LOGIC INC
发明人： MELANSON JOHN L
IPC分类号： H05B44/00
摘要： A light emitting diode (LED) lighting system and method are disclosed. The LED lighting system and method include an LED controller to accurately control a current in an LED system. The LED controller includes components to calculate, based on the current and an active time period of an LED current time period, an actual charge amount delivered to the LED system wherein the LED current time period is duty cycle modulated at a rate of greater than fifty (50) Hz and to utilize the actual charge amount to modify and provide a desired target charge amount to be delivered during a future active time period of the LED current time period. The LED system and method further involve components to compare the actual charge amount to a desired charge amount for the active time period and compensate for a difference between the actual charge amount and the desired charge amount during the future active time period.

35. 发明专利

GB2451968B Delta sigma modulators with comparator offset noise conversion 未知
公开(公告)号：GB2451968B
公开(公告)日：2012-01-11
申请号：GB0817448
申请日：2007-03-09
申请人： CIRRUS LOGIC INC
发明人： MELANSON JOHN L
IPC分类号： H03M1/06 , H03M3/04
摘要： Quantizers of delta sigma modulators include comparators to quantize a quantizer input signal. Each comparator compares a respective reference signal to the quantizer input signal. A logic processing module determines a quantizer output signal based upon the comparison. During subsequent periods of time, a comparator offset converter alters "reference signal-to-comparator input terminal" associations to reroute respective reference signals from one arrangement of comparator input terminals of at least two (2) of the comparators to a different arrangement of comparator input terminals. The comparator offset converter can randomly alter the reference signal-to-comparator input terminal associations. The comparator offset converter can maintain a 1:1 reference signal-to-comparator input terminal relationship. By maintaining the 1:1 ratio of reference signal-to-comparator input terminal and randomizing the reference signal-to-comparator input terminal associations, the comparator offset converter effectively converts the comparator offset voltage nonlinearities into energies and frequencies that can be constructively processed and improve signal-to-noise ratios.

36. 发明专利

GB2476409A A tracking quantizer in a delta-sigma modulator ADC, with an even number of comparators 未知
公开(公告)号：GB2476409A
公开(公告)日：2011-06-22
申请号：GB201103753
申请日：2007-03-09
申请人： CIRRUS LOGIC INC
发明人： MELANSON JOHN L
IPC分类号： H03M3/04
摘要： The tracking quantizer 500 in a delta-sigma modulator comprises an even number M of comparators 502. Fewer comparators are required than when an odd number of comparators is used, while achieving equivalent quantization performance. Tracking may be achieved by subtracting an estimated quantizer output from the loop filter output (414, figure 4) or by selecting comparator reference signals which track the quantizer output. Dynamic element matching (DEM) may be used to reduce the effect of comparator offset mismatch (figure 6).

37. 发明专利

DE602004013177T2 未知
公开(公告)号：DE602004013177T2
公开(公告)日：2009-06-18
申请号：DE602004013177
申请日：2004-10-08
申请人： CIRRUS LOGIC INC
发明人： MELANSON JOHN L
IPC分类号： H03M7/00 , H03M7/32

38. 发明专利

GB2450646A Delta sigma modulator analog-to-digital converters with multiple threshold comparisons during a delta sigma modulator output cycle 未知
公开(公告)号：GB2450646A
公开(公告)日：2008-12-31
申请号：GB0817442
申请日：2007-03-09
申请人： CIRRUS LOGIC INC
发明人： MELANSON JOHN L
IPC分类号： H03M1/14 , H03M1/38
摘要： The analog-to-digital (ADC) delta sigma modulators in the signal processing systems described utilize comparator number reduction techniques to improve a delta sigma modulator quantizer. The delta sigma modulator generates one quantization output signal per delta sigma modulator output cycle. A quantizer of the delta sigma modulator includes one or more comparators, that each makes at least two comparisons per delta sigma modulator output cycle. The one or more comparators compare a quantizer input signal against one or more thresholds. A successive reference generator determines the one or more thresholds for the one or more comparators wherein each of the one or more thresholds during a later one of the at least two comparisons is in conformity with results of an earlier one of the at least two comparisons. Redundant and other iterative comparison techniques and threshold generation techniques are used to efficiently reduce the number of comparators in the quantizer while maintaining accuracy.

39. 发明专利

GB2450645A Delta sigma modulator analog-to-digital converters with quantizer output prediction and comparator reduction 未知
公开(公告)号：GB2450645A
公开(公告)日：2008-12-31
申请号：GB0817439
申请日：2007-03-09
申请人： CIRRUS LOGIC INC
发明人： MELANSON JOHN L
IPC分类号： H03M3/04
摘要： The quantizers of delta sigma modulators in the signal processing systems described herein use a reduced set of comparators for quantization by predetermining and maintaining a maximum per cycle deviation d between a loop filter output signal VLF(t) and a predicted quantizer output signal qest. In at least one embodiment, a maximum quantizer level deviation d is defined in terms of a number of quantization levels. Thus, the number of comparators in a quantizer needed to quantize the quantizer input signal Vin(t) is based on the maximum quantizer level deviation d. In addition to using fewer comparators than available quantization output levels N, the quantizers can use an even number of comparators M, in contrast to comparable conventional reduced comparator ADC tracking quantizer designs using M+1 number of comparators, where N and Mare integers and M

40. 发明公开

EP1590905A4 SIGNAL PROCESSING SYSTEM WITH BASEBAND NOISE MODULATION AND NOISE FOLD BACK REDUCTION 有权
标题翻译：与基带噪声调制和降噪FOLDBACK信号处理系统
公开(公告)号：EP1590905A4
公开(公告)日：2011-01-12
申请号：EP04704054
申请日：2004-01-21
申请人： CIRRUS LOGIC INC
发明人： PLISCH MARJORIE R , MELANSON JOHN L , HODAPP STEPHEN T , RANGAN GIRI N K
IPC分类号： H03F1/02 , H03F1/26 , H03F3/21 , H03F3/217 , H03F3/38 , H03M3/04 , H04B14/06
CPC分类号： H03M3/34 , H03F1/02 , H03F1/26 , H03F3/211 , H03F3/217 , H03F3/2175 , H03F3/38 , H03F2200/331 , H03M3/50

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