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    • 31. 发明申请
      US20090291550A1 POLY GATE ETCH METHOD AND DEVICE FOR SONOS-BASED FLASH MEMORY 有权
    • POLY GATE ETCH METHOD AND DEVICE FOR SONOS-BASED FLASH MEMORY
    • 基于SONOS的闪存存储器的多栅极蚀刻方法和器件
    • US20090291550A1
    • 2009-11-26
    • US12259053
    • 2008-10-27
    • John Chen
    • John Chen
    • H01L21/469
    • H01L21/28282 , H01L27/11568 , H01L27/11573 , H01L29/66833 , H01L29/792
    • A method for forming flash memory devices is provided. The method includes providing a semiconductor substrate, which comprises a silicon material and has a periphery region and a cell region. The method further includes forming an isolation structure between the cell region and the periphery region. Additionally, the method includes forming an ONO layer overlying the cell region and the periphery region. Furthermore, the method includes removing the ONO layer overlying the periphery region to expose silicon material in the periphery region. The method also includes forming a gate dielectric layer overlying the periphery region, while protecting the ONO layer in the cell region. In addition, the method includes forming a polysilicon layer overlying the cell region and the periphery region.
    • 提供了一种形成闪速存储器件的方法。 该方法包括提供包括硅材料并具有外围区域和单元区域的半导体衬底。 该方法还包括在单元区域和外围区域之间形成隔离结构。 另外，该方法包括形成覆盖单元区域和外围区域的ONO层。 此外，该方法包括去除覆盖周边区域的ONO层以暴露外围区域中的硅材料。 该方法还包括形成覆盖周边区域的栅介质层，同时保护单元区域中的ONO层。 此外，该方法包括形成覆盖单元区域和周边区域的多晶硅层。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
    • 32. 发明授权
      US07425488B2 Method and structure using a pure silicon dioxide hardmask for gate patterning for strained silicon MOS transistors 有权
    • Method and structure using a pure silicon dioxide hardmask for gate patterning for strained silicon MOS transistors
    • 使用用于应变硅MOS晶体管的栅极图案化的纯二氧化硅硬掩模的方法和结构
    • US07425488B2
    • 2008-09-16
    • US11245412
    • 2005-10-05
    • Hanming Wu , Jiang Zhang , John Chen , Xian J Ning
    • Hanming Wu , Jiang Zhang , John Chen , Xian J Ning
    • H01L21/336
    • H01L29/7848 , H01L21/823807 , H01L21/823814 , H01L29/165 , H01L29/66545 , H01L29/66636
    • A partially completed semiconductor integrated circuit device. The device has a semiconductor substrate and a dielectric layer overlying the semiconductor substrate. The device has a gate structure including edges and a substantially pure silicon dioxide mask structure overlying the gate structure. A thickness ranging from about 400 to about 600 Angstroms of the substantially pure silicon dioxide mask structure is included. The device has a dielectric layer forming sidewall spacers on the edges of the gate structure to protect the gate structure including the edges and an exposed portion of the pure silicon dioxide mask structure overlying the gate structure. The device has an epitaxially grown fill material (e.g., silicon/germanium, silicon carbide) in an etched source region and an etched drain region. Preferably, the etched source region and the etched drain region are coupled to the gate structure. The device has a strained channel region between the filled source region and the filled drain region from at least the fill material formed in the etched source region and the etched drain region.
    • 部分完成的半导体集成电路器件。 该器件具有覆盖半导体衬底的半导体衬底和电介质层。 该器件具有包括边缘的栅极结构和覆盖栅极结构的基本上纯的二氧化硅掩模结构。 包括约400至约600埃基本上纯的二氧化硅掩模结构的厚度。 器件具有在栅极结构的边缘上形成侧壁间隔物的电介质层，以保护包括边缘的栅极结构和覆盖栅极结构的纯二氧化硅掩模结构的暴露部分。 该器件在蚀刻的源极区域和蚀刻的漏极区域中具有外延生长的填充材料（例如，硅/锗，碳化硅）。 优选地，蚀刻的源极区域和蚀刻的漏极区域耦合到栅极结构。 该装置在填充的源区和填充的漏极区之间具有至少从形成在蚀刻的源极区和蚀刻的漏极区中的填充材料的应变通道区。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 37. 发明申请
      US20070200358A1 Rotary latch 有权
    • Rotary latch
    • 旋转锁
    • US20070200358A1
    • 2007-08-30
    • US11364016
    • 2006-02-28
    • John Chen
    • John Chen
    • E05C3/06
    • E05B85/243 , E05B13/101 , E05B85/16 , E05C3/24 , Y10S292/30 , Y10S292/31 , Y10T292/1047
    • A rotary latch having a pivoting handle mounted in the recess of a mounting plate includes a turn-key member that rotates within the handle's free end, and the turn-key member is mechanically linked to a catch rod where rotation of the turn-key member results in a corresponding rotation of the catch rod. As a result of the rotation of the turn-key member, the catch rod has two positions—a “lock” position that does not engage a swiveling trip lever, and an “unlocked” position that engages the swiveling trip lever. When the turn-key member rotates the catch rod into the unlocked position, an actuation/pivoting of the handle about the pivot pin rotates the free end of the handle away from the mounting plate recess to linearly displace the catch rod. The linear displacement of the catch rod causes it to come into contact with and pivot the arm of a swiveling trip lever. The trip lever arm, when rotated by the catch rod, rotates an adjacent kicker journaled on the mounting plate's rear surface. The kicker includes a kicker pin that is engaged by the swiveling trip lever, causing the release kicker to rotate and push a guard rotary. The guard rotary protects a capture rotary from opening, where the capture rotary retains a lock bar. However, when the release kicker pushes the guard rotary against the bias of a dedicated spring, the capture rotary can rotate freely and open outward to release the captured lock bar.
    • 具有安装在安装板的凹部中的枢转手柄的旋转闩锁包括在手柄的自由端内旋转的转动键构件，并且转动键构件机械地连接到卡扣杆，其中转动键构件的旋转 导致抓杆的相应旋转。 由于转向键构件的旋转，锁扣杆具有两个位置 - 不接合旋转跳闸杆的“锁定”位置和接合旋转跳闸杆的“解锁”位置。 当转向键构件将卡扣杆旋转到解锁位置时，手柄围绕枢轴销的致动/枢转将手柄的自由端远离安装板凹槽旋转，以使卡扣杆线性地移位。 捕捉杆的线性位移使其与旋转跳闸杆的臂接触并枢转。 脱扣杠杆臂当被卡扣杆旋转时，旋转安装板后表面上相邻的推杆。 踢球机包括由旋转跳闸杆接合的撞击销，使释放踢球器旋转并推动保护旋转。 防护旋转保护捕获旋转体不受打开，捕获旋转体保留锁定杆。 然而，当释放踢球者抵抗专用弹簧的偏压推动保护旋转时，捕获旋转体可以自由旋转并向外打开以释放所捕获的锁定杆。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
    • 38. 发明申请
      US20070189206A1 METHOD AND APPARATUS FOR DYNAMICALLY CONFIGURING A HYBRID AUTOMATIC REPEAT REQUEST MEMORY 有权
    • METHOD AND APPARATUS FOR DYNAMICALLY CONFIGURING A HYBRID AUTOMATIC REPEAT REQUEST MEMORY
    • 用于动态配置混合自动重复请求存储器的方法和装置
    • US20070189206A1
    • 2007-08-16
    • US11670639
    • 2007-02-02
    • Arty Chandra , Guodong Zhang , John Chen , Mohammed Sammour , Stephen Terry
    • Arty Chandra , Guodong Zhang , John Chen , Mohammed Sammour , Stephen Terry
    • H04Q7/00
    • H04L1/1835 , H04L1/1812 , H04L1/1822 , H04L2001/0096
    • A method and apparatus for dynamically configuring a memory for hybrid automatic repeat request (H-ARQ) processes in a receiving node to permit a more flexible H-ARQ memory configuration and improve the performance of H-ARQ processes. An H-ARQ memory in the receiving node is reserved for a plurality of H-ARQ processes. A transmitting node dynamically configures the H-ARQ memory in the receiving node for each H-ARQ transmission so that the memory requirement for a plurality of H-ARQ processes exceeds the H-ARQ memory capacity. If there is insufficient H-ARQ memory available to support H-ARQ transmissions, only a subset of the plurality of H-ARQ processes may be activated at a time. When there is insufficient H-ARQ memory for processing H-ARQ transmissions, a negative acknowledgement (NACK), an acknowledgement (ACK), nothing, and/or information indicating the reason for a failed transmission may be transmitted to a transmitting node.
    • 一种用于在接收节点中动态配置用于混合自动重传请求（H-ARQ）进程的存储器以允许更灵活的H-ARQ存储器配置并提高H-ARQ进程的性能的方法和装置。 接收节点中的H-ARQ存储器被保留用于多个H-ARQ进程。 发送节点为每个H-ARQ传输动态地配置接收节点中的H-ARQ存储器，使得多个H-ARQ过程的存储器需求超过H-ARQ存储器容量。 如果没有足够的H-ARQ存储器来支持H-ARQ传输，则可以一次仅激活多个H-ARQ过程的一个子集。 当用于处理H-ARQ传输的H-ARQ存储器不足时，可以向发送节点发送否定确认（NACK），确认（ACK），无和/或指示发送故障的原因的信息。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
    • 39. 发明申请
      US20070077716A1 Method and structure for second spacer formation for strained silicon MOS transistors 有权
    • Method and structure for second spacer formation for strained silicon MOS transistors
    • 用于应变硅MOS晶体管的第二间隔物形成的方法和结构
    • US20070077716A1
    • 2007-04-05
    • US11243707
    • 2005-10-04
    • John Chen , Xian Ning , Hanming Wu
    • John Chen , Xian Ning , Hanming Wu
    • H01L21/336 , H01L21/8238 , H01L21/8234
    • H01L29/66545 , H01L21/823807 , H01L21/823814 , H01L21/823864 , H01L29/66636 , H01L29/7848
    • A method for forming a CMOS semiconductor wafer. The method includes providing a semiconductor substrate (e.g., silicon wafer) and forming a dielectric layer (e.g., silicon dioxide, silicon oxynitride) overlying the semiconductor substrate. The method includes forming a gate layer overlying the dielectric layer and patterning the gate layer to form a gate structure including edges. The method includes forming a dielectric layer overlying the gate structure to protect the gate structure including the edges. Preferably, the dielectric layer has a thickness of less than 40 nanometers. The method includes etching a source region and a drain region adjacent to the gate structure using the dielectric layer as a protective layer and depositing silicon germanium material into the source region and the drain region to fill the etched source region and the etched drain region. The method causes a channel region between the source region and the drain region to be strained in compressive mode from at least the silicon germanium material formed in the source region and the drain region. The method includes forming a second protective layer overlying surfaces and performing an anisotropic etching process to form spacer structures to seal the gate structure.
    • 一种用于形成CMOS半导体晶片的方法。 该方法包括提供半导体衬底（例如硅晶片）并形成覆盖半导体衬底的电介质层（例如，二氧化硅，氮氧化硅）。 该方法包括形成覆盖在介电层上的栅极层，并构图栅极层以形成包括边缘的栅极结构。 该方法包括形成覆盖栅极结构的电介质层，以保护包括边缘的栅极结构。 优选地，电介质层的厚度小于40纳米。 该方法包括使用电介质层作为保护层蚀刻与栅极结构相邻的源极区域和漏极区域，并将硅锗材料沉积到源极区域和漏极区域中以填充蚀刻的源极区域和蚀刻的漏极区域。 该方法使得源极区域和漏极区域之间的沟道区域至少在形成于源极区域和漏极区域中的硅锗材料以压缩模式应变。 该方法包括形成覆盖表面的第二保护层，并执行各向异性蚀刻工艺以形成间隔结构以密封栅极结构。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
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