会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 31. 发明授权
    • Power semiconductor device
    • 功率半导体器件
    • US07759732B2
    • 2010-07-20
    • US11680912
    • 2007-03-01
    • Wataru SaitoSyotaro OnoMasakatsu TakashitaYasuto SumiMasaru IzumisawaHiroshi Ohta
    • Wataru SaitoSyotaro OnoMasakatsu TakashitaYasuto SumiMasaru IzumisawaHiroshi Ohta
    • H01L27/088H01L23/62
    • H01L29/7811H01L29/0634H01L29/0696H01L29/0878H01L29/1095H01L29/66712H01L2924/0002H01L2924/00
    • A power semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type and a third semiconductor layer of a second conductivity type formed on the first semiconductor layer and alternately arranged along at least one direction parallel to a surface of the first semiconductor layer; a first main electrode; a fourth semiconductor layer of the second conductivity type selectively formed in a surface of the second semiconductor layer and a surface of the third semiconductor layer; a fifth semiconductor layer of the first conductivity type selectively formed in a surface of the fourth semiconductor layer; a second main electrode; and a control electrode. At least one of the second and the third semiconductor layers has a dopant concentration profile along the one direction, the dopant concentration profile having a local minimum at a position except both ends thereof.
    • 功率半导体器件包括:第一导电类型的第一半导体层; 第一导电类型的第二半导体层和形成在第一半导体层上的第二导电类型的第三半导体层,并且沿着平行于第一半导体层的表面的至少一个方向交替布置; 第一主电极; 选择性地形成在第二半导体层的表面和第三半导体层的表面上的第二导电类型的第四半导体层; 选择性地形成在第四半导体层的表面中的第一导电类型的第五半导体层; 第二主电极; 和控制电极。 第二和第三半导体层中的至少一个具有沿着一个方向的掺杂剂浓度分布,掺杂剂浓度分布在其两端以外的位置处具有局部最小值。
    • 32. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07755138B2
    • 2010-07-13
    • US12537219
    • 2009-08-06
    • Wataru SaitoSyotaro OnoNana HatanoHiroshi OhtaMiho Watanabe
    • Wataru SaitoSyotaro OnoNana HatanoHiroshi OhtaMiho Watanabe
    • H01L29/78
    • H01L29/7813H01L29/0619H01L29/0634H01L29/0696H01L29/1095H01L29/407H01L29/41766H01L29/7806
    • A semiconductor device of the invention includes: a super junction structure of an n-type pillar layer and a p-type pillar layer; a base layer provided on the p-type pillar layer; a source layer selectively provided on a surface of the base layer; a gate insulating film provided on a portion being in contact with the base layer, a portion being in contact with the source layer and a portion being in contact with the n-type pillar layer on a portion of a junction between the n-type pillar layer and the p-type pillar layer; a control electrode provided opposed to the base layer, the source layer and the n-type pillar layer through the gate insulating film; and a source electrode electrically connected to the base layer, the source layer and the n-type layer. The source electrode is contact with the surface of the n-type pillar layer located between the control electrodes to form a Schottky junction.
    • 本发明的半导体器件包括:n型柱层和p型柱层的超结结构; 设置在p型支柱层上的基底层; 源层选择性地设置在基层的表面上; 设置在与所述基底层接触的部分上的栅极绝缘膜,与所述源极层接触的部分和在所述n型支柱的接合部的一部分上与所述n型支柱层接触的部分 层和p型支柱层; 控制电极,其通过所述栅极绝缘膜与所述基极层,所述源极层和所述n型支柱层相对设置; 以及与基极层,源极层和n型层电连接的源电极。 源电极与位于控制电极之间的n型支柱层的表面接触以形成肖特基结。
    • 33. 发明授权
    • Power semiconductor device
    • 功率半导体器件
    • US07605426B2
    • 2009-10-20
    • US11933869
    • 2007-11-01
    • Wataru SaitoSyotaro OnoMasakatsu TakashitaYasuto SumiMasaru IzumisawaHiroshi Ohta
    • Wataru SaitoSyotaro OnoMasakatsu TakashitaYasuto SumiMasaru IzumisawaHiroshi Ohta
    • H01L29/76
    • H01L29/7802H01L29/0634H01L29/0696H01L29/1095H01L29/402H01L29/41741H01L29/41766H01L29/7806H01L29/7811H01L29/7813
    • A power semiconductor device includes: a semiconductor substrate; a gate insulating film; a control electrode insulated from the semiconductor substrate by the gate insulating film; a first main electrode provided on a lower surface side of the semiconductor substrate; and a second main electrode provided on an upper surface side of the semiconductor substrate. The semiconductor substrate includes: a first first-conductivity-type semiconductor layer with its lower surface connected to the first main electrode; a second first-conductivity-type semiconductor layer and a third second-conductivity-type semiconductor layer formed on the first first-conductivity-type semiconductor layer and alternately arranged parallel to the upper surface of the semiconductor substrate; a trench formed in a directly overlying region of the third second-conductivity-type semiconductor layer, with part of the second main electrode buried in the trench; a fourth second-conductivity-type semiconductor layer selectively formed in a surface of the second first-conductivity-type semiconductor layer and connected to the second main electrode; a fifth first-conductivity-type semiconductor layer selectively formed in a surface of the fourth second-conductivity-type semiconductor layer and connected to the second main electrode; and a sixth second-conductivity-type semiconductor layer formed at a bottom of the trench and connected to the second main electrode. Impurity concentration in the sixth second-conductivity-type semiconductor layer is higher than impurity concentration in the fourth second-conductivity-type semiconductor layer, and lower surface of the sixth second-conductivity-type semiconductor layer is located below lower surface of the fourth second-conductivity-type semiconductor layer.
    • 功率半导体器件包括:半导体衬底; 栅极绝缘膜; 通过栅极绝缘膜与半导体衬底绝缘的控制电极; 设置在所述半导体基板的下表面侧的第一主电极; 以及设置在半导体衬底的上表面侧的第二主电极。 半导体衬底包括:第一第一导电型半导体层,其下表面连接到第一主电极; 形成在第一第一导电型半导体层上的第二第一导电型半导体层和第三第二导电型半导体层,并且交替地平行于半导体基板的上表面布置; 形成在所述第三第二导电型半导体层的直接覆盖区域中的沟槽,其中所述第二主电极的一部分埋在所述沟槽中; 选择性地形成在所述第二第一导电型半导体层的表面并连接到所述第二主电极的第四第二导电型半导体层; 第五第一导电型半导体层,选择性地形成在所述第四第二导电型半导体层的表面上,并连接到所述第二主电极; 以及形成在所述沟槽的底部并连接到所述第二主电极的第六第二导电型半导体层。 第六第二导电型半导体层中的杂质浓度高于第四第二导电型半导体层中的杂质浓度,第六第二导电型半导体层的下表面位于第四第二导电型半导体层的下表面下方 导电型半导体层。
    • 36. 发明授权
    • Semiconductor substrate and semiconductor device fabrication method
    • 半导体衬底和半导体器件制造方法
    • US07301169B2
    • 2007-11-27
    • US10995539
    • 2004-11-24
    • Sachie ToneHiroshi OhtaMasahiro Ninomiya
    • Sachie ToneHiroshi OhtaMasahiro Ninomiya
    • H01L23/58
    • H01L21/6836H01L23/544H01L24/05H01L2221/68327H01L2221/6834H01L2221/68386H01L2223/54453H01L2224/02166H01L2224/05554H01L2224/05556
    • The semiconductor substrate comprises a first monitor part 14a formed in a first region near a center of a semiconductor wafer 10, which includes a first element having a first electrode 24 formed over the semiconductor wafer 10 with a first insulation film 22 formed therebetween, and a first electrode pad 32 electrically connected to the first electrode 24; and a second monitor part 14b formed in a second region different from the first region, which includes a second element having a second electrode 24 formed on the semiconductor wafer 10 with a second insulation film 22 formed therebetween, and a second electrode pad 32 electrically connected to the second electrode 24. When electric breakdown has taken place in both the first monitor part 14a and the second monitor part 14b, it can be judged that too large static electricity was generated upon the release of the surface protection film 39. When electric breakdown has taken place in either of the first monitor part 14a and the second monitor part 14b, the electric breakdown has taken place due to factors other than the static electricity generated upon the release of the surface protection film. When electric breakdown has taken place in neither of the first monitor part 14a and the second monitor part 14b, it can be judged that too large static electricity was generated upon the release of the surface protection film 39. Thus, factors for defects of semiconductor devices can be identified, which leads to improved quality of the semiconductor devices.
    • 半导体衬底包括形成在半导体晶片10的中心附近的第一区域中的第一监视器部分14a,其包括第一元件,第一元件具有形成在半导体晶片10上的第一电极24,其间形成有第一绝缘膜22;以及 电连接到第一电极24的第一电极焊盘32; 以及形成在与第一区域不同的第二区域中的第二监视器部分14b,其包括第二元件,第二元件具有形成在半导体晶片10上的第二电极24,其间形成有第二绝缘膜22,第二电极焊盘32电连接 连接到第二电极24。 当在第一监视器部分14a和第二监视器部分14b两者中发生电击穿时,可以判断出在释放表面保护膜39时产生太大的静电。 当在第一监视器部分14a和第二监视器部分14b中的任一个中发生电击穿时,由于除了表面保护膜释放后产生的静电以外的因素而发生电击穿。 当在第一监视器部分14a和第二监视器部分14b中都没有发生电击穿时,可以判断出在释放表面保护膜39时产生太大的静电。 因此,可以识别半导体器件缺陷的因素,这导致半导体器件的质量提高。
    • 37. 发明申请
    • Screw compressor
    • 螺杆压缩机
    • US20060280626A1
    • 2006-12-14
    • US11367380
    • 2006-03-06
    • Hitoshi NishimuraTomoo SuzukiHiroshi Ohta
    • Hitoshi NishimuraTomoo SuzukiHiroshi Ohta
    • F04B17/00
    • F04C18/16F01C21/007F04C23/00F04C23/001F04C29/005F04C29/04
    • A screw compressor comprising: a low pressure stage compressor body; a high pressure stage compressor body that further compresses a compressed air compressed by the low pressure stage compressor body; pinion gears for example, respectively, provided on, for example, a male rotor of the low pressure stage compressor body and, for example, a male rotor of the high pressure stage compressor body; a motor; a bull gear for example, provided on a rotating shaft of the motor; and an intermediate shaft supported rotatably and provided with a pinion gear, which meshes with the bull gear, and a bull gear, which meshes with the pinion gears. Thereby, it is possible to make the motor relatively low in rotating speed while inhibiting the gears from being increased in diameter, thus enabling achieving reduction in cost.
    • 一种螺杆压缩机,包括:低压级压缩机体; 高压级压缩机主体,其进一步压缩由所述低压级压缩机主体压缩的压缩空气; 小齿轮分别设置在例如低压级压缩机主体的公转子和例如高压级压缩机主体的公转子上; 电机 大齿轮例如设置在马达的旋转轴上; 以及可旋转地支撑并设有与大齿轮啮合的小齿轮的中间轴和与小齿轮啮合的大齿轮。 由此,可以使电动机的转速相对较低,同时抑制齿轮的直径增大,能够实现成本的降低。
    • 38. 发明授权
    • Object extraction device, object extraction method, and recording media for storing an object extraction program
    • 对象提取装置,对象提取方法以及用于存储对象提取程序的记录介质
    • US06999618B2
    • 2006-02-14
    • US09781280
    • 2001-02-13
    • Hiroshi Ohta
    • Hiroshi Ohta
    • G06K9/00
    • G06T7/97
    • An object extraction device. In an exemplary embodiment, a first object extraction calculating device finds an object extraction image by employing object extraction calculations for extraction of an object by using a predetermined first calculation parameter on photographed images having a parallax with respect to the object. An incorrect outline extraction processor extracts an outline from the object extraction image and extracts an incorrect outline segment from the extracted outline. A recalculated region determining device determines as a recalculated region a partial region that includes the incorrect outline segment. A second object extraction calculating device finds a re-extracted image that includes an object extraction image of the recalculated region, by carrying out an object extraction calculation in order to eliminate the incorrect outline segment in the recalculated region by using a second calculation parameter that is different from the first calculation parameter on the photographed images.
    • 物体提取装置。 在一个示例性实施例中,第一对象提取计算装置通过使用用于提取对象的对象提取计算,通过对具有相对于对象的视差的拍摄图像使用预定的第一计算参数来找到对象提取图像。 错误的轮廓提取处理器从对象提取图像中提取轮廓,并从提取的轮廓中提取不正确的轮廓线段。 重新计算区域确定装置将重新计算的区域确定为包括不正确的轮廓线段的局部区域。 第二对象提取计算装置通过执行对象提取计算来找到包括重新计算区域的对象提取图像的再提取图像,以便通过使用第二计算参数来消除重新计算的区域中的不正确的轮廓段 与拍摄图像上的第一个计算参数不同。