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31. 发明申请

US20090271535A1 STORAGE SYSTEM AND DATA INPUT/OUTPUT CONTROL METHOD 有权
标题翻译：存储系统和数据输入/输出控制方法
公开(公告)号：US20090271535A1
公开(公告)日：2009-10-29
申请号：US12499933
申请日：2009-07-09
申请人： Yasuhiko YAMAGUCHI , Sadahiro Sugimoto
发明人： Yasuhiko YAMAGUCHI , Sadahiro Sugimoto
IPC分类号： G06F3/00
CPC分类号： G06F3/0658 , G06F3/0613 , G06F3/0631 , G06F3/0683 , G06F11/3485
摘要： A highly-reliable storage system and data input/output control method, which can ensure priority data input/output performance, is provided. A performance limit, which is the number of data input/output processes per unit of time, is detected; and a processing percentage for each of one or more priority targets for which data input/output processing should be prioritized, and a group of one or more non-priority targets that includes of one or more other targets, which correspond to input/output processing request types, is determined based on the performance limit detected, and a targeted performance; and the storage apparatus executes data input/output processing for the one or more priority targets and the group of one or more non-priority targets at respective frequencies determined by the processing percentage determination unit.
摘要翻译：提供了一种高可靠性的存储系统和数据输入/输出控制方法，可以确保优先级数据输入/输出性能。检测到每单位时间的数据输入/输出处理次数的性能限制; 以及对数据输入/输出处理应优先化的一个或多个优先级目标中的每一个的处理百分比，以及包括一个或多个其它目标的一个或多个非优先级目标的组，其对应于输入/输出处理请求类型，根据检测到的性能限制和目标性能确定; 并且存储装置以由处理百分比确定单元确定的各个频率对一个或多个优先级目标和一个或多个非优先级目标的组执行数据输入/输出处理。

32. 发明授权

US08806300B2 Storage subsystem 有权
标题翻译：存储子系统
公开(公告)号：US08806300B2
公开(公告)日：2014-08-12
申请号：US12526666
申请日：2009-05-25
申请人： Jun Kitahara , Masanori Takada , Sadahiro Sugimoto
发明人： Jun Kitahara , Masanori Takada , Sadahiro Sugimoto
IPC分类号： G11C29/00
CPC分类号： G06F3/0658 , G06F3/0604 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F3/0688 , G06F11/108 , G06F2211/1054
摘要： The storage system includes a plurality of flash memory devices, each of the flash memory devices including a flash memory controller and flash memory chips, which are configured as a RAID group and a storage controller, coupled to the plurality of flash memory devices, configured to receive data from a computer and send the data to a first flash memory device of the plurality of flash memory devices. The flash memory controller of the flash memory device is configured to receive the data from the storage controller and execute a parity operation using the data.
摘要翻译：存储系统包括多个闪速存储器设备，每个闪存器件包括闪存控制器和闪速存储器芯片，其被配置为耦合到多个闪速存储器设备的RAID组和存储控制器，配置为从计算机接收数据并将数据发送到多个闪存设备中的第一闪存设备。闪速存储器件的闪存控制器被配置为从存储控制器接收数据，并使用该数据执行奇偶校验操作。

33. 发明授权

US08504765B2 Method of improving efficiency of capacity of volume used for copy function and apparatus thereof 有权
标题翻译：提高复印功能用容量能力的方法及其装置
公开(公告)号：US08504765B2
公开(公告)日：2013-08-06
申请号：US13454133
申请日：2012-04-24
申请人： Sadahiro Sugimoto , Kazuyoshi Serizawa , Yoshiaki Eguchi , Shunji Kawamura
发明人： Sadahiro Sugimoto , Kazuyoshi Serizawa , Yoshiaki Eguchi , Shunji Kawamura
IPC分类号： G06F12/08 , G06F12/16
CPC分类号： G06F3/0665 , G06F3/0608 , G06F3/0631 , G06F3/067 , G06F11/2069
摘要： Provided is a computer system including: a host computer; a first storage system connected to the host computer; and a second storage system connected to the first storage system; in which the first storage system sets a first logical volume recognized by the host computer as a logical storage area; the first logical volume includes a plurality of first storage areas; a first real storage area on the first disk drive is allocated to at least one of the first storage areas. In the computer system, the second storage system sets a second logical volume corresponding to the first logical volume, and the first storage system transmits data stored in the first storage area allocated to the first storage area to the second storage system when the first real storage area is allocated to the first storage area.
摘要翻译：提供一种计算机系统，包括：主计算机; 连接到主计算机的第一存储系统; 以及连接到所述第一存储系统的第二存储系统; 其中所述第一存储系统将由所述主计算机识别的第一逻辑卷设置为逻辑存储区域; 第一逻辑卷包括多个第一存储区域; 第一磁盘驱动器上的第一实际存储区域被分配给第一存储区域中的至少一个。在计算机系统中，第二存储系统设置与第一逻辑卷相对应的第二逻辑卷，并且第一存储系统在第一真实存储器中将存储在分配给第一存储区域的第一存储区域中的数据发送到第二存储系统区域被分配给第一存储区域。

34. 发明申请

US20120023290A1 STORAGE SYSTEM CONFIGURED FROM PLURALITY OF STORAGE MODULES AND METHOD FOR SWITCHING COUPLING CONFIGURATION OF STORAGE MODULES 有权
标题翻译：存储模块配置的存储系统和存储模块的耦合配置方法
公开(公告)号：US20120023290A1
公开(公告)日：2012-01-26
申请号：US12738601
申请日：2010-04-05
申请人： Sadahiro Sugimoto , Noboru Morishita , Kazuyoshi Serizawa
发明人： Sadahiro Sugimoto , Noboru Morishita , Kazuyoshi Serizawa
IPC分类号： G06F12/00
CPC分类号： G06F3/0665 , G06F3/0607 , G06F3/0635 , G06F3/067 , G06F12/0866
摘要： There are a loose coupling and a tight coupling as the coupling configurations for a first module and a second module. The loose coupling is a coupling configuration in which the first and second modules are coupled together by way of a front-end path, and the first module is not able to access a second storage resource. The tight coupling is a coupling configuration in which the first and second modules are coupled together by way of a back-end path, and the first module is able to access the second storage resource. A switch from the loose coupling to the tight coupling is performed using the following processing flow without the first and second modules being partitioned into respectively independent storage modules. Specifically, first, the first and second modules are coupled together by way of the back-end path, and next, the first module merges information denoted by second management information from the second storage resource with first management information via the back-end path.
摘要翻译：作为第一模块和第二模块的耦合配置，存在松耦合和紧耦合。松耦合是其中第一和第二模块通过前端路径耦合在一起的耦合配置，并且第一模块不能访问第二存储资源。紧耦合是其中第一和第二模块通过后端路径耦合在一起的耦合配置，并且第一模块能够访问第二存储资源。使用以下处理流程，从松耦合到紧耦合的切换，而不将第一和第二模块分成独立的存储模块。具体地说，首先，第一模块和第二模块通过后端路径耦合在一起，接下来，第一模块通过后端路径将来自第二存储资源的第二管理信息所表示的信息与第一管理信息进行合并。

35. 发明授权

US08549381B2 Storage subsystem 有权
标题翻译：存储子系统
公开(公告)号：US08549381B2
公开(公告)日：2013-10-01
申请号：US13549822
申请日：2012-07-16
申请人： Jun Kitahara , Masanori Takada , Sadahiro Sugimoto
发明人： Jun Kitahara , Masanori Takada , Sadahiro Sugimoto
IPC分类号： G11C29/00
CPC分类号： G06F3/0658 , G06F3/0604 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F3/0688 , G06F11/108 , G06F2211/1054
摘要： The storage system includes a plurality of flash memory devices, each of the flash memory devices including a flash memory controller and flash memory chips, which are configured as a RAID group and a storage controller, coupled to the plurality of flash memory devices, configured to receive data from a computer and send the data to a first flash memory device of the plurality of flash memory devices. The flash memory controller of the flash memory device is configured to receive the data from the storage controller and execute a parity operation using the data.
摘要翻译：存储系统包括多个闪速存储器设备，每个闪存器件包括闪存控制器和闪速存储器芯片，其被配置为耦合到多个闪速存储器设备的RAID组和存储控制器，配置为从计算机接收数据并将数据发送到多个闪存设备中的第一闪存设备。闪速存储器件的闪存控制器被配置为从存储控制器接收数据，并使用该数据执行奇偶校验操作。

36. 发明授权

US08051219B2 Storage system with performance limit detection unit and processing percentage determination unit for ensuring priority data performance 有权
标题翻译：具有性能限制检测单元和处理百分比确定单元的存储系统，用于确保优先级数据性能
公开(公告)号：US08051219B2
公开(公告)日：2011-11-01
申请号：US12499933
申请日：2009-07-09
申请人： Yasuhiko Yamaguchi , Sadahiro Sugimoto
发明人： Yasuhiko Yamaguchi , Sadahiro Sugimoto
IPC分类号： G06F3/00 , G06F13/362
CPC分类号： G06F3/0658 , G06F3/0613 , G06F3/0631 , G06F3/0683 , G06F11/3485
摘要： A highly-reliable storage system and data input/output control method, which can ensure priority data input/output performance, is provided. A performance limit, which is the number of data input/output processes per unit of time, is detected; and a processing percentage for each of one or more priority targets for which data input/output processing should be prioritized, and a group of one or more non-priority targets that includes of one or more other targets, which correspond to input/output processing request types, is determined based on the performance limit detected, and a targeted performance; and the storage apparatus executes data input/output processing for the one or more priority targets and the group of one or more non-priority targets at respective frequencies determined by the processing percentage determination unit.
摘要翻译：提供了高可靠性的存储系统和数据输入/输出控制方法，可以确保优先级数据输入/输出性能。检测到每单位时间的数据输入/输出处理次数的性能限制; 以及对数据输入/输出处理应优先化的一个或多个优先级目标中的每一个的处理百分比，以及包括一个或多个其它目标的一个或多个非优先级目标的组，其对应于输入/输出处理请求类型，根据检测到的性能限制和目标性能确定; 并且存储装置以由处理百分比确定单元确定的各个频率对一个或多个优先目标和一个或多个非优先级目标的组执行数据输入/输出处理。

37. 发明申请

US20100030946A1 STORAGE APPARATUS, MEMORY AREA MANAGING METHOD THEREOF, AND FLASH MEMORY PACKAGE 有权
标题翻译：存储设备，存储区管理方法和闪存存储器包
公开(公告)号：US20100030946A1
公开(公告)日：2010-02-04
申请号：US12248124
申请日：2008-10-09
申请人： Yoshiki Kano , Sadahiro Sugimoto
发明人： Yoshiki Kano , Sadahiro Sugimoto
IPC分类号： G06F12/00
CPC分类号： G06F3/0659 , G06F3/0608 , G06F3/061 , G06F3/0631 , G06F3/067 , G06F3/0688 , G06F12/0246 , G06F2212/1044 , G06F2212/7202 , G06F2212/7203 , G06F2212/7206 , G06F2212/7208
摘要： A storage device is provided, which allows a write area associated with a data area of interest to be allocated according to write performance of a host computer. The storage apparatus includes one or more flash memory packages having a plurality of flash memories and stores data transmitted from one or more host computers. A storage area provided by the one or more flash memory packages includes a first area that is an area for storing actual data formed by one or more logical devices and a second area that is an area for storing a write instruction from the host computer to the logical device. The first and second areas are provided in each of the one or more flash memory packages. The apparatus further includes a monitoring section monitoring the frequency of write instructions from the host computer and a changing section for changing the size of the second area according to the frequency of write instructions.
摘要翻译：提供了存储装置，其允许根据主计算机的写入性能分配与感兴趣的数据区域相关联的写入区域。存储装置包括具有多个闪速存储器并存储从一个或多个主计算机发送的数据的一个或多个闪速存储器包。由一个或多个闪速存储器包提供的存储区域包括第一区域，其是用于存储由一个或多个逻辑设备形成的实际数据的区域，以及第二区域，其是用于存储从主计算机到逻辑设备。第一和第二区域设置在一个或多个闪速存储器封装的每一个中。该装置还包括监视来自主计算机的写入指令的频率的监视部分和用于根据写入指令的频率改变第二区域的大小的改变部分。

38. 发明申请

US20080184255A1 Storage apparatus and load distribution method 有权
标题翻译：存储装置和负载分配方法
公开(公告)号：US20080184255A1
公开(公告)日：2008-07-31
申请号：US12003994
申请日：2008-01-04
申请人： Koji Watanabe , Sadahiro Sugimoto
发明人： Koji Watanabe , Sadahiro Sugimoto
IPC分类号： G06F9/50
CPC分类号： G06F9/505 , G06F2209/5022
摘要： A storage apparatus having plural control processors that interpret and process requests sent from a host computer includes a distribution judgment unit for judging, after a control processor receives a request sent from the host computer, whether or not to allocate processing relevant to the request from the control processor that received the request to another control processor, and a control processor selection unit for selecting an allocation target control processor if the distribution judgment unit judges to allocate the processing to another control processor.
摘要翻译：具有多个控制处理器的存储装置，其解释和处理从主计算机发送的请求包括：分发判断单元，用于在控制处理器接收到从主计算机发送的请求之后，判断是否分配与来自所述主机的请求有关的处理控制处理器，其接收到对另一个控制处理器的请求;以及控制处理器选择单元，用于如果分发判断单元判断分配处理到另一控制处理器，则选择分配目标控制处理器。

39. 发明申请

US20070220514A1 Storage system comprising microprocessor load distribution function 有权
标题翻译：存储系统包括微处理器负载分配功能
公开(公告)号：US20070220514A1
公开(公告)日：2007-09-20
申请号：US11429527
申请日：2006-05-05
申请人： Sadahiro Sugimoto , Norio Shimozono , Kazuyoshi Serizawa
发明人： Sadahiro Sugimoto , Norio Shimozono , Kazuyoshi Serizawa
IPC分类号： G06F9/46
CPC分类号： G06F3/0659 , G06F3/061 , G06F3/0631 , G06F3/0658 , G06F3/0689 , G06F9/5027 , G06F12/0866 , G06F2209/509
摘要： Among a plurality of microprocessors 12, 32, when the load on a microprocessor 12 which performs I/O task processing of received I/O requests is equal to or greater than a first load, the microprocessor assigns at least an I/O task portion of the I/O task processing to another microprocessor 12 or 32, and the other microprocessor 12 or 32 executes at least the I/O task portion. The I/O task portion is a task processing portion comprising cache control processing, comprising the securing in cache memory 20 of a cache area, which is one area in cache memory 20, for storage of data.
摘要翻译：在多个微处理器12,32中，当对接收的I / O请求执行I / O任务处理的微处理器12上的负载等于或大于第一负载时，微处理器至少分配I / O任务部分的I / O任务处理到另一个微处理器12或32，另一个微处理器12或32至少执行I / O任务部分。 I / O任务部分是包括高速缓存控制处理的任务处理部分，其包括将高速缓存区域（其是高速缓冲存储器20中的一个区域）的高速缓存存储器20固定在数据的存储中。

40. 发明授权

US08863145B2 Storage apparatus and load distribution method 有权
标题翻译：存储装置和负载分配方法
公开(公告)号：US08863145B2
公开(公告)日：2014-10-14
申请号：US13421347
申请日：2012-03-15
申请人： Koji Watanabe , Sadahiro Sugimoto
发明人： Koji Watanabe , Sadahiro Sugimoto
IPC分类号： G06F9/46 , G06F9/50
CPC分类号： G06F9/505 , G06F2209/5022
摘要： A storage apparatus having plural control processors that interpret and process requests sent from a host computer includes a distribution judgment unit for judging, after a control processor receives a request sent from the host computer, whether or not to allocate processing relevant to the request from the control processor that received the request to another control processor, and a control processor selection unit for selecting an allocation target control processor if the distribution judgment unit judges to allocate the processing to another control processor.
摘要翻译：具有多个控制处理器的存储装置，其解释和处理从主计算机发送的请求包括：分发判断单元，用于在控制处理器接收到从主计算机发送的请求之后，判断是否分配与来自所述主机的请求有关的处理控制处理器，其接收到对另一个控制处理器的请求;以及控制处理器选择单元，用于如果分发判断单元判断分配处理到另一控制处理器，则选择分配目标控制处理器。

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