会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 32. 发明授权
    • High bandwidth apparatus and method for generating differential signals
    • 用于产生差分信号的高带宽设备和方法
    • US07656231B2
    • 2010-02-02
    • US12033165
    • 2008-02-19
    • Wenzhe LuoPaul Ouyang
    • Wenzhe LuoPaul Ouyang
    • H03F3/45
    • H03F3/45197H03F3/45659H03F2203/45592H03F2203/45642H03F2203/45694
    • An apparatus and method for generating differential signals. The apparatus includes a first operational amplifier receiving a first signal, a second operational amplifier receiving a second signal, and a first transistor. The first transistor includes a first gate, a first terminal, and a second terminal. Additionally, the apparatus includes a second transistor. The second transistor includes a second gate, a third terminal, and a fourth terminal. Moreover, the apparatus includes a first resistor coupled to the first terminal and the third terminal, and a second resistor coupled to the second terminal and the fourth terminal. Also, the apparatus includes a first current supplier coupled to the first terminal, a second current supplier coupled to the second terminal, a third current supplier coupled to the third terminal, and a fourth current supplier coupled to the fourth terminal.
    • 一种用于产生差分信号的装置和方法。 该装置包括接收第一信号的第一运算放大器,接收第二信号的第二运算放大器和第一晶体管。 第一晶体管包括第一栅极,第一端子和第二端子。 另外,该装置包括第二晶体管。 第二晶体管包括第二栅极,第三端子和第四端子。 此外,该装置包括耦合到第一端子和第三端子的第一电阻器,以及耦合到第二端子和第四端子的第二电阻器。 此外,该装置包括耦合到第一端子的第一电流供应器,耦合到第二端子的第二电流供应器,耦合到第三端子的第三电流供应器和耦合到第四端子的第四电流供应器。
    • 33. 发明授权
    • System and method for switching between high voltage and low voltage
    • 高电压和低电压之间切换的系统和方法
    • US07545201B2
    • 2009-06-09
    • US11934681
    • 2007-11-02
    • Wenzhe LuoPaul Ouyang
    • Wenzhe LuoPaul Ouyang
    • H03K3/01
    • G11C16/30G11C5/145H03K17/04163H03K17/693H03K2217/0018
    • A system and method for providing a voltage. The system includes a first transistor including a first gate, a first terminal, and a second terminal. The first terminal is configured to receive a first predetermined voltage, and the first gate is configured to receive a first control signal. Additionally, the system includes a second transistor including a second gate, a third terminal, and a fourth terminal. The second gate is configured to receive a second control signal, the third terminal is biased to a second predetermined voltage, the second terminal and the fourth terminal are directly connected to a first node, and the first node is associated with a first voltage level. Moreover, the system includes a third transistor including a third gate, a fifth terminal, and a sixth terminal.
    • 一种用于提供电压的系统和方法。 该系统包括第一晶体管,其包括第一栅极,第一端子和第二端子。 第一终端被配置为接收第一预定电压,并且第一门被配置为接收第一控制信号。 另外,该系统包括包括第二栅极,第三端子和第四端子的第二晶体管。 第二门被配置为接收第二控制信号,第三终端被偏置到第二预定电压,第二终端和第四终端直接连接到第一节点,并且第一节点与第一电压电平相关联。 此外,该系统包括包括第三栅极,第五端子和第六端子的第三晶体管。
    • 34. 发明授权
    • High bandwidth apparatus and method for generating differential signals
    • 用于产生差分信号的高带宽设备和方法
    • US07368989B2
    • 2008-05-06
    • US11678467
    • 2007-02-23
    • Wenzhe LuoPaul Ouyang
    • Wenzhe LuoPaul Ouyang
    • H03F3/45
    • H03F3/45197H03F3/45659H03F2203/45592H03F2203/45642H03F2203/45694
    • An apparatus and method for generating differential signals. The apparatus includes a first operational amplifier receiving a first signal, a second operational amplifier receiving a second signal, and a first transistor. The first transistor includes a first gate, a first terminal, and a second terminal. Additionally, the apparatus includes a second transistor. The second transistor includes a second gate, a third terminal, and a fourth terminal. Moreover, the apparatus includes a first resistor coupled to the first terminal and the third terminal, and a second resistor coupled to the second terminal and the fourth terminal. Also, the apparatus includes a first current supplier coupled to the first terminal, a second current supplier coupled to the second terminal, a third current supplier coupled to the third terminal, and a fourth current supplier coupled to the fourth terminal.
    • 一种用于产生差分信号的装置和方法。 该装置包括接收第一信号的第一运算放大器,接收第二信号的第二运算放大器和第一晶体管。 第一晶体管包括第一栅极,第一端子和第二端子。 另外,该装置包括第二晶体管。 第二晶体管包括第二栅极,第三端子以及第四端子。 此外,该装置包括耦合到第一端子和第三端子的第一电阻器,以及耦合到第二端子和第四端子的第二电阻器。 此外,该装置包括耦合到第一端子的第一电流供应器,耦合到第二端子的第二电流供应器,耦合到第三端子的第三电流供应器和耦合到第四端子的第四电流供应器。
    • 35. 发明申请
    • HIGH BANDWIDTH APPARATUS AND METHOD FOR GENERATING DIFFERENTIAL SIGNALS
    • 高带宽设备和产生差分信号的方法
    • US20070197105A1
    • 2007-08-23
    • US11678467
    • 2007-02-23
    • Wenzhe LuoPaul Ouyang
    • Wenzhe LuoPaul Ouyang
    • H01R13/514
    • H03F3/45197H03F3/45659H03F2203/45592H03F2203/45642H03F2203/45694
    • An apparatus and method for generating differential signals. The apparatus includes a first operational amplifier receiving a first signal, a second operational amplifier receiving a second signal, and a first transistor. The first transistor includes a first gate, a first terminal, and a second terminal. Additionally, the apparatus includes a second transistor. The second transistor includes a second gate, a third terminal, and a fourth terminal. Moreover, the apparatus includes a first resistor coupled to the first terminal and the third terminal, and a second resistor coupled to the second terminal and the fourth terminal. Also, the apparatus includes a first current supplier coupled to the first terminal, a second current supplier coupled to the second terminal, a third current supplier coupled to the third terminal, and a fourth current supplier coupled to the fourth terminal.
    • 一种用于产生差分信号的装置和方法。 该装置包括接收第一信号的第一运算放大器,接收第二信号的第二运算放大器和第一晶体管。 第一晶体管包括第一栅极,第一端子和第二端子。 另外,该装置包括第二晶体管。 第二晶体管包括第二栅极,第三端子和第四端子。 此外,该装置包括耦合到第一端子和第三端子的第一电阻器,以及耦合到第二端子和第四端子的第二电阻器。 此外,该装置包括耦合到第一端子的第一电流供应器,耦合到第二端子的第二电流供应器,耦合到第三端子的第三电流供应器和耦合到第四端子的第四电流供应器。
    • 36. 发明申请
    • Device and method for voltage regulator with low standby current
    • 低待机电压调节器的装置和方法
    • US20060071706A1
    • 2006-04-06
    • US11061062
    • 2005-02-17
    • Wenzhe Luo
    • Wenzhe Luo
    • G05F1/10G05F3/02
    • G05F1/46G05F1/56
    • An apparatus and method for providing a reference voltage for regulating voltage levels. The apparatus includes a first voltage generation system configured to receive a first control signal and output a calibration voltage, a voltage adjustment system configured to receive the calibration voltage and a reference voltage and output a second control signal, and a second voltage generation system configured to receive the second control signal and output the reference voltage. The voltage adjustment system includes a latch system configured to receive a third control signal and a fourth control signal and output the first control signal.
    • 一种用于提供用于调节电压电平的参考电压的装置和方法。 该装置包括被配置为接收第一控制信号并输出​​校准电压的第一电压产生系统,被配置为接收校准电压和参考电压并输出第二控制信号的电压调节系统,以及被配置为 接收第二控制信号并输出​​参考电压。 电压调节系统包括被配置为接收第三控制信号和第四控制信号并输出​​第一控制信号的锁存系统。
    • 38. 发明授权
    • Method and apparatus for reducing clock skew
    • 减少时钟偏差的方法和装置
    • US06256766B1
    • 2001-07-03
    • US09184742
    • 1998-11-03
    • Wenzhe Luo
    • Wenzhe Luo
    • G06F1750
    • G06F17/5077
    • A method for reducing skew in a common signal as applied to individual elements in the design phase. In accordance with the principles of the present invention, the design of the wiring is established and augmented with compensation elements and/or delay elements as necessary to equalize the skew as between all relevant components. In the disclosed embodiment, the method generally comprises three general steps: (1) grouping loads on the common signal; (2) creating a signal wiring tree and inserting delay cells; and (3) providing necessary loading compensation. The loads are grouped such that each utilized node on a central wiring experiences substantially equal loading, with compensating loads added as necessary. The nodes are established at intervals corresponding to the availability of delay elements, which are added to the branches feeding the farthest elements as necessary to equate the time delay of each node with respect to the source of the common signal.
    • 一种在设计阶段应用于各个元件的减少公共信号偏差的方法。 根据本发明的原理,通过补偿元件和/或延迟元件来建立和增加布线的设计,以便使所有相关部件之间的偏斜均衡。 在所公开的实施例中,该方法通常包括三个一般步骤:(1)对公共信号上的负载进行分组; (2)创建信号布线树并插入延迟单元; (3)提供必要的装载补偿。 负载被分组,使得中央配线上的每个使用的节点经历基本相等的负载,并且根据需要添加补偿负载。 以对应于延迟元件的可用性的间隔建立节点,其被添加到馈送最远元素的分支,以等于每个节点相对于公共信号源的时间延迟。
    • 39. 发明授权
    • Digital phase-locked loop with pulse controlled charge pump
    • 带脉冲控制电荷泵的数字锁相环
    • US6140852A
    • 2000-10-31
    • US188195
    • 1998-11-09
    • Jonathan H. FischerWenzhe Luo
    • Jonathan H. FischerWenzhe Luo
    • H03L7/089H03L7/107H03L7/18H03L7/06
    • H03L7/107H03L7/0896H03L7/0898H03L7/18
    • A digital phase locked loop includes a digital phase detector which provides a magnitude control signal to adjust the step size of up and down adjustments in the phase/frequency of a digitally controlled oscillator, resulting in shorter lock-in or acquisition time and smaller jitter as compared to conventional digital phase locked loop devices. In the disclosed embodiments, the digital phase detector includes multiple bit shift registers in both the up and down directions to count or measure a number of up or down minimum width pulses and provide a pulse magnitude control based on the value of the shift registers to the digitally controlled oscillator. The digitally controlled oscillator includes a charge pump and voltage controlled oscillator. In one embodiment, the charge pump provides programmable control over its output current pulses to a capacitor which controls the output frequency of the voltage controlled oscillator.
    • 数字锁相环包括数字相位检测器,其提供幅度控制信号以调节数字控制振荡器的相位/频率中的上下调节的步长,导致更短的锁定或采集时间以及更小的抖动,如 与传统的数字锁相环装置相比。 在所公开的实施例中,数字相位检测器在上下方向上包括多个位移寄存器,以对上或下最小宽度脉冲的数目进行计数或测量,并且基于移位寄存器的值提供脉冲幅度控制 数控振荡器。 数字控制振荡器包括电荷泵和压控振荡器。 在一个实施例中,电荷泵将其输出电流脉冲的可编程控制提供给控制压控振荡器的输出频率的电容器。
    • 40. 发明授权
    • Method of programming flash memory of the differential cell structures for better endurance
    • 编程差分单元结构的闪存的方法更好的耐用性
    • US08295096B2
    • 2012-10-23
    • US12794698
    • 2010-06-04
    • Wenzhe LuoPaul Ouyang
    • Wenzhe LuoPaul Ouyang
    • G11C16/10G11C16/04
    • G11C16/10G11C16/28
    • A method of programming a differential flash memory cell having a first and a second memory cell is disclosed. The first memory cell includes a first transistor associated with a first threshold voltage and the second memory cell includes a second transistor associated with a second threshold voltage. The method includes reading the first and second memory cells to determine a current associated with the first and second threshold voltages. The first threshold voltage is equal to a first value and the second threshold voltage is equal to a second value. The method further includes determining if the first current corresponds to a predetermined logic state. If the current does not correspond to the predetermined logic state, the first and second memory cells are programmed. The programming includes changing the first threshold voltage from the first value to a third value and the second threshold voltage from the second value to a fourth value.
    • 公开了一种对具有第一和第二存储器单元的差分闪存单元进行编程的方法。 第一存储单元包括与第一阈值电压相关联的第一晶体管,并且第二存储单元包括与第二阈值电压相关联的第二晶体管。 该方法包括读取第一和第二存储器单元以确定与第一和第二阈值电压相关联的电流。 第一阈值电压等于第一值,第二阈值电压等于第二值。 该方法还包括确定第一电流是否对应于预定的逻辑状态。 如果电流不对应于预定的逻辑状态,则对第一和第二存储单元进行编程。 编程包括将第一阈值电压从第一值改变为第三值,将第二阈值电压从第二值改变为第四值。