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31. 发明授权

US09888429B2 Multi-network based simultaneous data transmission method and apparatuses applied to the same 有权
公开(公告)号：US09888429B2
公开(公告)日：2018-02-06
申请号：US13571965
申请日：2012-08-10
申请人： Jeong Su Kim , Gyu Min Lee
发明人： Jeong Su Kim , Gyu Min Lee
IPC分类号： G06F15/16 , H04W48/16 , H04W48/18
CPC分类号： H04W48/16 , H04W48/18
摘要： A heterogeneous network based simultaneous data transmission service method can effectively control the access of a terminal device to an optimum network interface at a current location to thereby implement an effective and highly reliable heterogeneous network based simultaneous data transmission service.

32. 发明授权

US09837992B2 Semiconductor device 有权
公开(公告)号：US09837992B2
公开(公告)日：2017-12-05
申请号：US15077438
申请日：2016-03-22
申请人： Hyun-Chul Hwang , Min-Su Kim
发明人： Hyun-Chul Hwang , Min-Su Kim
IPC分类号： H03K3/289 , H03K3/012 , H03K3/356
CPC分类号： H03K3/012 , H03K3/356191
摘要： A semiconductor circuit includes a first circuit determining a voltage of a first node in response to the clock signal and the input data signal, a first latch determining a voltage of a second node in response to the clock signal and the voltage of the first node, and a second circuit determining a voltage of a third node in response to the clock signal and the voltage of the second node. The output data signal is provided in response to the voltage of the third node, the clock signal controls a flip-flop operation with respect to the input data signal and the output data signal, and respective voltages are maintained constant at the first node, second node and third node regardless of level transitions in the clock signal so long as a level of the input data signal is maintained constant.

33. 发明申请

US20170063217A1 REGULATOR CIRCUIT WITH ENHANCED RIPPLE REDUCTION SPEED 审中-公开
标题翻译：具有增强纹波降低速度的调节器电路
公开(公告)号：US20170063217A1
公开(公告)日：2017-03-02
申请号：US14840257
申请日：2015-08-31
申请人： SEUNG CHUL SHIN , HYUNG JONG KO , JUNG SU KIM , YONG IN PARK , WON HYUK JUNG , YUN CHEOL HAN
发明人： SEUNG CHUL SHIN , HYUNG JONG KO , JUNG SU KIM , YONG IN PARK , WON HYUK JUNG , YUN CHEOL HAN
IPC分类号： H02M1/14 , G05F1/575
CPC分类号： G05F1/575 , H02M1/14 , H02M2001/0003 , H02M2001/0025
摘要： A regulator circuit includes an OP-amp, buffer, power transistor, voltage divider, load, and feedback current generator. The OP-amp generates first voltage signal by amplifying a difference between an input voltage signal and a feedback voltage signal. The OP-amp drives a first node as the first voltage signal. The buffer drives a second node as a second voltage signal generated based on the first voltage signal. The power transistor includes a drain terminal receiving a supply voltage, a gate terminal connected to the second node, and a source terminal connected to a third node. The voltage divider generates the feedback voltage signal by dividing an output voltage signal of the third node. The load includes a terminal connected to the third node and another terminal receiving a ground voltage. The feedback current generator provides a first feedback current corresponding to a ripple of the output voltage signal to the first node for enhancing a speed at which the ripple reduced.
摘要翻译：调节器电路包括OP放大器，缓冲器，功率晶体管，分压器，负载和反馈电流发生器。 OP放大器通过放大输入电压信号和反馈电压信号之间的差异来产生第一电压信号。 OP-amp驱动第一个节点作为第一个电压信号。缓冲器驱动第二节点作为基于第一电压信号产生的第二电压信号。功率晶体管包括接收电源电压的漏极端子，连接到第二节点的栅极端子和连接到第三节点的源极端子。分压器通过分压第三节点的输出电压信号来产生反馈电压信号。负载包括连接到第三节点的终端和接收地电压的另一终端。反馈电流发生器提供对应于第一节点的输出电压信号的纹波的第一反馈电流，以增加纹波减小的速度。

34. 发明授权

US09458062B2 Method of manufacturing ceramic primary crown and ceramic primary crown manufactured by the same 有权
标题翻译：制造陶瓷主冠和陶瓷主冠的方法
公开(公告)号：US09458062B2
公开(公告)日：2016-10-04
申请号：US13503440
申请日：2010-12-14
申请人： Yong-Su Kim , Hyun-Jun Jeon , Kyung Sik Oh , Sung Ki Kim , Se-Hoon Kim , Joon Hyung Kim , Young Pyo Hong
发明人： Yong-Su Kim , Hyun-Jun Jeon , Kyung Sik Oh , Sung Ki Kim , Se-Hoon Kim , Joon Hyung Kim , Young Pyo Hong
IPC分类号： A61C13/08 , C04B35/117 , A61C13/083 , C04B35/488 , C04B35/626 , C04B35/632 , C04B35/634 , C04B35/638 , A61C13/20 , B28B1/24
CPC分类号： C04B35/117 , A61C13/081 , A61C13/083 , A61C13/206 , B28B1/24 , C04B35/488 , C04B35/6261 , C04B35/6264 , C04B35/632 , C04B35/63408 , C04B35/63416 , C04B35/638 , C04B2235/3232 , C04B2235/3272 , C04B2235/6022 , C04B2235/656 , C04B2235/6562 , C04B2235/6565 , C04B2235/6567 , C04B2235/9661
摘要： A method of manufacturing a ceramic primary crown including mixing a source material including zirconia or alumina that configures a frame of a primary crown, a polymer for reducing viscosity and applying ductility upon injection molding, and a toner for providing the same or similar color as baby teeth, heating the polymer contained in the mixed source material to have ductility, injection molding the heated source material, extracting the polymer to reduce brittleness and increase ductility with respect to the injection-molded matter, removing fat to completely eliminate the polymer element from the injection-molded matter, from which the polymer is partially extracted through the polymer extraction, sintering the fat-removed body, from which the polymer is removed, to improve mechanical properties, and polishing an outer surface of the sintered body to provide gloss, and performing barrel-finishing to remove a burr.
摘要翻译：一种制造陶瓷初级冠的方法，包括混合构成主冠框架的氧化锆或氧化铝的源材料，用于降低粘度的聚合物和注射成型时的延展性，以及用于提供与宝宝相同或相似颜色的调色剂加热包含在混合源材料中的聚合物以具有延展性，注射模制加热的源材料，提取聚合物以降低脆性并增加相对于注射成型物质的延展性，除去脂肪以从通过聚合物提取部分地提取聚合物的注射成型物质，烧结去除聚合物的除脂体，以改善机械性能，并且研磨烧结体的外表面以提供光泽，以及进行滚筒整理以去除毛刺。

35. 发明申请

US20160285435A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20160285435A1
公开(公告)日：2016-09-29
申请号：US15077438
申请日：2016-03-22
申请人： HYUN-CHUL HWANG , MIN-SU KIM
发明人： HYUN-CHUL HWANG , MIN-SU KIM
IPC分类号： H03K3/012 , H03K3/356
CPC分类号： H03K3/012 , H03K3/356191
摘要： A semiconductor circuit includes a first circuit determining a voltage of a first node in response to the clock signal and the input data signal, a first latch determining a voltage of a second node in response to the clock signal and the voltage of the first node, and a second circuit determining a voltage of a third node in response to the clock signal and the voltage of the second node. The output data signal is provided in response to the voltage of the third node, the clock signal controls a flip-flop operation with respect to the input data signal and the output data signal, and respective voltages are maintained constant at the first node, second node and third node regardless of level transitions in the clock signal so long as a level of the input data signal is maintained constant.
摘要翻译：半导体电路包括响应于时钟信号和输入数据信号确定第一节点的电压的第一电路，响应于时钟信号和第一节点的电压确定第二节点的电压的第一锁存器，以及响应于所述时钟信号和所述第二节点的电压确定第三节点的电压的第二电路。输出数据信号响应于第三节点的电压被提供，时钟信号控制相对于输入数据信号和输出数据信号的触发器操作，并且各个电压在第一节点保持恒定，第二节点和第三节点，而不管时钟信号中的电平转换如何，只要输入数据信号的电平保持恒定即可。

36. 发明授权

US09450584B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09450584B2
公开(公告)日：2016-09-20
申请号：US14870351
申请日：2015-09-30
申请人： Min-Su Kim
发明人： Min-Su Kim
IPC分类号： H03K19/0175 , H03K19/0185 , H03K19/20 , H03K3/356
CPC分类号： H03K19/018507 , H03K3/012 , H03K3/356 , H03K3/356173 , H03K19/0016 , H03K19/20
摘要： A semiconductor device includes a first circuit applying an enable signal having a first logic level and a clock signal having the first logic level, supplying a first voltage to a first node and converting a voltage level of the first node into a second logic level different from the first logic level, and a second circuit applying an enable signal having the second logic level and a clock signal having the first logic level, supplying a second voltage to a second node different from the first node and converting a voltage level of the second node into the second logic level. The second circuit includes an operation circuit performing a NAND operation on the logic level of the enable signal and the voltage level of the second node, and a switch turned on in response to an output of the operation circuit and supplying the second voltage to the second node.
摘要翻译：半导体器件包括施加具有第一逻辑电平的使能信号和具有第一逻辑电平的时钟信号的第一电路，向第一节点提供第一电压并将第一节点的电压电平转换成不同于第一逻辑电平的第二逻辑电平第一逻辑电平，以及施加具有第二逻辑电平的使能信号和具有第一逻辑电平的时钟信号的第二电路，向不同于第一节点的第二节点提供第二电压，并且转换第二节点的电压电平进入第二个逻辑水平。第二电路包括对使能信号的逻辑电平和第二节点的电压电平执行NAND运算的运算电路，以及响应于运算电路的输出而导通的开关，并将第二电压提供给第二电路节点。

37. 发明授权

US09450049B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09450049B2
公开(公告)日：2016-09-20
申请号：US14276421
申请日：2014-05-13
申请人： Tae-Yong Kwon , Sang-Su Kim , Jung-Gil Yang , Jung-Dal Choi
发明人： Tae-Yong Kwon , Sang-Su Kim , Jung-Gil Yang , Jung-Dal Choi
IPC分类号： H01L27/00 , H01L29/10 , H01L29/205 , H01L29/78 , H01L29/165 , H01L27/088 , H01L21/8238 , H01L21/84 , H01L29/66 , H01L27/092 , H01L27/12
CPC分类号： H01L29/1054 , H01L21/823821 , H01L21/845 , H01L27/088 , H01L27/0924 , H01L27/1211 , H01L29/165 , H01L29/20 , H01L29/205 , H01L29/66522 , H01L29/6681 , H01L29/78 , H01L29/7842 , H01L29/785
摘要： A semiconductor device includes a substrate, a compound semiconductor layer, and first and second semiconductor patterns. The substrate includes first and second regions. The first semiconductor pattern is on the compound semiconductor layer of the first region and includes an element semiconductor. The second semiconductor pattern is on the compound semiconductor layer of the second region and includes a Group III-V semiconductor material.
摘要翻译：半导体器件包括衬底，化合物半导体层以及第一和第二半导体图案。衬底包括第一和第二区域。第一半导体图案在第一区域的化合物半导体层上，并且包括元件半导体。第二半导体图案在第二区域的化合物半导体层上，并且包括III-V族半导体材料。

38. 发明授权

US09443536B2 Apparatus and method for detecting voice based on motion information 有权
标题翻译：基于运动信息检测语音的装置和方法
公开(公告)号：US09443536B2
公开(公告)日：2016-09-13
申请号：US12770086
申请日：2010-04-29
申请人： Jeong-Mi Cho , Jeong-Su Kim , Won-Chul Bang , Nam-Hoon Kim
发明人： Jeong-Mi Cho , Jeong-Su Kim , Won-Chul Bang , Nam-Hoon Kim
IPC分类号： H04N7/14 , G10L25/78 , G06F3/01 , G06F3/0346 , G06K9/00 , G10L15/24 , G06K9/32
CPC分类号： G10L25/78 , G06F3/017 , G06F3/0346 , G06K9/00335 , G06K2009/3225 , G10L15/24
摘要： Disclosed are an apparatus and method of deducing a user's intention using motion information. The user's intention deduction apparatus includes a speech intention determining unit configured to predict a speech intention regarding a user's speech using motion information sensed by at least one motion capture sensor, and a controller configured to control operation of detecting a voice section from a received sound signal based on the predicted speech intention.
摘要翻译：公开了使用运动信息推导用户意图的装置和方法。用户意图扣除装置包括：语音意图确定单元，被配置为使用由至少一个运动捕捉传感器感测的运动信息来预测关于用户的语音的语音意图;以及控制器，被配置为控制从接收到的声音信号中检测语音部分的操作基于预测的言语意图。

39. 发明授权

US09412720B2 Semiconductor package having supporting plate and method of forming the same 有权
标题翻译：具有支撑板的半导体封装及其形成方法
公开(公告)号：US09412720B2
公开(公告)日：2016-08-09
申请号：US14184951
申请日：2014-02-20
申请人： Tae-Duk Nam , Jin-Ho Kim , Hyuk-Su Kim , Hyoung-Suk Kim , Tae-Young Lee
发明人： Tae-Duk Nam , Jin-Ho Kim , Hyuk-Su Kim , Hyoung-Suk Kim , Tae-Young Lee
IPC分类号： H01L25/065 , H01L25/00 , H01L23/31 , H01L23/00 , H01L25/18
CPC分类号： H01L25/0657 , H01L23/3128 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/97 , H01L25/18 , H01L25/50 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2224/16265 , H01L2224/291 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/32265 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06562 , H01L2924/01013 , H01L2924/1434 , H01L2924/1436 , H01L2924/1437 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19105 , H01L2924/014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： A semiconductor package may include a packaging substrate, a first semiconductor chip on the packaging substrate, and a support plate on the packaging substrate. The support plate may be spaced apart from the first semiconductor chip in a direction parallel with respect to a surface of the packaging substrate. A second semiconductor chip may be provided on the first semiconductor chip and on the support plate so that the first semiconductor chip is between the second semiconductor chip and the packaging substrate and so that the support plate is between the second semiconductor chip and the packaging substrate. An adhesion layer may bond the second semiconductor chip to the first semiconductor chip and may bond the second semiconductor chip to the support plate. In addition, an electrical coupling may be provided between the first semiconductor chip and the packaging substrate.
摘要翻译：半导体封装可以包括封装衬底，封装衬底上的第一半导体芯片，以及封装衬底上的支撑板。支撑板可以在相对于包装基板的表面平行的方向上与第一半导体芯片间隔开。可以在第一半导体芯片和支撑板上设置第二半导体芯片，使得第一半导体芯片在第二半导体芯片和封装基板之间，并且支撑板位于第二半导体芯片和封装基板之间。粘合层可以将第二半导体芯片接合到第一半导体芯片，并且可以将第二半导体芯片接合到支撑板。此外，可以在第一半导体芯片和封装基板之间设置电耦合。

40. 发明申请

US20160154299A1 PELLICLE AND EXPOSURE MASK INCLUDING THE SAME 有权
标题翻译：包装和包装包装
公开(公告)号：US20160154299A1
公开(公告)日：2016-06-02
申请号：US14849235
申请日：2015-09-09
申请人： Jae-hyuck CHOI , Jin-su KIM , Kyoung-mi KIM , Byung-gook KIM
发明人： Jae-hyuck CHOI , Jin-su KIM , Kyoung-mi KIM , Byung-gook KIM
IPC分类号： G03F1/64
CPC分类号： G03F1/64
摘要： A pellicle includes a pellicle frame, a pellicle membrane, and an attaching element, a first surface of the attaching element having exposed pores.
摘要翻译：防护薄膜组件包括防护薄膜框架，防护薄膜和附着元件，附接元件的第一表面具有暴露的孔。

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