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21. 发明申请

WO0156167A3 A MULTIPLIERLESS INTERPOLATOR FOR A DELTA-SIGMA DIGITAL TO ANALOG CONVERTER 审中-公开
标题翻译：用于三角形数字转换器的多功能插补器
公开(公告)号：WO0156167A3
公开(公告)日：2002-03-14
申请号：PCT/US0102744
申请日：2001-01-26
申请人： SONIC INNOVATIONS INC
发明人： WILSON GERALD , GREEN ROBERT S
IPC分类号： H03H17/02 , H03H17/04 , H03H17/06
CPC分类号： H03H17/0225 , H03H17/0279 , H03H17/0285 , H03H17/0416 , H03H17/0444
摘要： A simplified algorithm for digital signal interpolation and a novel architecture to implement the algorithm in an integrated circuit ("IC") with significant space constraints are presented. According to the embodiments of the present invention, the interpolator is divided into two parts. The first part of the interpolator increases the sample rate by a factor of two and smoothes the signal using a half-band Infinite Impulse Response ("IIR") filter. The second part of the interpolator increases the sample rate of the signal by a factor of thirty-two using a zero-order-hold ("ZOH") circuit. In one embodiment, the half-band IIR filter is implemented using an all-pass lattice structure to minimize quantization effects. The lattice coefficients are chosen such that the structure can achieve all filter design requirements, yet is capable of being implemented with a small number of shifters and adders, and no multipliers.
摘要翻译：提出了一种用于数字信号插值的简化算法和一种在具有显着空间约束的集成电路（“IC”）中实现该算法的新型架构。根据本发明的实施例，内插器被分成两部分。插值器的第一部分将采样率提高一倍，并使用半带无限脉冲响应（“IIR”）滤波器对信号进行平滑。内插器的第二部分使用零级保持（“ZOH”）电路将信号的采样率增加了三十二倍。在一个实施例中，使用全通格格结构来实现半带IIR滤波器以使量化效应最小化。选择晶格系数使得该结构可以实现所有滤波器设计要求，但是能够用少量的移位器和加法器实现，并且不需要乘法器。

22. 发明公开

EP3055928A1 MULTI-BRANCH DOWN CONVERTING FRACTIONAL RATE CHANGE FILTER 审中-公开
标题翻译：美孚VERZWEIGTERABWÄRTSUMWANDLUNGSFILTERMIT NICHTGANZZAHLIGERRATENÄNDERUNG
公开(公告)号：EP3055928A1
公开(公告)日：2016-08-17
申请号：EP14781669.8
申请日：2014-07-25
申请人： Telefonaktiebolaget LM Ericsson (publ)
发明人： HIND, Joleen , LAPORTE, Pierre-Andre
IPC分类号： H03H17/02 , H03H17/06
CPC分类号： H04L25/0262 , H03H17/0275 , H03H17/0416 , H03H17/0621 , H03H17/0685 , H03H2220/06
摘要： A method of filtering an input sample stream having a downsampling rate is disclosed to generate an output sample stream having an upsampling rate that is less than the downsampling rate. The input sample stream is input to a rate change filter having multiple filter branches. The input sample stream is filtered at each of the multiple filter branches to output filtered sample substreams. Each of the multiple filter branches have filter coefficients corresponding to a different phase of the filter response. The filtered sample substreams are stored in a memory and the stored filtered sample substreams are combined to generate the output sample stream.
摘要翻译：公开了一种对具有下采样率的输入采样流进行滤波的方法，以产生具有小于下采样率的上采样率的输出采样流。输入采样流被输入到具有多个滤波器分支的速率变化滤波器。输入样本流在多个滤波器分支中的每一个处进行滤波以输出滤波后的样本子流。多个滤波器分支中的每一个具有对应于滤波器响应的不同相位的滤波器系数。将经过滤的样本子流存储在存储器中，并且存储的过滤样本子流被组合以产生输出样本流。

23. 发明公开

EP1548940A1 Sample rate converter 审中-公开
标题翻译： Abtastratenumsetzer
公开(公告)号：EP1548940A1
公开(公告)日：2005-06-29
申请号：EP03029325.2
申请日：2003-12-18
申请人： Harman Becker Automotive Systems GmbH
发明人： Azizi, Seyed Ali Dr.
IPC分类号： H03H17/04
CPC分类号： H03H17/0416 , H03H17/0288
摘要： A sample rate converter for converting a digital input signal having a first sample rate into a digital output signal having a second sample rate, wherein the second sample rate is different from the first sample rate; said sample rate converter comprises a digital interpolation filter receiving the input signal and comprising a digital zero-phase filter, and a digital polynom interpolator connected to the interpolation filter and providing the output signal.
摘要翻译：一种用于将具有第一采样率的数字输入信号转换为具有第二采样率的数字输出信号的采样率转换器，其中第二采样率不同于第一采样率; 所述采样率转换器包括接收输入信号并包括数字零相位滤波器的数字内插滤波器和连接到内插滤波器并提供输出信号的数字多项式内插器。

24. 发明授权

EP0940009B1 KAMMFILTER 有权
标题翻译：梳状滤波器
公开(公告)号：EP0940009B1
公开(公告)日：2004-02-18
申请号：EP98951189.4
申请日：1998-08-21
申请人： Infineon Technologies AG
发明人： DRAXELMAYR, Dieter
IPC分类号： H03H17/04 , H03H17/02
CPC分类号： H03H17/045 , H03H17/0251 , H03H17/0416
摘要： The invention relates to a comb filter consisting of integrators (I1, I2, I3) connected in series, to which a digital data flow with high scanning rate is fed in order to supply a digital data flow with a lower scanning rate. The most significant bits of the digital data flow are reset in the first and second integrators (I1, I2), whereby the resetting of the bits in the first integrator (I1) is stored in a counter (Z). The count of the counter (Z) is fed to the most significant bits of the last integrator (I3) during reset time.

25. 发明公开

EP1184980A2 Digital receiver 审中-公开
标题翻译： DigitalerEmpfänger
公开(公告)号：EP1184980A2
公开(公告)日：2002-03-06
申请号：EP01306378.9
申请日：2001-07-25
申请人： Pioneer Corporation
发明人： Ohashi, Toru
IPC分类号： H03H17/04
CPC分类号： H03H17/0416
摘要： Such a digital receiver comprises a digital band-pass filter 16 for performing digital filtering on digital data D IF of the intermediate frequency, the digital data D IF frequency-converted by a frequency converter and undergone analog-to-digital conversion, at a first sampling rate equal to an exponentiation multiple of 2 of the intermediate frequency, and an interpolation filter 17 for performing digital filtering on digital data D BF output from the digital band-pass filter 16 at a second sampling rate equal to an exponentiation multiple of 2 of the intermediate frequency and outputting the resulting data to a detection circuit 18.
摘要翻译：这种数字接收机包括数字带通滤波器16，用于对中频数字数据DIF执行数字滤波，数字数据DIF由频率转换器频率转换并经过模数转换，以第一采样率等于中频2的乘方倍数，以及内插滤波器17，用于对数字带通滤波器16输出的数字数据DBF进行数字滤波，第二采样率等于中频2的乘方倍数并将得到的数据输出到检测电路18。

26. 发明公开

EP1079758A1 FORWARD-BACKWARD CHANNEL INTERPOLATOR 审中-公开
标题翻译：插值成正向反向信道
公开(公告)号：EP1079758A1
公开(公告)日：2001-03-07
申请号：EP99925803.1
申请日：1999-05-25
申请人： GLENAYRE ELECTRONICS, INC.
发明人： REY, Claudio, G. , KATIC, Ognjen, B.
IPC分类号： A61B19/00 , H03M13/00 , H03H7/30
CPC分类号： H03H17/0461 , H03H17/0288 , H03H17/0416 , H04L25/0232 , H04L2025/0349
摘要： An interpolator (40) having a linear response has a first stage implemented with an IIR filter (42) to achieve the narrow transition bandwidth with relatively few filter coefficients. Zero-stuffing and filtering are used to achieve the interpolation. A forward-backward filtering methodology is then used to achieve a linear phase response for the IIR filter (42). The input sequence to be interpolated is zero stuffed and passed through the IIR filter (42) a first time. Then the time order of the resulting sequence is reversed and then passed through the IIR filter (42) a second time. After that, the resulting output sequence is reversed again. Guard blocks are added to both ends of the input sequence and then a block of zeros is appended to the zero-stuffed guarded input sequence. The appended zero block causes the startup and ending transient effect of the IIR filter's step response (42) to be equal at both ends, which tends to improve the accuracy of the interpolation. Subsequent zero-stuffing and filtering by the FIR filter (44) stages are used to further increase the interpolation. A linear interpolator may also be included after the FIR filter (44) stages.

27. 发明专利

JP4240547B2 Comb filter 有权
公开(公告)号：JP4240547B2
公开(公告)日：2009-03-18
申请号：JP51841099
申请日：1998-08-21
申请人：シーメンスアクチエンゲゼルシヤフト
发明人：ドラクセルマイルディーター
IPC分类号： H03H17/00 , H03H17/02 , H03H17/04
CPC分类号： H03H17/045 , H03H17/0251 , H03H17/0416

28. 发明专利

JPS5779725A Digital filter 失效
标题翻译：数字滤波器
公开(公告)号：JPS5779725A
公开(公告)日：1982-05-19
申请号：JP15487280
申请日：1980-11-04
申请人： Victor Co Of Japan Ltd
发明人： KASUGA MASAO
IPC分类号： H03H17/00 , H03H17/02 , H03H17/04 , H03H17/06
CPC分类号： H03H17/0288 , H03H17/0416
摘要： PURPOSE:To enable to reduce the production of operation error remarkably, with lower order of digital filters, by the series connection between a definite impulse response digital filter and an infinite impulse response digital filter. CONSTITUTION:An input signal incoming to an input terminal 2 is applied to a low-pass filter 1 consisting of series connection of a definite impulse response (FIR) digital filter 3 and an infinite impulse response (IIR) 4. The FIR digital filter 3 has an amplitude characteristic canceling a peak around the roll off frequency of the amplitude characteristics of the IIR digital filter 4 and the IIR digital filter 4 has a straight line phase characteristic at pass band.
摘要翻译：目的：通过数字滤波器的低阶，通过确定的脉冲响应数字滤波器和无限脉冲响应数字滤波器之间的串联连接，可以显着降低运算误差的产生。构成：输入到输入端子2的输入信号被施加到低通滤波器1，该低通滤波器1由确定的脉冲响应（FIR）数字滤波器3和无限脉冲响应（IIR）4的串联连接组成。FIR数字滤波器3 具有消除IIR数字滤波器4的幅度特性的滚降频率附近的峰值，并且IIR数字滤波器4具有通带的直线相位特性。

29. 发明公开

KR1020160110607A 무선통신 시스템에서의 데이터 변환기를 위한 루프 필터 및 그에 따른 루프 필터 구현 방법 审中-实审
标题翻译：基于单操作放大器的3RD订单循环滤波器
公开(公告)号：KR1020160110607A
公开(公告)日：2016-09-22
申请号：KR1020150032620
申请日：2015-03-09
申请人： 한국전자통신연구원
发明人： 조영균 , 박봉혁 , 오정훈
IPC分类号： H03H11/04 , H03H17/04
CPC分类号： H03M3/44 , G06G7/18 , H03H11/0433 , H03H11/1252 , H03H11/126 , H03M3/438 , H03M3/458 , H03H11/0455 , H03H17/0411 , H03H17/0416
摘要： 안티앨리어싱필터링특성과전력소모특성모두를개선하는무선통신시스템에서의데이터변환기를위한루프필터가개시된다. 그러한루프필터는, 입력단에차례로연결된제1,3 저항들, 반전출력단과접지간에차례로연결된제4,2 저항들, 상기제1 저항의타단과상기제4 저항의일단사이에연결된제1 커패시터, 상기제4 저항의일단과상기출력단사이에연결된제2 커패시터, 상기제3 저항의타단과상기출력단사이에연결된제3 커패시터, 및상기제1 저항의타단에반전단이연결되고접지에비반전단이연결되어상기출력단으로연산증폭응답을출력하는연산증폭기를포함한다.
摘要翻译：公开了一种用于无线通信系统中用于提高抗混叠滤波特性和功耗特性的数据转换器的环路滤波器。这种环路滤波器包括：依次连接到输入端的第一和第三电阻器，顺序地连接在反相输出端子和地之间的第四和第二电阻器，连接在第一电阻器的一端和第一电阻器的一端之间的第一电容器第四电阻器，连接在第四电阻器的一端和输出端子之间的第二电容器，连接在第三电阻器的一端和输出端子之间的第三电容器和运算放大器，其包括连接到第一电阻器的一端的反相端子第一电阻器和非反相端子连接到地，并将放大的响应输出到输出端子。

30. 发明专利

JP4372184B2 Sample rate converter 有权
公开(公告)号：JP4372184B2
公开(公告)日：2009-11-25
申请号：JP2007244322
申请日：2007-09-20
申请人：株式会社東芝
发明人：武司上野 , 雅則古田 , 隆文山路
IPC分类号： H03H17/00 , H03H17/02 , H03H17/04
CPC分类号： H03H17/04 , H03H17/0416

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