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21. 发明申请

WO2009005239A3 VOLTAGE AMPLIFIER AND DRIVING DEVICE OF DISPLAY DEVICE USING THE VOLTAGE AMPLIFIER 审中-公开
标题翻译：使用电压放大器的电压放大器和显示设备的驱动装置
公开(公告)号：WO2009005239A3
公开(公告)日：2009-02-26
申请号：PCT/KR2008003595
申请日：2008-06-24
申请人： MC TECHNOLOGYCO LTD , KIM BYUNG-DOO , PARK HEE-JONG , NO JU-YOUNG , LEE SANG-HOON
发明人： KIM BYUNG-DOO , PARK HEE-JONG , NO JU-YOUNG , LEE SANG-HOON
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G2330/021 , H03F1/34 , H03F3/3022 , H03F3/45183 , H03F3/45192 , H03F3/45475 , H03F2200/297 , H03F2203/30021 , H03F2203/45028 , H03F2203/45632
摘要： An amplifying circuit of a display device including a plurality of pixels includes an input unit, a bias unit, and an output unit. The input unit is coupled between a first power source for supplying a first voltage and a second power source for supplying a second voltage, receives a first input signal and a second input signal, and is controlled by the first and second input signals. The bias unit receives a bias voltage for operating the input unit, and includes a first node and a second node controllable by the input unit. The output unit applies an output voltage to a pixel by using a first output transistor turned on/off by a signal applied to the first node and a second output transistor turned on/off by a signal applied to the second node, and the first output transistor is a different type to the second output transistor. In this instance, the input unit includes a first input transistor having a first terminal coupled to a first power source and being turned on/off by a first input signal and a second input transistor of the same type as the first input transistor, having a first terminal coupled to the first power source, and being turned on/off by a second input signal. The bias unit includes a first transistor controllable by the on/off state of the first input transistor and a second transistor controllable by the on/off state of the second input transistor.
摘要翻译：包括多个像素的显示装置的放大电路包括输入单元，偏置单元和输出单元。输入单元耦合在用于提供第一电压的第一电源和用于提供第二电压的第二电源之间，接收第一输入信号和第二输入信号，并且由第一和第二输入信号控制。偏置单元接收用于操作输入单元的偏置电压，并且包括可由输入单元控制的第一节点和第二节点。输出单元通过使用通过施加到第一节点的信号而导通/截止的第一输出晶体管和通过施加到第二节点的信号导通/截止的第二输出晶体管向像素施加输出电压，并且第一输出晶体管与第二输出晶体管的类型不同。在这种情况下，输入单元包括第一输入晶体管，该第一输入晶体管具有耦合到第一电源的第一端子并且由第一输入信号和与第一输入晶体管相同类型的第二输入晶体管导通/截止，具有耦合到第一电源的第一端子，并且由第二输入信号导通/关断。偏置单元包括可由第一输入晶体管的导通/截止状态控制的第一晶体管和可由第二输入晶体管的导通/截止状态控制的第二晶体管。

22. 发明申请

WO2004062096A2 SUBTRAHIERERSCHALTUNG UND LEISTUNGSDETEKTORANORDNUNG MIT DER SUBTRAHIERERSCHALTUNG 审中-公开
标题翻译：与减法减法器和功率检测器装置
公开(公告)号：WO2004062096A2
公开(公告)日：2004-07-22
申请号：PCT/DE2003/004198
申请日：2003-12-18
申请人： INFINEON TECHNOLOGIES AG , DONIG, Günter
发明人： DONIG, Günter
IPC分类号： H03F3/45
CPC分类号： H03F1/22 , H03F3/45085 , H03F2203/45352 , H03F2203/45471 , H03F2203/45476 , H03F2203/45632 , H03F2203/45692
摘要： Es ist eine Subtrahiererschaltung (1) angegeben, die an einem Ausgang (OUT2) ein zu einer am Eingang (2, 3) anliegenden Differenz (UD) zweier Signalpegel proportionales Signal liefert. Am Ausgang eines Operationsverstärkers (4) der Subtrahiererschaltung (1) sind zwei gleichlaufende Signalquellen (OUT1, OUT2) gebildet, von denen eine (OUT1) zur Rückführung von einem der beiden gleichartigen Ausgänge auf einen Eingang (5) des Operationsverstärkers (4) dient. Gemäß dem vorgeschlagenen Prinzip wird ein Rückführungswiderstand vermieden, der in analogen Subtrahiererschaltungen normalerweise vorhanden ist. Der veränderte Spannungshub am Ausgang des Operationsverstärkers (4) ermöglicht es, diesen ohne negative Versorgungsspannung betreiben zu können. Die beschriebene Subtrahiererschaltung (1) ist insbesondere zur Leistungsdetektion mit eingangsseitigem Leistungsdetektor (11) geeignet.
摘要翻译：提供了一种减法器电路（1），其在其输出端（OUT2）嵌合到在输入端（2，3）两个信号电平的差（UD）提供比例信号。在运算放大器的输出端（4）的减法器电路（1）的两个并发源（OUT1，OUT2）中形成，其中之一（OUT1）用于返回从两个类似的输出中的一个（4）的运算放大器的一个输入端（5）。根据所提出的原理，一个反馈电阻被避免，这是在模拟电路减法器通常存在。在运算放大器（4）的输出处的改变的电压摆动，能够无负电源电压操作它们。描述的减法器电路（1）是特别适合于与输入功率检测器（11）的功率检测。

23. 发明授权

KR100869859B1 증폭 회로 및 이를 이용하는 표시 장치의 구동 장치 失效
标题翻译：使用电压放大器的显示装置的电压放大器和驱动装置
公开(公告)号：KR100869859B1
公开(公告)日：2008-11-24
申请号：KR1020070065140
申请日：2007-06-29
申请人： (주)엠씨테크놀로지
发明人： 김병두 , 박희종 , 노주영 , 이상훈
IPC分类号： G09G3/36 , G02F1/133 , H03F3/45 , H03K19/0175
CPC分类号： G09G3/3688 , G09G2330/021 , H03F1/34 , H03F3/3022 , H03F3/45183 , H03F3/45192 , H03F3/45475 , H03F2200/297 , H03F2203/30021 , H03F2203/45028 , H03F2203/45632
摘要： An amplifier and a driving device of a display device using the same reduce a size of the whole circuit by reducing the number of input transistors. An input unit(810) is connected between a first power source supplying the first voltage and a second power source supplying the second voltage. An input unit receives the first input signal and the second input signal and is controlled according to the first and second input signals. A bias unit(820) receives a bias voltage for operating the input unit and includes a first node and a second node controlled by the input unit. A first output transistor is turned on and off according to the signal applied to the first node. A second output transistor is turned on and off according to the signal applied to the second node. An output unit(830) applies an output voltage to a pixel by using the first output transistor and the second output transistor.
摘要翻译：使用其的显示装置的放大器和驱动装置通过减少输入晶体管的数量来减小整个电路的尺寸。输入单元（810）连接在提供第一电压的第一电源和提供第二电压的第二电源之间。输入单元接收第一输入信号和第二输入信号，并根据第一和第二输入信号进行控制。偏置单元（820）接收用于操作输入单元的偏置电压，并且包括由输入单元控制的第一节点和第二节点。第一输出晶体管根据施加到第一节点的信号而导通和截止。第二输出晶体管根据施加到第二节点的信号而导通和截止。输出单元（830）通过使用第一输出晶体管和第二输出晶体管将输出电压施加到像素。

24. 发明公开

KR1020140135109A 신호 처리 회로, 리졸버 디지털 컨버터 및 멀티패스 네스티드 미러 증폭 회로 审中-实审
标题翻译：信号处理电路，分辨率数字转换器和多路径镜像放大器
公开(公告)号：KR1020140135109A
公开(公告)日：2014-11-25
申请号：KR1020140057202
申请日：2014-05-13
申请人： 르네사스 일렉트로닉스 가부시키가이샤
发明人： 후나또요시히로 , 구마모또도시오 , 요시자와도모아끼 , 구로오까가즈아끼
IPC分类号： H03F3/34 , H03F3/38
CPC分类号： H03F3/2171 , H03F3/005 , H03F3/393 , H03F3/45179 , H03F3/45192 , H03F3/45762 , H03F3/45946 , H03F2200/264 , H03F2200/271 , H03F2200/375 , H03F2200/408 , H03F2200/411 , H03F2200/81 , H03F2203/45012 , H03F2203/45028 , H03F2203/45116 , H03F2203/45136 , H03F2203/45138 , H03F2203/45174 , H03F2203/45212 , H03F2203/45512 , H03F2203/45528 , H03F2203/45558 , H03F2203/45594 , H03F2203/45601 , H03F2203/45604 , H03F2203/45631 , H03F2203/45632 , H03F2203/45634 , H03F2203/45641 , H03F2203/45681 , H03F2203/45698 , H03F2203/45726
摘要： 초퍼 증폭기의 출력을 가산 처리하여, 오프셋 전압을 제거한 신호를 생성하는 경우, 그 가산 처리를 행하는 회로에 기인하는 오프셋 전압이, 더 중첩된다. 신호 처리 회로(1)는 차동 입력 신호(Vsp(t)/Vsm(t))를 증폭하는 차동 증폭 회로(AMP1)를 갖는 초퍼 증폭기(1A)와, 초퍼 증폭기가 생성하는 초퍼 출력 신호(Vsub(t))를 가산하여, 가산 신호(Vfil(t))를 생성하는 가산 회로(1B)를 구비한다. 차동 증폭 회로에 입력되는 차동 신호는, 제어 클록(CLK1)의 제1 위상 기간 및 제2 위상 기간마다 교체되고, 가산 회로는, 제1 위상 기간 및 제2 위상 기간에 있어서의 초퍼 출력 신호를 가산하여, 가산 신호를 생성한다.
摘要翻译：如果通过执行斩波放大器的输出的相加处理产生没有偏移电压的信号，则叠加由于执行加法处理的电路引起的偏移电压。信号处理电路（1）包括：斩波放大器（1A），其包括放大差分输入信号（Vsp（t）/ Vsm（t））的差分放大器电路（AMP1）; 和加法电路（1B），通过将斩波放大器产生的斩波输出信号（Vsub（t））相加，生成加法信号（Vfil（t））。输入到差分放大器电路的差分信号在控制时钟（CLK1）的每第一相位周期和第二相位周期互换。加法器电路通过在第一相位周期和第二相位周期中相加斩波器输出信号来生成相加信号。

25. 发明公开

KR1020170107479A 증폭 회로 审中-实审
标题翻译：放大电路
公开(公告)号：KR1020170107479A
公开(公告)日：2017-09-25
申请号：KR1020177022652
申请日：2016-07-19
申请人： 선전 구딕스 테크놀로지 컴퍼니, 리미티드
发明人： 장,멩웬
IPC分类号： H03F3/45 , H03F1/30 , H03F3/00
CPC分类号： H03F1/0205 , H03F1/301 , H03F1/32 , H03F3/005 , H03F3/187 , H03F3/45183 , H03F3/45188 , H03F3/45192 , H03F3/45475 , H03F3/45659 , H03F3/45699 , H03F3/45762 , H03F2200/129 , H03F2200/156 , H03F2200/159 , H03F2200/18 , H03F2200/222 , H03F2200/252 , H03F2200/264 , H03F2200/471 , H03F2200/555 , H03F2203/45008 , H03F2203/45012 , H03F2203/45024 , H03F2203/45028 , H03F2203/45054 , H03F2203/45068 , H03F2203/45082 , H03F2203/45112 , H03F2203/45134 , H03F2203/45136 , H03F2203/45171 , H03F2203/45174 , H03F2203/45182 , H03F2203/45188 , H03F2203/45192 , H03F2203/45208 , H03F2203/45244 , H03F2203/45332 , H03F2203/45421 , H03F2203/45434 , H03F2203/45444 , H03F2203/45512 , H03F2203/45514 , H03F2203/45534 , H03F2203/45544 , H03F2203/45546 , H03F2203/45551 , H03F2203/45586 , H03F2203/45588 , H03F2203/45616 , H03F2203/45632 , H03F2203/45642 , H03F2203/45656 , H03F2203/45674 , H03F2203/45676 , H03F3/4547
摘要： 본원발명은, 리어(post) 공통모드전압에의해제1 참조전압, 제2 참조전압및 참조공통모드전압을발생시키는참조전압발생회로; 상기참조공통모드전압에의해프론트(pre) 출력차분신호를차분입력신호로변환시키는공통모드전압변환회로; 및신속하게상기증폭서브회로의공통모드마이너스피드백을구축하도록제어전압을발생시키는공통모드마이너스피드백회로를포함하되, 상기제1 참조전압및 상기제2 참조전압은상기프리출력차분신호의기저신호를제공하는증폭회로를제공한다. 본원발명에서제공되는증폭회로는기저신호를제거하고공통모드전압을변환시키며신속하게공통모드마이너스피드백을구축시킬수 있다.
摘要翻译：本发明还提供一种参考电压产生电路，用于产生释放1参考电压，第二参考电压和参考共模电压为后共模电压; 一种共模电压转换电路，用于通过基准共模电压将预输出差分信号转换为差分输入信号; 本发明公开一种用于快速产生控制电压以建立放大子电路的共模负反馈的共模负反馈电路，其中第一参考电压和第二参考电压产生预放大子电路的基极信号，提供放大电路。本发明提供的放大电路可以去除基极信号，转换共模电压，快速建立共模负反馈。

26. 发明授权

EP3021482B1 OPERATIONAL AMPLIFIER BASED CIRCUIT WITH COMPENSATION CIRCUIT BLOCK USED FOR STABILITY COMPENSATION 有权
公开(公告)号：EP3021482B1
公开(公告)日：2018-09-19
申请号：EP15191878.6
申请日：2015-10-28
申请人： MediaTek Inc.
发明人： Yu, Chi-Yao
IPC分类号： H03F1/02 , H03F1/42 , H03F1/48 , H03F3/45 , H03F1/14 , H03F1/08 , H03F3/193
CPC分类号： H03F1/0205 , H03F1/086 , H03F1/14 , H03F1/42 , H03F1/483 , H03F3/193 , H03F3/45179 , H03F3/45183 , H03F3/45659 , H03F2200/129 , H03F2200/135 , H03F2200/144 , H03F2200/153 , H03F2200/165 , H03F2200/411 , H03F2200/555 , H03F2200/75 , H03F2200/91 , H03F2203/45036 , H03F2203/45051 , H03F2203/45074 , H03F2203/45082 , H03F2203/45088 , H03F2203/45116 , H03F2203/45134 , H03F2203/45151 , H03F2203/45156 , H03F2203/45178 , H03F2203/45188 , H03F2203/45208 , H03F2203/45264 , H03F2203/45332 , H03F2203/45336 , H03F2203/45338 , H03F2203/45418 , H03F2203/45422 , H03F2203/45424 , H03F2203/45434 , H03F2203/45512 , H03F2203/45526 , H03F2203/45528 , H03F2203/45544 , H03F2203/45546 , H03F2203/45548 , H03F2203/45594 , H03F2203/45601 , H03F2203/45631 , H03F2203/45632 , H03F2203/45642 , H03F2203/45644 , H03F2203/45646 , H03F2203/45648 , H03F2203/45702
摘要： An operational amplifier based circuit (100) has an operational amplifier (102), a feedback circuit (104), and a compensation circuit block (106). The feedback circuit (104) is coupled between an output port and an input port of the operational amplifier (102). The compensation circuit block (106) has circuits involved in stability compensation of the operational amplifier (102), wherein there is no stability compensation circuit driven at the output port of the operational amplifier (102).

27. 发明公开

EP3301813A1 DELTA SIGMA ANALOG-TO-DIGITAL CONVERTER, RADIO FRONT-END, RADIO RECEIVER, MOBILE TERMINAL AND BASE STATION 审中-公开
标题翻译： DELTA SIGMA模拟 - 数字转换器，无线电前端，无线电接收器，移动终端和基站
公开(公告)号：EP3301813A1
公开(公告)日：2018-04-04
申请号：EP16191806.5
申请日：2016-09-30
申请人： Intel IP Corporation
发明人： Kostack, Robert , Naeini, Ashkan
IPC分类号： H03M3/02 , H03F3/45
CPC分类号： H03M3/402 , H03F3/195 , H03F3/3022 , H03F3/45 , H03F3/45381 , H03F3/45475 , H03F3/45645 , H03F2200/294 , H03F2200/411 , H03F2203/45418 , H03F2203/45628 , H03F2203/45632 , H03F2203/45686 , H03F2203/45701 , H03F2203/45702 , H03M3/37 , H03M3/454
摘要： Examples provide a delta sigma analog-to-digital converter, a radio front-end, a radio receiver, a mobile terminal and a base station. The delta sigma analog-to-digital converter (100) is suitable for a differential radio frequency current signal. The delta sigma analog to digital converter includes an integrator (110) with a differential input for a differential current signal, and a differential output for a differential voltage signal. The delta sigma analog to digital converter further includes a quantizer (120) with a differential input for the differential voltage signal and a differential output for a digitalized signal. The delta sigma analog to digital converter further includes two or more digital-to-analog converters (130), each with a differential input for the digitalized signal and a differential output for a differential feedback current signal, resulting in two or more separate differential feedback current signals. The differential current signal is based on the two or more separate differential feedback current signals and the differential radio frequency current signal.
摘要翻译：示例提供了Δ-Σ模数转换器，无线电前端，无线电接收器，移动终端和基站。 Δ-Σ模数转换器（100）适用于差分射频电流信号。 Δ-Σ模数转换器包括具有用于差分电流信号的差分输入和用于差分电压信号的差分输出的积分器（110）。 Δ-Σ模数转换器还包括量化器（120），其具有用于差分电压信号的差分输入和用于数字化信号的差分输出。 Δ-Σ模数转换器还包括两个或更多数字 - 模拟转换器（130），每个转换器具有用于数字化信号的差分输入和用于差分反馈电流信号的差分输出，从而产生两个或更多个单独的差分反馈电流信号。差分电流信号基于两个或更多个单独的差分反馈电流信号和差分射频电流信号。

28. 发明公开

EP3261250A1 AMPLIFICATION CIRCUIT 有权
标题翻译：功率放大电路
公开(公告)号：EP3261250A1
公开(公告)日：2017-12-27
申请号：EP16885458.6
申请日：2016-07-19
申请人： Shenzhen Goodix Technology Co., Ltd.
发明人： ZHANG, Mengwen
IPC分类号： H03F3/45
CPC分类号： H03F1/0205 , H03F1/301 , H03F1/32 , H03F3/005 , H03F3/187 , H03F3/45183 , H03F3/45188 , H03F3/45192 , H03F3/45475 , H03F3/45659 , H03F3/45699 , H03F3/45762 , H03F2200/129 , H03F2200/156 , H03F2200/159 , H03F2200/18 , H03F2200/222 , H03F2200/252 , H03F2200/264 , H03F2200/471 , H03F2200/555 , H03F2203/45008 , H03F2203/45012 , H03F2203/45024 , H03F2203/45028 , H03F2203/45054 , H03F2203/45068 , H03F2203/45082 , H03F2203/45112 , H03F2203/45134 , H03F2203/45136 , H03F2203/45171 , H03F2203/45174 , H03F2203/45182 , H03F2203/45188 , H03F2203/45192 , H03F2203/45208 , H03F2203/45244 , H03F2203/45332 , H03F2203/45421 , H03F2203/45434 , H03F2203/45444 , H03F2203/45512 , H03F2203/45514 , H03F2203/45534 , H03F2203/45544 , H03F2203/45546 , H03F2203/45551 , H03F2203/45586 , H03F2203/45588 , H03F2203/45616 , H03F2203/45632 , H03F2203/45642 , H03F2203/45656 , H03F2203/45674 , H03F2203/45676
摘要： The present application provides an amplifying circuit comprising a reference voltage generating circuit, a common-mode voltage conversion circuit, a common-mode negative feedback circuit, and an amplifying sub-circuit. The reference voltage generating circuit generates a first reference voltage, a second reference voltage, and a reference common-mode voltage according to a post-stage common-mode voltage, the common-mode voltage conversion circuit converts the pre-stage output differential signal into a differential input signal according to the reference common-mode voltage, the common-mode negative feedback circuit generates a control voltage to quickly establish a common-mode negative feedback of the amplifying sub-circuit, wherein the first reference voltage and the second reference voltage are used to cancel a baseline signal of the pre-stage output differential signal. The amplifying circuit provided in the present application can eliminate the baseline signal, convert the common-mode voltage and quickly establish the common-mode negative feedback.
摘要翻译：本申请提供一种放大电路，包括参考电压产生电路，共模电压转换电路，共模负反馈电路和放大子电路。参考电压产生电路根据后级共模电压产生第一参考电压，第二参考电压和参考共模电压，共模电压转换电路将前级输出差分信号转换为根据所述参考共模电压产生差分输入信号，所述共模负反馈电路产生控制电压以快速建立所述放大子电路的共模负反馈，其中，所述第一参考电压和所述第二参考电压被用于消除前级输出差分信号的基线信号。本申请提供的放大电路可以消除基线信号，转换共模电压，快速建立共模负反馈。

29. 发明公开

EP1903672A2 Dreistufiger Verstärker 审中-公开
标题翻译： DreistufigerVerstärker
公开(公告)号：EP1903672A2
公开(公告)日：2008-03-26
申请号：EP07016969.3
申请日：2007-08-30
申请人： Micronas GmbH
发明人： Theus, Ulrich , Kessel, Jürgen
IPC分类号： H03F1/48 , H03F3/187 , H03F3/45
CPC分类号： H03F3/45968 , H03F1/486 , H03F3/187 , H03F3/45183 , H03F3/45475 , H03F3/45744 , H03F2200/03 , H03F2200/36 , H03F2203/45138 , H03F2203/45212 , H03F2203/45241 , H03F2203/45366 , H03F2203/45632
摘要： Die Erfindung betrifft eine Verstärkerschaltung mit Offset-Reduktion und ausreichend hoher Bandbreite mit zwei an Eingangsklemmen (1,2) parallel geschalteten Eingangsstufen (3,4) eines ersten Verstärkers (A), wobei die erste Eingangsstufe (3) mit den Eingangsklemmen direkt und die zweite Eingangsstufe (4) über einen zweiten Verstärker (B) angeschlossen ist, und wobei an den Ausgang des ersten Verstärkers (A) ein dritter Verstärker (C) geschaltet ist, wobei der zweite Verstärker (B) eine symmetrische Last aufweist.
摘要翻译：放大电路具有偏移减小和足够的带宽，其具有与输入端子（1,2）并联连接的一个放大器（A）的两个输入级（3,4）。前一个输入级与输入端直接连接，后者的输入级连接到另一个放大器（B）。第三放大器（C）连接在前一放大器的出口处，放大器具有对称负载。

30. 发明公开

EP3021482A1 OPERATIONAL AMPLIFIER BASED CIRCUIT WITH COMPENSATION CIRCUIT BLOCK USED FOR STABILITY COMPENSATION 有权
标题翻译：基于运算放大器的补偿电路模块电路用于稳定补偿
公开(公告)号：EP3021482A1
公开(公告)日：2016-05-18
申请号：EP15191878.6
申请日：2015-10-28
申请人： MediaTek, Inc
发明人： Yu, Chi-Yao
IPC分类号： H03F1/08 , H03F1/14 , H03F3/45 , H03F1/48
CPC分类号： H03F1/0205 , H03F1/086 , H03F1/14 , H03F1/42 , H03F1/483 , H03F3/193 , H03F3/45179 , H03F3/45183 , H03F3/45659 , H03F2200/129 , H03F2200/135 , H03F2200/144 , H03F2200/153 , H03F2200/165 , H03F2200/411 , H03F2200/555 , H03F2200/75 , H03F2200/91 , H03F2203/45036 , H03F2203/45051 , H03F2203/45074 , H03F2203/45082 , H03F2203/45088 , H03F2203/45116 , H03F2203/45134 , H03F2203/45151 , H03F2203/45156 , H03F2203/45178 , H03F2203/45188 , H03F2203/45208 , H03F2203/45264 , H03F2203/45332 , H03F2203/45336 , H03F2203/45338 , H03F2203/45418 , H03F2203/45422 , H03F2203/45424 , H03F2203/45434 , H03F2203/45512 , H03F2203/45526 , H03F2203/45528 , H03F2203/45544 , H03F2203/45546 , H03F2203/45548 , H03F2203/45594 , H03F2203/45601 , H03F2203/45631 , H03F2203/45632 , H03F2203/45642 , H03F2203/45644 , H03F2203/45646 , H03F2203/45648 , H03F2203/45702
摘要： An operational amplifier based circuit (100) has an operational amplifier (102), a feedback circuit (104), and a compensation circuit block (106). The feedback circuit (104) is coupled between an output port and an input port of the operational amplifier (102). The compensation circuit block (106) has circuits involved in stability compensation of the operational amplifier (102), wherein there is no stability compensation circuit driven at the output port of the operational amplifier (102).
摘要翻译：基于运算放大器的电路（100）具有运算放大器（102），反馈电路（104）和补偿电路块（106）。反馈电路（104）耦合在运算放大器（102）的输出端口和输入端口之间。补偿电路块（106）具有涉及运算放大器（102）的稳定性补偿的电路，其中在运算放大器（102）的输出端口处不存在稳定性补偿电路。

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