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21. 发明申请

US20130196855A1 SUPERCONDUCTING QUANTUM CIRCUIT HAVING A RESONANT CAVITY THERMALIZED WITH METAL COMPONENTS 有权
标题翻译：带有金属部件的谐振腔的超导量子电路
公开(公告)号：US20130196855A1
公开(公告)日：2013-08-01
申请号：US13362366
申请日：2012-01-31
申请人： Stefano Poletto , Chad T. Rigetti , Matthias Steffen
发明人： Stefano Poletto , Chad T. Rigetti , Matthias Steffen
IPC分类号： H01L39/04
CPC分类号： H01L39/04 , B82Y10/00 , G06N99/002
摘要： A quantum electronic circuit device includes a housing having an internal resonant cavity, a qubit disposed within a volume of the internal resonant cavity and a non-superconducting metallic material mechanically and thermally coupled to the qubit within the internal resonant cavity and contiguously extending to the exterior of the housing.
摘要翻译：量子电子电路装置包括壳体，其具有内部谐振腔，设置在内部谐振腔的体积内的量子位，以及机械地和热耦合到内部谐振腔内的量子位并且连续延伸到外部的非超导金属材料的住房。

22. 发明授权

US07042320B2 Method for mechanical stabilization of tube-shaped superconducting ceramics and mechanically stabilized tube-shaped superconducting composite 失效
标题翻译：管状超导陶瓷和机械稳定管状超导复合材料的机械稳定化方法
公开(公告)号：US07042320B2
公开(公告)日：2006-05-09
申请号：US11119338
申请日：2005-04-29
申请人： Heribert Walter
发明人： Heribert Walter
IPC分类号： H01F6/00
CPC分类号： H01R4/68 , H01L39/04 , H01L39/143 , H01L39/16 , Y10S505/706 , Y10S505/917 , Y10T29/49014
摘要： A method for mechanical stabilisation of a superconducting composite having a tube-shaped superconducting ceramic and a reinforcing pipe introduced into each other by pre-stressing the tube-shaped superconducting ceramic by applying compressive force on one end of the tube as well as to a pre-stressable superconducting composite.
摘要翻译：一种超导复合材料的机械稳定化方法，该超导复合材料具有管状超导陶瓷和通过在管的一端施加压缩力而预应力管状超导陶瓷而彼此引入的加强管，耐压超导复合材料。

23. 发明申请

US20030127574A1 Mounting structure of a superconductor circuit 有权
标题翻译：超导体电路的安装结构
公开(公告)号：US20030127574A1
公开(公告)日：2003-07-10
申请号：US10185153
申请日：2002-06-27
发明人： Yutaka Kuroshima
IPC分类号： F16M011/00
CPC分类号： H01L39/04
摘要： A mounting structure of a superconductor circuit including a superconductor circuit substrate having a superconductor circuit, a base in which the superconductor circuit substrate is placed on a side of the base, a metal foil placed between the superconductor circuit substrate and the base, a fixing means for fixing the superconductor circuit substrate and the metal foil to a side of the base, a container which is vacuum-sealed after the superconductor circuit substrate, the base, the metal foil, and the fixing means are put into the container, and a penetrating hole formed in the -base and penetrated from a part of the base which is covered by the metal foil to a part of the base which is not in contact with the metal foil is provided.
摘要翻译：一种超导体电路的安装结构，包括具有超导体电路的超导体电路基板，超导体电路基板放置在基体的一侧的基底，设置在超导体电路基板与基座之间的金属箔，固定单元为了将超导电路基板和金属箔固定在基座的一侧，在超导体电路基板，基座，金属箔和固定装置之后被真空密封的容器被放入容器中，并且穿透提供了形成在基座中并且从被金属箔覆盖的基部的一部分穿入到与金属箔不接触的基部的一部分的孔。

24. 发明授权

US5173620A Device for eliminating trap of magnetic flux in a superconduction circuit 失效
标题翻译：用于消除超导电路中磁通陷波的装置
公开(公告)号：US5173620A
公开(公告)日：1992-12-22
申请号：US627033
申请日：1990-12-13
申请人： Norio Fujimaki , Kohtaroh Gotoh
发明人： Norio Fujimaki , Kohtaroh Gotoh
IPC分类号： H01L39/04
CPC分类号： H01L39/04 , Y10S505/825
摘要： An apparatus for eliminating a magnetic flux from a superconducting circuit comprises a substrate on which a superconducting circuit is formed, a heating fixture including resistance heating elements and provided in the vicinity of the superconducting circuit, a driving unit connected to the heating fixture for energizing the same by supplying a drive current to each resistance heating elements in the heating fixture. The heating fixture is so configured that, upon energization of the resistance heating elements in the heating fixture, there is formed a region of normal conduction state characterized by a temperature that exceeds the critical temperature of the normal conduction-superconduction transition, in at least a part of the superconducting circuit, and such that the heating fixture produces a minimized magnetic field upon the energization of the resistance heating elements. The driving unit controls energization of the heating fixture such that the region of normal conduction state moves consecutively and continuously to a periphery of the superconducting circuit.

25. 发明授权

US5166777A Cooling apparatus for superconducting devices using Peltier effect cooling element 失效
标题翻译：使用珀尔帖效应冷却元件的超导装置冷却装置
公开(公告)号：US5166777A
公开(公告)日：1992-11-24
申请号：US660238
申请日：1991-02-25
申请人： Shoei Kataoka
发明人： Shoei Kataoka
IPC分类号： F25B21/02 , H01L35/00 , H01L39/04
CPC分类号： H01L39/04 , F25B21/02 , H01L35/00 , Y10S257/93 , Y10S505/872 , Y10S505/888 , Y10S505/889 , Y10S505/891
摘要： A superconductive apparatus including a superconductive member to be cooled, a cooling element which exhibits Peltier effect upon supply of electric power thereto such that the superconductive member is thermally coupled with a cooling portion of the cooling element and a container for accommodating the superconductive member and the cooling portion.
摘要翻译：一种超导装置，包括要被冷却的超导构件，冷却元件，其在向其提供电力时呈现珀尔帖效应，使得超导构件与冷却元件的冷却部分热耦合，以及用于容纳超导构件的容器和冷却部分。

26. 发明授权

US4809133A Low temperature monolithic chip 失效
标题翻译：低温单片芯片
公开(公告)号：US4809133A
公开(公告)日：1989-02-28
申请号：US913108
申请日：1986-09-26
申请人： Sadeg M. Faris , Gert K. G. Hohenwarter , Stephen R. Whiteley
发明人： Sadeg M. Faris , Gert K. G. Hohenwarter , Stephen R. Whiteley
IPC分类号： H01B12/04 , H01L23/52 , H01L25/00 , H01L39/04 , H01L39/22 , H05K7/20
CPC分类号： H01L39/04
摘要： A monolithic chip is described which is suited for a superconductive device. The chip includes a substrate with high and low temperature region, a superconductive device formed on the low temperature region and various lines for transmitting signals between the device and the high temperature region. Various configurations are described for optional separation of the high and low temperature region as well as high and low bandwidth signal lines. Chips with various geometric substrates are also described.
摘要翻译：描述了适用于超导装置的单片芯片。该芯片包括具有高低温区域的基板，在低温区域上形成的超导装置以及用于在器件与高温区域之间传输信号的各种线路。描述了用于可选地分离高温和低温区域以及高和低带宽信号线的各种配置。还描述了具有各种几何基板的芯片。

27. 发明公开

US20230210023A1 TECHNOLOGIES FOR RADIO FREQUENCY OPTIMIZED INTERCONNECTS FOR A QUANTUM PROCESSOR 审中-公开
公开(公告)号：US20230210023A1
公开(公告)日：2023-06-29
申请号：US17561439
申请日：2021-12-23
申请人： Intel Corporation
发明人： Hubert C. George , Ravi Pillarisetty , JongSeok Park , Stefano Pellerano , Lester F. Lampert , Thomas F. Watson , Florian Luthi , James S. Clarke
IPC分类号： H01L27/18 , H01L39/22 , H03H7/38 , H01P3/00 , H01L39/24 , H01L39/04 , G06N10/80 , H01L23/00 , H05K1/18
CPC分类号： H01L27/18 , H01L39/228 , H03H7/38 , H01P3/003 , H01L39/24 , H01L39/04 , H01L39/221 , G06N10/80 , H01L24/48 , H01L24/45 , H01L2224/49171 , H01L2224/45144 , H05K2201/10045 , H01L2924/0495 , H01L2224/48225 , H01L2224/45186 , H05K2201/10522 , H05K1/18 , H01L2224/45147 , H01L2224/48153
摘要： Technologies for radiofrequency optimized interconnects for a quantum processor are disclosed. In the illustrative embodiment, signals are carried in coplanar waveguides on a surface of a quantum processor die. A ground ring surrounds the signals and is connected to the ground conductors of each coplanar waveguide. Wire bonds connect the ground ring to a ground of a circuit board. The wire bonds provide both an electrical connection from the quantum processor die to the circuit board as well as increased thermal coupling between the quantum processor die and the circuit board, increasing cooling of the quantum processor die.

28. 发明申请

US20190207075A1 REDUCING DISSIPATION AND FREQUENCY NOISE IN QUANTUM DEVICES USING A LOCAL VACUUM CAVITY 审中-公开
公开(公告)号：US20190207075A1
公开(公告)日：2019-07-04
申请号：US16333058
申请日：2016-09-14
申请人： Google LLC
发明人： Anthony Edward Megrant
IPC分类号： H01L39/04 , F17C3/08 , H01F6/04
CPC分类号： H01L39/04 , F17C3/085 , G06N10/00 , H01F6/04
摘要： A device includes: a substrate including a superconductor quantum device, the superconductor quantum device including a superconductor material that exhibits superconducting properties at or below a corresponding critical temperature; a cap layer bonded to the substrate; and a sealed cavity between the cap layer and the substrate.

29. 发明申请

US20180012932A1 INTERCONNECT STRUCTURES FOR ASSEMBLY OF SEMICONDUCTOR STRUCTURES INCLUDING SUPERCONDUCTING INTEGRATED CIRCUITS 审中-公开
公开(公告)号：US20180012932A1
公开(公告)日：2018-01-11
申请号：US15342478
申请日：2016-11-03
申请人： Massachusetts Institute of Technology
发明人： William D. Oliver , Andrew J. Kerman , Rabindra N. Das , Donna-Ruth W. Yost , Danna Rosenberg , Mark A. Gouker
IPC分类号： H01L27/18 , G06N99/00 , H01L39/02 , H01L39/22 , H01L25/065
CPC分类号： H01L39/04 , B82Y10/00 , G06N10/00 , H01L21/02063 , H01L21/02282 , H01L21/02345 , H01L22/26 , H01L23/49827 , H01L23/552 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/81 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L27/18 , H01L39/02 , H01L39/025 , H01L39/223 , H01L2224/0401 , H01L2224/04042 , H01L2224/05111 , H01L2224/05116 , H01L2224/05166 , H01L2224/05169 , H01L2224/0558 , H01L2224/05609 , H01L2224/05644 , H01L2224/06181 , H01L2224/08503 , H01L2224/11001 , H01L2224/11005 , H01L2224/1111 , H01L2224/11462 , H01L2224/11474 , H01L2224/117 , H01L2224/11902 , H01L2224/13023 , H01L2224/131 , H01L2224/13109 , H01L2224/16145 , H01L2224/16146 , H01L2224/17181 , H01L2224/32145 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/73204 , H01L2224/73207 , H01L2224/80896 , H01L2224/8181 , H01L2224/81815 , H01L2224/92125 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06531 , H01L2225/06541 , H01L2225/06568 , H01L2225/06572 , H01L2924/00014 , H01L2924/00 , H01L2924/014
摘要： A multi-layer semiconductor structure includes a first semiconductor structure and a second semiconductor structure, with at least one of the first and second semiconductor structures provided as a superconducting semiconductor structure. The multi-layer semiconductor structure also includes one or more interconnect structures. Each of the interconnect structures is disposed between the first and second semiconductor structures and coupled to respective ones of interconnect pads provided on the first and second semiconductor structures. Additionally, each of the interconnect structures includes a plurality of interconnect sections. At least one of the interconnect sections includes at least one superconducting and/or a partially superconducting material.

30. 发明授权

US09465401B2 Systems and methods for magnetic shielding 有权
公开(公告)号：US09465401B2
公开(公告)日：2016-10-11
申请号：US13863962
申请日：2013-04-16
申请人： D-Wave Systems Inc.
发明人： Sergey V. Uchaykin
IPC分类号： G05F7/00 , H01L39/04 , H01F13/00
CPC分类号： H01L39/02 , G05F7/00 , G06N99/002 , H01F13/006 , H01L27/18 , H01L39/04 , H05K9/0071
摘要： Systems and methods for magnetic shielding are described. A magnetic shield formed of a material having a high magnetic permeability may be degaussed using a toroidal degaussing coil. The toroidal degaussing coil may enclose at least a portion of the shield. Magnetic field gradients may be actively compensated using multiple magnetic field sensors and local compensation coils. Trapped fluxons may be removed by an application of Lorentz force wherein an electrical current is passed through a superconducting plane.

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