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21. 发明申请

US20130316139A1 METHOD FOR MANUFACTURING SILICON SUBSTRATE AND SILICON SUBSTRATE 有权
标题翻译：制造硅基板和硅基板的方法
公开(公告)号：US20130316139A1
公开(公告)日：2013-11-28
申请号：US13982584
申请日：2012-02-02
申请人： Tetsuya Oka , Koji Ebara , Shuji Takahashi
发明人： Tetsuya Oka , Koji Ebara , Shuji Takahashi
IPC分类号： H01L21/02
CPC分类号： H01L21/02027 , C30B29/06 , C30B33/02 , H01L21/3225 , Y10T428/24355
摘要： A method for manufacturing a silicon substrate, including: performing a rapid heat treatment to a silicon substrate with a rapid-heating and rapid-cooling apparatus by maintaining the silicon substrate at a temperature that is higher than 1300° C. and not greater than a silicon melting point for 1 to 60 seconds, the silicon substrate being sliced from a silicon single crystal ingot grown by the Czochralski method; performing a first temperature decrease process down to a temperature in the range of 600 to 800° C. at a temperature decrease rate of 5 to 150° C./sec; and performing a second temperature decrease process in such a mariner that a cooling time of X seconds and a temperature decrease rate of Y° C./sec meet Y≦0.15X−4.5 when X
摘要翻译：一种硅基板的制造方法，其特征在于，包括：通过将所述硅基板保持在高于1300℃且不大于1300℃的温度，通过快速加热和快速冷却装置对硅基板进行快速热处理硅熔点为1〜60秒，硅基板由通过切克劳斯基法生长的硅单晶锭切片; 以5〜150℃/秒的降温速度进行600〜800℃的温度的第1降温处理。并且在这样的水手中执行第二降温过程，当X <100时，X秒的冷却时间和Y℃/秒的温度降低率达到Y@0.15X-4.5，当X> = 100。

22. 发明申请

US20090261347A1 DIAMOND SEMICONDUCTOR ELEMENT AND PROCESS FOR PRODUCING THE SAME 有权
标题翻译：金刚石半导体元件及其制造方法
公开(公告)号：US20090261347A1
公开(公告)日：2009-10-22
申请号：US11577678
申请日：2006-06-20
申请人： Makoto Kasu , Toshiki Makimoto , Kenji Ueda , Yoshiharu Yamauchi
发明人： Makoto Kasu , Toshiki Makimoto , Kenji Ueda , Yoshiharu Yamauchi
IPC分类号： H01L29/16 , H01L21/04
CPC分类号： H01L21/324 , C23C16/274 , C23C16/278 , C30B25/105 , C30B29/04 , C30B33/02 , C30B33/06 , H01L21/02013 , H01L21/02027 , H01L21/02376 , H01L21/02433 , H01L21/02527 , H01L21/02579 , H01L21/02609 , H01L21/0262 , H01L21/0405 , H01L21/0415 , H01L29/045 , H01L29/1602 , H01L29/45 , H01L29/66037 , H01L29/66045 , H01L29/66742 , H01L29/66856 , H01L29/732 , H01L29/78 , H01L29/78684 , H01L29/812 , H01L33/0054 , H01L2924/0002 , H01L2924/00
摘要： In a conventional diamond semiconductor element, because of high density of crystal defects, it is impossible to reflect the natural physical properties peculiar to a diamond, such as high thermal conductivity, high breakdown field strength, high-frequency characteristics and the like, in the transistor characteristics. By slightly shifting surface orientation of a diamond substrate in a [001] direction, a significant reduction in crystal defects peculiar to a diamond is possible. The equivalent effects are also provided by shifting surface orientation of a single-crystal diamond thin-film or channel slightly from a [001] direction. It is possible to obtain a significantly high transconductance gm as compared with that in a transistor produced using conventional surface orientation.
摘要翻译：在传统的金刚石半导体元件中，由于晶体缺陷的高密度，因此不可能在金刚石半导体元件的高导热率，高击穿场强，高频特性等中反映金刚石特有的自然物理特性晶体管特性。通过在[001]方向稍微移动金刚石衬底的表面取向，可以显着降低金刚石特有的晶体缺陷。也可以通过从[001]方向稍微移动单晶金刚石薄膜或沟道的表面取向来提供等效效果。与使用常规表面取向制造的晶体管相比，可以获得显着高的跨导gm。

23. 发明申请

US20060249135A1 METHOD OF PRODUCING III-NITRIDE SUBSTRATE 有权
标题翻译：生产III型氮化物衬底的方法
公开(公告)号：US20060249135A1
公开(公告)日：2006-11-09
申请号：US11486216
申请日：2006-07-14
申请人： Naoki Matsumoto
发明人： Naoki Matsumoto
IPC分类号： B28D1/08 , B24B1/00
CPC分类号： H01L21/02027 , B28D5/045 , C09G1/02 , C30B29/403 , C30B29/406 , C30B33/00 , H01L21/302 , H01L29/2003 , Y10T83/9292
摘要： An ingot 3 of a hexagonal III-nitride crystal is cut using a wire array 21 composed of a wire 22. On this occasion, the ingot 3 is cut in such a manner that the ingot 3 is sliced with supply of an abrasive fluid while feeding at least one of the ingot 3 and wire 22 in a direction perpendicular to an extending direction B of the wire 22. During cutting the ingot 3, the extending direction B of the wire 22 is inclined at 3° or more to the {1-100} plane of the ingot 3.
摘要翻译：使用由线22构成的线阵列21切割六方晶III族氮化物晶体的锭3。在这种情况下，锭子3被切割成使得锭3在供给磨料流体的同时被切割，同时沿与线22的延伸方向B垂直的方向供给锭3和线22中的至少一个。在切割锭3期间，线22的延伸方向B相对于锭3的{1-100}面倾斜3°以上。

24. 发明授权

US4127969A Method of making a semiconductor wafer 失效
标题翻译：制造半导体晶片的方法
公开(公告)号：US4127969A
公开(公告)日：1978-12-05
申请号：US639806
申请日：1975-12-11
申请人： Kinji Hoshi , Kazuhiro Sugita
发明人： Kinji Hoshi , Kazuhiro Sugita
IPC分类号： B28D5/00 , B28D5/02 , B28D5/04 , H01L21/00 , H01L21/302 , H01L29/00 , H01L29/06 , B24B1/00
CPC分类号： H01L21/02027 , B28D5/0058 , B28D5/0088 , B28D5/022 , B28D5/028 , B28D5/042 , H01L21/302 , H01L21/67092 , H01L29/00 , H01L29/0657
摘要： Semiconductor wafers with apertures, that may include crystal orientation surfaces, are made by boring semiconductor ingots and slicing the bored ingots perpendicular to the bore or at an angle thereto. Novel means are provided for handling the wafers without scratching the major surfaces thereof, for supporting the slices to clean them, and for supporting the slices to coat the major surfaces.
摘要翻译：可以包括晶体取向表面的具有孔的半导体晶片通过对半导体锭进行钻孔并且将钻孔垂直于孔或与其成一定角度切割。提供了新颖的装置来处理晶片而不刮擦其主要表面，用于支撑切片以将其清洁，并且用于支撑切片以涂覆主表面。

25. 发明申请

US20190017192A1 SHAPED SILICON INGOT USING LAYER TRANSFER 审中-公开
公开(公告)号：US20190017192A1
公开(公告)日：2019-01-17
申请号：US16125505
申请日：2018-09-07
申请人： Silicon Genesis Corporation
发明人： Francois J. HENLEY
IPC分类号： C30B29/06 , B28D5/04 , H01L21/02 , C30B33/06 , C30B33/00 , C01B33/02
CPC分类号： C30B29/06 , B28D5/045 , C01B33/02 , C30B33/00 , C30B33/06 , H01L21/0201 , H01L21/02027 , H01L31/1804
摘要： A shaped crystalline ingot for an ion cleaving process has a major surface that is substantially planar, a first side face that is substantially planar along a first direction orthogonal to the major surface, and a second side face that is substantially planar along a second direction orthogonal to the major surface. The ion cleaving process is a process in which ions are implanted into the shaped crystalline ingot to form a cleave plane that separates a substrate comprising the major surface from the shaped crystalline ingot.

26. 发明申请

US20140167094A1 SEMICONDUCTOR LIGHT EMITTING DEVICE 有权
标题翻译：半导体发光器件
公开(公告)号：US20140167094A1
公开(公告)日：2014-06-19
申请号：US14083927
申请日：2013-11-19
申请人： Kabushiki Kaisha Toshiba
发明人： Jumpei TAJIMA , Kotaro ZAIMA , Toshiki HIKOSAKA , Hiroshi ONO , Naoharu SUGIYAMA , Shinya NUNOUE
IPC分类号： H01L33/36
CPC分类号： H01L33/38 , H01L21/02027 , H01L21/02516 , H01L21/02609 , H01L29/04 , H01L31/0224 , H01L31/036 , H01L33/16 , H01L33/18 , H01L33/20 , H01L33/22 , H01L33/32 , H01L33/36 , H01L33/382 , H01L51/441 , H01L2933/0016
摘要： According to one embodiment, a semiconductor light emitting device includes an electrode layer, a first semiconductor layer, a first elongated electrode, a second semiconductor layer, and a light emitting layer. The first semiconductor layer includes a crystal having a cleavage plane. The first semiconductor layer includes a first thin film portion and a thick film portion. The first thin film portion extends in a first direction perpendicular to a stacking direction from the electrode layer toward the first semiconductor layer. The first thin film portion has a first thickness. The thick film portion is arranged with the first thin film portion in a plane perpendicular to the stacking direction. An angle between the first direction and the cleavage plane is not less than 3 degrees and not more than 27 degrees. The first elongated electrode extends in the first direction in contact with the first thin film portion.
摘要翻译：根据一个实施例，半导体发光器件包括电极层，第一半导体层，第一细长电极，第二半导体层和发光层。第一半导体层包括具有解理面的晶体。第一半导体层包括第一薄膜部分和厚膜部分。第一薄膜部分在垂直于层叠方向的第一方向从电极层向第一半导体层延伸。第一薄膜部分具有第一厚度。厚膜部分与垂直于层叠方向的平面中的第一薄膜部分配置。第一方向和解理面之间的角度不小于3度且不大于27度。第一细长电极在与第一薄膜部分接触的第一方向上延伸。

27. 发明申请

US20140106540A1 METHOD AND DEVICE FOR SLICING A SHAPED SILICON INGOT USING LAYER TRANSFER 审中-公开
标题翻译：用于使用层传输来切割形状的硅胶入口的方法和装置
公开(公告)号：US20140106540A1
公开(公告)日：2014-04-17
申请号：US14106002
申请日：2013-12-13
申请人： Silicon Genesis Corporation
发明人： Francois J. Henley
IPC分类号： H01L21/02
CPC分类号： C30B29/06 , B28D5/045 , C01B33/02 , C30B33/00 , C30B33/06 , H01L21/0201 , H01L21/02027 , H01L31/1804
摘要： A method for slicing a crystalline material ingot includes providing a crystalline material boule characterized by a cropped structure including a first end-face, a second end-face, and a length along an axis in a first crystallographic direction extending from the first end-face to the second end-face. The method also includes cutting the crystalline material boule substantially through a first crystallographic plane in parallel to the axis to separate the crystalline material boule into a first portion with a first surface and a second portion with a second surface. The first surface and the second surface are planar surfaces substantially along the first crystallographic plane. The method further includes exposing either the first surface of the first portion or the second surface of the second portion, and performing a layer transfer process to form a crystalline material sheet from either the first surface of the first portion or from the second surface of the second portion.
摘要翻译：一种用于切割晶体材料锭的方法包括提供一种结晶材料棒，其特征在于包括第一端面，第二端面和沿着轴线的长度在从第一端面延伸的第一晶体方向的裁剪结构到第二个端面。该方法还包括基本上通过平行于轴线的第一晶体平面切割结晶材料棒，以将结晶材料原子坯分离成具有第一表面的第一部分和具有第二表面的第二部分。第一表面和第二表面是基本上沿着第一结晶平面的平面。该方法还包括暴露第一部分的第一表面或第二部分的第二表面，并且执行层转移过程以从第一部分的第一表面或第二部分的第二表面形成结晶材料片第二部分。

28. 发明申请

US20130240892A1 METHOD FOR CONVERTING SEMICONDUCTOR LAYERS 审中-公开
标题翻译：用于转换半导体层的方法
公开(公告)号：US20130240892A1
公开(公告)日：2013-09-19
申请号：US13885316
申请日：2011-11-10
申请人： Patrik Stenner , Matthias Patz , Michael Coelle , Stephan Wieber
发明人： Patrik Stenner , Matthias Patz , Michael Coelle , Stephan Wieber
IPC分类号： H01L21/02 , H01L29/04 , B23K10/00
CPC分类号： H01L21/02027 , B23K10/00 , H01L21/02521 , H01L21/02532 , H01L21/02689 , H01L21/3003 , H01L29/04 , H01L31/1872 , H05H1/32 , Y02E10/50 , Y02P70/521
摘要： The present invention relates to a process for conversion of semiconductor layers, especially for conversion of amorphous to crystalline silicon layers, in which the conversion is effected by treating the semiconductor layer with a plasma which is generated by a plasma source equipped with a plasma nozzle (1). The present invention further relates to semiconductor layers produced by the process, to electronic and optoelectronic products comprising such semiconductor layers, and to a plasma source for performance of the process according to the invention.
摘要翻译：本发明涉及一种用于转换半导体层的方法，特别是用于转换非晶体到硅层的方法，其中转换是通过用等离子体处理等离子体来实现的，所述等离子体是由装备有等离子体喷嘴的等离子体源 1）。本发明还涉及通过该方法制造的半导体层，包括这种半导体层的电子和光电子产品，以及用于执行根据本发明的方法的等离子体源。

29. 发明申请

US20110068352A1 DIAMOND SEMICONDUCTOR ELEMENT AND PROCESS FOR PRODUCING THE SAME 有权
标题翻译：金刚石半导体元件及其制造方法
公开(公告)号：US20110068352A1
公开(公告)日：2011-03-24
申请号：US12956784
申请日：2010-11-30
申请人： Makoto Kasu , Toshiki Makimoto , Kenji Ueda , Yoshiharu Yamauchi
发明人： Makoto Kasu , Toshiki Makimoto , Kenji Ueda , Yoshiharu Yamauchi
IPC分类号： H01L29/24
CPC分类号： H01L21/324 , C23C16/274 , C23C16/278 , C30B25/105 , C30B29/04 , C30B33/02 , C30B33/06 , H01L21/02013 , H01L21/02027 , H01L21/02376 , H01L21/02433 , H01L21/02527 , H01L21/02579 , H01L21/02609 , H01L21/0262 , H01L21/0405 , H01L21/0415 , H01L29/045 , H01L29/1602 , H01L29/45 , H01L29/66037 , H01L29/66045 , H01L29/66742 , H01L29/66856 , H01L29/732 , H01L29/78 , H01L29/78684 , H01L29/812 , H01L33/0054 , H01L2924/0002 , H01L2924/00
摘要： An integrated optical waveguide has a first optical waveguide, a second optical waveguide, and a groove. The second optical waveguide is coupled to the first optical waveguide and has a refractive index that is different from the first optical waveguide. The groove is disposed so as to traverse an optical path of the first optical waveguide and is separated from an interface between the first optical waveguide and the second optical waveguide by a predetermined spacing. The spacing from the interface and the width of the groove are determined such that reflection at a boundary between the first optical waveguide and the second optical waveguide is weakened. A semiconductor board may be disposed at a boundary between the first optical waveguide and the second optical waveguide. In this case, the width of the groove and the thickness of the semiconductor board are determined such that light reflected off an interface between the first optical waveguide and the groove is weakened by light reflected from an interface between the groove and the semiconductor board, and by light reflected from an interface between the semiconductor board and the second optical waveguide.
摘要翻译：集成光波导具有第一光波导，第二光波导和凹槽。第二光波导耦合到第一光波导并且具有不同于第一光波导的折射率。凹槽设置成穿过第一光波导的光路并且以第一光波导和第二光波导之间的界面以预定的间隔分开。确定与界面的间隔和槽的宽度，使得在第一光波导和第二光波导之间的边界处的反射减弱。半导体板可以设置在第一光波导和第二光波导之间的边界处。在这种情况下，确定槽的宽度和半导体板的厚度，使得从第一光波导和凹槽之间的界面反射的光被从凹槽和半导体板之间的界面反射的光减弱，以及通过从半导体板和第二光波导之间的界面反射的光。

30. 发明授权

US07662239B2 Method of producing group 3 nitride substrate wafers and group 3 nitride substrate wafers 失效
标题翻译：生产3族氮化物衬底晶片和3族氮化物衬底晶片的方法
公开(公告)号：US07662239B2
公开(公告)日：2010-02-16
申请号：US11822903
申请日：2007-07-11
申请人： Keiji Ishibashi , Masato Irikura , Seiji Nakahata
发明人： Keiji Ishibashi , Masato Irikura , Seiji Nakahata
IPC分类号： H01L21/304 , H01L29/30
CPC分类号： H01L21/02013 , B24B37/042 , H01L21/02027 , H01L21/6835 , H01L23/544 , H01L29/0657 , H01L2221/6834 , H01L2223/54493 , H01L2924/0002 , H01L2924/00
摘要： Quality of one-surface planar processed group 3 nitride wafers depends upon a direction of pasting of wafers on a polishing plate. Low surface roughness and high yield are obtained by pasting a plurality of group 3 nitride as-grown wafers on a polishing plate with OFs or notches facing forward (f), backward (b) or inward (u) with thermoplastic wax having a thickness of 10 μm or less, grinding the as-grown wafers, lapping the ground wafers, polishing the lapped wafers into mirror wafers with a bevel of a horizontal width of 200 μm or less and a vertical depth of 100 μm or less.
摘要翻译：单面平面处理组3氮化物晶片的质量取决于晶片在抛光板上的粘贴方向。通过将多个第3组氮化物生长的晶片粘贴在具有面向前（f），向后（b）或向内（u）的OF或凹槽的抛光板上，获得厚度为研磨生长的晶片，研磨研磨的晶片，将研磨的晶片抛光成具有200μm或更小的水平宽度和100μm或更小的垂直深度的斜面的镜晶片。

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