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21. 发明公开

EP2241969A2 Program and data annotation for hardware customization and energy optimization 审中-公开
标题翻译： Programme und Datenaufzeichnungfüreine Hardwareanpassung und Energieoptimierung
公开(公告)号：EP2241969A2
公开(公告)日：2010-10-20
申请号：EP10154705.7
申请日：2010-02-25
申请人： Technology Currents LLC
发明人： Potkonjak, Miodrag
IPC分类号： G06F9/44
CPC分类号： G06F1/3234 , G06F8/4432 , Y02D10/41
摘要： Technologies are generally described herein for supporting program and data annotation for hardware customization and energy optimization. A code block to be annotated may be examined and a hardware customization may be determined to support a specified quality of service level for executing the code block with reduced energy expenditure. Annotations may be determined as associated with the determined hardware customization. An annotation may be provided to indicate using the hardware customization while executing the code block. Examining the code block may include one or more of performing a symbolic analysis, performing an empirical observation of an execution of the code block, performing a statistical analysis, or any combination thereof. A data block to be annotated may also be examined. One or more additional annotations to be associated with the data block may be determined.
摘要翻译：这里通常描述技术来支持用于硬件定制和能量优化的程序和数据注释。可以检查要注释的代码块，并且可以确定硬件定制以支持具有降低的能量消耗来执行代码块的指定服务质量水平。注释可以确定为与确定的硬件定制相关联。可以提供注释来指示在执行代码块时使用硬件定制。检查代码块可以包括执行符号分析，执行代码块的执行的经验观察，执行统计分析或其任何组合中的一个或多个。还可以检查要注释的数据块。可以确定与数据块相关联的一个或多个附加注释。

22. 发明公开

EP1653355A3 Information processor, information processing method, and programs therefor 审中-公开
标题翻译：信息处理器，信息处理方法和程序对
公开(公告)号：EP1653355A3
公开(公告)日：2008-03-12
申请号：EP05021658.9
申请日：2005-10-04
申请人： HITACHI SOFTWARE ENGINEERING CO., LTD.
发明人： Ioku, Akira, Hitachi, Ltd Intell.Prop.Office , Isobe, Tatsuo, Hitachi, Ltd Intell.Prop.Office , Morimoto,Yoshiaki, Hitachi, Ltd Intell.Prop.Office , Kawasaki, Shinichiro Hitachi Ltd Intel.Prop.Office
IPC分类号： G06F9/50 , G06F9/45 , G06F1/32
CPC分类号： G06F1/3203 , G06F8/4432 , G06F9/45516 , Y02D10/41
摘要： Power consumption can be suppressed while maintaining an appropriate execution speed. The information processor (1) has an interpreter for interpreting a source program or intermediate language program and a run-time translator for translating the program into a machine language program native to the computer. The information processor (1) comprises a power-saving request monitor (126) for monitoring whether or not there is a power-saving request from an input interface or a predetermined power-saving request in a given memory, and a power-saving translation controller (129). The power-saving request makes a request for suppression of the power consumed by the processor (1). The power-saving translation controller (129) makes a decision as to whether the run-time translator executes run-time translation of the program according to whether there is the power-saving request. Based on the result of the decision, the translation controller instructs the run-time translator to execute the run-time translation.

23. 发明申请

WO2013160572A2 RÉDUCTION DE LA CONSOMMATION ÉLECTRIQUE D'UNE MATRICE DE PROCESSEURS 审中-公开
标题翻译：减少处理器阵列的电力消耗
公开(公告)号：WO2013160572A2
公开(公告)日：2013-10-31
申请号：PCT/FR2013/000111
申请日：2013-04-23
申请人： KALRAY
发明人： HARRAND, Michel
CPC分类号： G06F1/3296 , G06F1/324 , G06F1/329 , G06F8/4432 , G06F8/451 , G06F9/4893 , Y02D10/126 , Y02D10/172 , Y02D10/24 , Y02D10/41
摘要： L'invention est relative à un procédé d'exécution d'un traitement sur un système à multiples processeurs (PE) dont les fréquences d'horloge sont réglables individuellement (DIV), comprenant les étapes suivantes : à la compilation du code source du traitement, subdiviser le traitement en tâches élémentaires (TO dont chacune est exécutable en plusieurs occurrences (O j ); allouer dynamiquement des processeurs différents à des occurrences successives d'une même tâche élémentaire; associer à chaque tâche élémentaire un compteur d'occurrences central (CT), et un seuil (n) de nombre d'occurrences; incrémenter le compteur d'occurrences à l'exécution de chaque occurrence de la tâche élémentaire associée, indépendamment du processeur alloué à l'occurrence; et commuter la fréquence du processeur alloué à une occurrence courante d'une tâche élémentaire sur une première fréquence si le compte atteint dans le compteur associé est inférieur au seuil, sinon commuter la fréquence du processeur SUT une deuxième fréquence distincte de la première.
摘要翻译：本发明涉及一种在时钟频率可单独调整的多处理器系统（PE）上执行处理的方法，包括以下步骤：在编译处理的源代码时，将处理细分为基本任务（ TO），每个可执行为几个出现（Oj）; 将差分处理器动态地分配给相同的基本任务的连续出现; 与每个基本任务相关联的中央计数器（CT）和阈值（n）的出现次数; 在执行相关联的基本任务的每次出现时，独立于分配给该事件的处理器，递增出现的计数器; 以及如果在相关联的计数器中达到的计数低于阈值，则将分配给基本任务的当前出现的处理器的频率切换到第一频率，否则将处理器SUT的频率切换到与第一频率不同的第二频率。

24. 发明申请

WO2003090055A1 POWER CONTROL OF A PROCESSOR USING HARDWARE STRUCTURES CONTROLLED BY A COMPILER WITH AN ACCUMULATED INSTRUCTION PROFILE 审中-公开
标题翻译：使用具有累积指令配置文件的编译器控制的硬件结构的处理器的功率控制
公开(公告)号：WO2003090055A1
公开(公告)日：2003-10-30
申请号：PCT/US2002/012086
申请日：2002-04-19
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , ALTMAN, Erik, R. , GLOSSNER, Clair, John, III , HOKENEK, Erdem , MELTZER, David , MOUDGILL, Mayan
发明人： ALTMAN, Erik, R. , GLOSSNER, Clair, John, III , HOKENEK, Erdem , MELTZER, David , MOUDGILL, Mayan
IPC分类号： G06F1/32
CPC分类号： G06F9/30083 , G06F1/3203 , G06F1/3243 , G06F8/4432 , Y02D10/152 , Y02D10/41
摘要： A microprocessor includes a logic circuit. A selection device is coupled to the logic circuit, and the selection device procides switching of on/off states of the logic circuit based on a stored logical value. A program instruction is included which sets the stored logical value control the on/off states of the logic circuit based on anticipated usage of the logical circuit in accordance with an instruction sequence of the microprocessor.
摘要翻译：微处理器包括逻辑电路。选择装置耦合到逻辑电路，并且选择装置基于存储的逻辑值来触发逻辑电路的导通/截止状态的切换。包括一个程序指令，其根据微处理器的指令序列，根据逻辑电路的预期使用情况设置存储的逻辑值来控制逻辑电路的开/关状态。

25. 发明公开

EP2290538A2 Method and device for reducing power consumption in application specific instruction set processors 审中-公开
标题翻译：用于减少应用专用指令集的处理器的功耗的方法和设备
公开(公告)号：EP2290538A2
公开(公告)日：2011-03-02
申请号：EP10174072.8
申请日：2010-08-26
申请人： IMEC , Katholieke Universiteit Leuven, K.U. Leuven R&D
发明人： Raghavan, Praveen , Novo Bruna, David , Catthoor, Francky , Krithikakou, Angeliki
IPC分类号： G06F9/45
CPC分类号： G06F8/4432 , G06F8/4441 , Y02D10/41
摘要： The present invention provides a compile or pre-compile method and a device for converting first program code into second program code, such that the second program code has an improved execution on a targeted programmable platform. The method according to embodiments of the present invention comprises
grouping operations on data for joint execution on a functional unit of the targeted platform, scheduling operations on data in time, and
assigning operations to an appropriate functional unit of the targeted platform,
wherein detailed word length information is used in at least one of the grouping, scheduling or assigning operations, rather than the typically used approximations like powers of two.
摘要翻译：本发明提供了一个编译或预编译的方法和用于将第一程序代码分割成第二程序代码的装置，检查没有所述第二程序代码对上一个目标可编程平台改进的执行。该方法雅鼎在本发明的实施例包括在用于目标平台的功能单元上联合执行数据分组操作，在时间上数据的调度操作，并且在目标平台的适当的功能单元，worin详细字长分配操作，以信息是在分组中的至少一个所使用的，调度或分配操作，而不是像的二的幂的典型使用的近似值。

26. 发明公开

EP2241969A3 Program and data annotation for hardware customization and energy optimization 审中-公开
标题翻译：程序和数据记录的硬件定制和能源优化
公开(公告)号：EP2241969A3
公开(公告)日：2011-01-05
申请号：EP10154705.7
申请日：2010-02-25
申请人： Technology Currents LLC
发明人： Potkonjak, Miodrag
IPC分类号： G06F9/44 , G06F9/45
CPC分类号： G06F1/3234 , G06F8/4432 , Y02D10/41
摘要： Technologies are generally described herein for supporting program and data annotation for hardware customization and energy optimization. A code block to be annotated may be examined and a hardware customization may be determined to support a specified quality of service level for executing the code block with reduced energy expenditure. Annotations may be determined as associated with the determined hardware customization. An annotation may be provided to indicate using the hardware customization while executing the code block. Examining the code block may include one or more of performing a symbolic analysis, performing an empirical observation of an execution of the code block, performing a statistical analysis, or any combination thereof. A data block to be annotated may also be examined. One or more additional annotations to be associated with the data block may be determined.

27. 发明公开

EP2202638A1 TRANSLATING DEVICE, TRANSLATING METHOD AND TRANSLATING PROGRAM, AND PROCESSOR CORE CONTROL METHOD AND PROCESSOR 审中-公开
标题翻译：翻译装置，翻译方法及翻译程序和处理器核控制方法和处理器
公开(公告)号：EP2202638A1
公开(公告)日：2010-06-30
申请号：EP07805864.1
申请日：2007-09-21
申请人： Fujitsu Limited
发明人： YAMASHITA, Koichiro
IPC分类号： G06F9/45 , G06F1/04 , G06F1/32 , G06F9/50
CPC分类号： G06F8/452 , G06F8/4432 , G06F9/50 , Y02D10/22 , Y02D10/41
摘要： When parallel processing is performed by a system configured by a plurality of processors and a multicore processor chip, power control code can be reduced by dynamically changing the number of processors for performing the parallel processing and an operation clock of each processor. A translation device includes: a parallel loop processing detection unit configured to detect from the source code a loop processing code for execution of an internal processing operation for a given number of repeating times, and an independent parallel loop processing code in the internal processing operation performed for each repetition to be concurrently processed; and a dynamic parallel conversion unit configured to generate a control core code for control of the number of repeating times in the parallel loop processing code and a parallel processing code for changing the number of repeating times corresponding to the control from the control core code. The technology also relates to a translating method, a translating program, a control method for a processor core, and a processor.
摘要翻译：当并行处理是由处理器的多元性和多核处理器芯片配置的系统进行的，可以通过动态地改变处理器的数量用于进行并行处理和对每个处理器的操作时钟来减小功率控制代码。甲翻译装置包括：被配置为并行循环处理检测单元，用于从源代码检测用于内部的处理动作的执行的循环处理代码为重复次数的一个给定的数目，并在独立的并行循环处理代码在内部处理操作执行的对于要同时处理的每次重复; 和动态并行转换单元，被配置以产生用于在所述并行的循环处理的代码和用于改变重复次数对应于从控制核心代码的控制的数量的并行处理代码重复次数的数量的控制的控制的核心代码。因此，该技术涉及一种翻译方法，平移程序，对于一个处理器核心的控制方法，和处理器。

28. 发明公开

EP1570348A2 COST-AWARE DESIGN-TIME/RUN-TIME MEMORY MANAGEMENT METHODS AND APPARATUS 有权
标题翻译：方法和设备食品有意识的内存管理DRAFT TIME /持续期间
公开(公告)号：EP1570348A2
公开(公告)日：2005-09-07
申请号：EP03775007.2
申请日：2003-11-18
申请人： Interuniversitair Microelektronica Centrum
发明人： MARCHAL, Paul , GOMEZ, José, Ignacio , BRUNI, Davide , CATTHOOR, Francky
IPC分类号： G06F9/45
CPC分类号： G06F8/4432 , G06F8/4442 , Y02D10/41
摘要： Methods, apparatus and software products are described for design-time data-assignment techniques for hierarchical memories, e.g., multi-banked memories in an essentially digital system as well as methods, apparatus and software products for run-time memory management techniques of such a system. Memory assignment techniques are described for assigning data to a hierarchical memory particularly for multi-tasked applications where data of dynamically created/deleted tasks is allocated at run-time. The energy consumption of hierarchical memories such as multi-banked memories depends largely on how data is assigned to the memory banks. Methods, apparatus and software products are described for design-time data-assignment techniques for hierarchical memories, e.g., multi-banked memories in an essentially digital system which improve a cost function such as energy consumption.

29. 发明授权

EP2687944B1 Apparatus and method for managing power based on data 有权
标题翻译：基于数据管理电源的设备和方法
公开(公告)号：EP2687944B1
公开(公告)日：2017-11-22
申请号：EP13176648.7
申请日：2013-07-16
申请人： Samsung Electronics Co., Ltd.
发明人： Son, Min Young , Shin, Young Sam , Im, Chae Seok , Lee, Seung Won , Lee, Shi-Hwa , Lee, Jae Don
IPC分类号： G06F1/26 , G06F1/32 , G06F9/44 , G06F9/45
CPC分类号： G06F1/26 , G06F1/3203 , G06F1/3234 , G06F8/4432 , Y02D10/41
摘要： Provided is an apparatus and method for managing power based on data. The apparatus may include a code segment searching unit configured to search for at least one code segment in which a power type is inserted, a block determining unit configured to determine at least one block based on the at least one found code segment, and a power mode control unit configured to control the at least one determined block to operate in a power mode corresponding to the power type.

30. 发明公开

EP2687944A2 Apparatus and method for managing power based on data 有权
标题翻译：基于数据管理电源的设备和方法
公开(公告)号：EP2687944A2
公开(公告)日：2014-01-22
申请号：EP13176648.7
申请日：2013-07-16
申请人： Samsung Electronics Co., Ltd
发明人： Son, Min Young , Shin, Young Sam , Im, Chae Seok , Lee, Seung Won , Lee, Shi-Hwa , Lee, Jae Don
IPC分类号： G06F1/32 , G06F9/44
CPC分类号： G06F1/26 , G06F1/3203 , G06F1/3234 , G06F8/4432 , Y02D10/41
摘要： Provided is an apparatus and method for managing power based on data. The apparatus may include a code segment searching unit configured to search for at least one code segment in which a power type is inserted, a block determining unit configured to determine at least one block based on the at least one found code segment, and a power mode control unit configured to control the at least one determined block to operate in a power mode corresponding to the power type.
摘要翻译：提供了一种基于数据管理电力的设备和方法。该装置可以包括：代码段搜索单元，被配置为搜索插入了功率类型的至少一个代码段;块确定单元，被配置为基于至少一个找到的代码段确定至少一个块;以及功率模式控制单元，被配置为控制所述至少一个确定的块以对应于所述电力类型的电力模式进行操作。

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