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21. 发明申请

WO2012088632A1 AIR LOOP ANTENNA FOR SHARED AM/FM 审中-公开
标题翻译：用于共享AM / FM的空气环路天线
公开(公告)号：WO2012088632A1
公开(公告)日：2012-07-05
申请号：PCT/CN2010/002204
申请日：2010-12-30
申请人： SILICON LABORATORIES INC. , ZHANG, Ligang , LIN, Chengzhou
发明人： ZHANG, Ligang , LIN, Chengzhou
IPC分类号： H01Q1/24
CPC分类号： H01Q1/50 , H01Q7/00
摘要： Systems and methods are disclosed for shared AM/FM air loop antennas that may be advantageously implemented to provide a AM/FM receiver system with a single common air loop antenna for receiving both AM and FM channels, thus eliminating the need for additional materials and electronics associated with provision of a separate FM pigtail antenna and FM antenna jack for connection of same. The shared AM/FM air loop antennas may be connected to a radio device having antenna connections.
摘要翻译：公开了用于共享的AM / FM空气环形天线的系统和方法，其可以有利地被实现以向AM / FM接收机系统提供用于接收AM和FM信道的单个公共空气环形天线，从而消除对附加材料和电子设备的需要与提供单独的FM尾纤天线和用于连接其的FM天线插孔相关联。共享的AM / FM空气环路天线可以连接到具有天线连接的无线电设备。

22. 发明申请

WO2009142718A2 PREDICTIVE FEEDBACK COMPENSATION FOR PWM SWITCHING AMPLIFIERS 审中-公开
标题翻译： PWM开关放大器的预测反馈补偿
公开(公告)号：WO2009142718A2
公开(公告)日：2009-11-26
申请号：PCT/US2009/003083
申请日：2009-05-19
申请人： SILICON LABORATORIES INC. , BEALE, Richard, G. , KHOURY, John, M.
发明人： BEALE, Richard, G. , KHOURY, John, M.
IPC分类号： H03F3/217
CPC分类号： H03F3/217 , H03F3/2173
摘要： Methods and systems are disclosed for predictive feedback compensation (PFC) circuitry for suppressing distortions caused by supply voltage variations and output amplitude switching non-idealities in pulse width modulated (PWM) switching amplifiers by pre-compensating the PWM input based upon the supply voltage or output pulse amplitude. Output amplitude errors associated with previous PWM output signals are used to predict output amplitude errors expected for future PWM output signals. These predicted output amplitude errors are then used to adjust the pulse widths for the future PWM output signals. Closed loop width adjustment can also be applied by providing timing feedback signals associated with the pre-compensation of the PWM input signals. Traditional feedback techniques can also be used in conjunction with the predictive feedback compensation (PFC) circuitry.
摘要翻译：公开了用于通过基于电源电压预补偿PWM输入来抑制由脉冲宽度调制（PWM）开关放大器中的电源电压变化和输出幅度切换非理想性引起的失真的预测反馈补偿（PFC）电路的方法和系统，输出脉冲幅度。与先前PWM输出信号相关的输出幅度误差用于预测未来PWM输出信号预期的输出幅度误差。这些预测的输出振幅误差然后用于调整未来PWM输出信号的脉冲宽度。也可以通过提供与PWM输入信号的预补偿相关联的定时反馈信号来应用闭环宽度调整。传统的反馈技术也可以与预测反馈补偿（PFC）电路结合使用。

23. 发明申请

WO2008088437A1 VOLTAGE PROTECTION CIRCUIT FOR POWER SUPPLY DEVICE AND METHOD THEREFOR 审中-公开
标题翻译：电源装置的电压保护电路及其方法
公开(公告)号：WO2008088437A1
公开(公告)日：2008-07-24
申请号：PCT/US2007/023480
申请日：2007-11-07
申请人： SILICON LABORATORIES, INC. , APFEL, Russell J.
发明人： APFEL, Russell J.
IPC分类号： H02H3/20
CPC分类号： H04L12/10
摘要： A device is disclosed that includes an interface and an integrated circuit. The interface is communicatively coupled to a network connection to provide power and data to a power over Ethernet (PoE) powered device via the network connection. The integrated circuit is coupled to the interface. The integrated circuit includes a power over Ethernet (PoE) controller, a detection and classification circuit, and a voltage protection circuit. The detection and classification circuit is coupled to the interface to detect and classify a power level of the PoE powered device. The voltage protection circuit is coupled to the interface to detect a power event and to provide an alert to the PoE controller in response to the detected power event.
摘要翻译：公开了一种包括接口和集成电路的装置。该接口通信地耦合到网络连接，以通过网络连接向以太网供电设备（PoE）提供电力和数据。集成电路耦合到接口。集成电路包括以太网供电（PoE）控制器，检测和分类电路以及电压保护电路。检测和分类电路耦合到接口，以检测和分类PoE供电设备的功率电平。电压保护电路耦合到接口以检测功率事件并且响应于检测到的功率事件向PoE控制器提供警报。

24. 发明申请

WO2007037963A1 EDGE TRANSCEIVER ARCHITECTURE AND RELATED METHODS 审中-公开
标题翻译：边缘收发器架构及相关方法
公开(公告)号：WO2007037963A1
公开(公告)日：2007-04-05
申请号：PCT/US2006/035289
申请日：2006-09-12
申请人： SILICON LABORATORIES INC. , WELLAND, David
发明人： WELLAND, David
IPC分类号： H04B1/04 , H04L27/00
CPC分类号： H04L27/0008 , H04B1/04
摘要： In one embodiment, the present invention includes an apparatus having multiple transmission paths, including a first transmission path configured to receive and process baseband data in a first mode of operation to generate a radio frequency (RP) signal for output via a common output path, and a second transmission path configured to receive and process the baseband data in a second mode of operation to generate the RF signal for output via the common output path.
摘要翻译：在一个实施例中，本发明包括具有多个传输路径的装置，包括被配置为在第一操作模式中接收和处理基带数据以产生用于经由公共输出路径输出的射频（RP）信号的第一传输路径，以及第二传输路径，其被配置为在第二操作模式中接收和处理所述基带数据，以产生所述RF信号以经由所述公共输出路径输出。

25. 发明申请

WO2007033120A1 ANALOG VARACTOR 审中-公开
标题翻译：模拟变量
公开(公告)号：WO2007033120A1
公开(公告)日：2007-03-22
申请号：PCT/US2006/035397
申请日：2006-09-12
申请人： SILICON LABORATORIES INC. , VANCORENLAND, Peter , LIM, Lysander , MARQUES, Augusto, M. , WILLINHAM, Scott, D.
发明人： VANCORENLAND, Peter , LIM, Lysander , MARQUES, Augusto, M. , WILLINHAM, Scott, D.
IPC分类号： H03J3/18 , H03B5/12 , H03L7/099
CPC分类号： H03J3/185 , H03B5/1243 , H03B5/1293 , H03B2200/0062 , H03B2201/0208 , H03B2201/0266 , H03J7/10 , H03J2200/36 , H03L7/099
摘要： An oscillator includes a plurality of varactor cells to receive a control signal to control a frequency of the oscillator. Each of the varactor cells includes a switch that includes a first terminal to receive the control signal and a second terminal such that the switch operates to control a capacitance of the varactor cell in response to a voltage between the first and second terminals. The oscillator includes a bias circuit to provide a different bias voltage to each second terminal and an amplifier that is coupled to the varactor cells to generate an oscillating signal.
摘要翻译：振荡器包括多个变容二极管单元，用于接收控制信号以控制振荡器的频率。每个变容二极管单元包括开关，其包括用于接收控制信号的第一端子和第二端子，使得开关操作以响应于第一和第二端子之间的电压来控制变容二极管的电容。振荡器包括偏置电路，以向每个第二端子提供不同的偏置电压，以及耦合到变容二极管单元以产生振荡信号的放大器。

26. 发明申请

WO2007005664A2 METHODS AND APPARATUS TO GENERATE SMALL FREQUENCY CHANGES 审中-公开
标题翻译：产生小频率变化的方法和设备
公开(公告)号：WO2007005664A2
公开(公告)日：2007-01-11
申请号：PCT/US2006/025691
申请日：2006-06-29
申请人： SILICON LABORATORIES INC. , DER, Lawrence , TAIPALE, Dana , WILLINGHAM, Scott, D.
发明人： DER, Lawrence , TAIPALE, Dana , WILLINGHAM, Scott, D.
IPC分类号： H03B5/12
CPC分类号： H03J1/00 , H03B2201/025 , H03J3/20
摘要： In one embodiment, the present invention includes an apparatus having a first capacitor coupled between a first node and a second node, a second capacitor coupled between the second node and a reference potential, and a third capacitor coupled between the second node and a switch, where the switch is controllable to couple the third capacitor to the second node. Using such an apparatus small changes in capacitance and correspondingly small changes in frequency may be effected. Other embodiments are directed to calibration of one or more capacitor banks.
摘要翻译：在一个实施例中，本发明包括一种装置，该装置具有耦合在第一节点和第二节点之间的第一电容器，耦合在第二节点和参考电势之间的第二电容器以及耦合在第一节点和第二节点之间的第三电容器在第二节点和开关之间，其中开关是可控制的以将第三电容器耦合到第二节点。使用这样的装置可以实现电容的小变化和相应的频率变化。其他实施例涉及一个或多个电容器组的校准。

27. 发明申请

WO2007001540A1 SYNCHRONIZING A MODEM AND VOCODER OF A MOBILE STATION 审中-公开
标题翻译：同步移动站的调制解调器和VOCODER
公开(公告)号：WO2007001540A1
公开(公告)日：2007-01-04
申请号：PCT/US2006/011770
申请日：2006-03-30
申请人： SILICON LABORATORIES INC. , ANDERTON, David, O. , YIIN, Jeffrey, L.
发明人： ANDERTON, David, O. , YIIN, Jeffrey, L.
IPC分类号： H04J3/06
CPC分类号： H04J3/0632
摘要： In one embodiment, the present invention includes a method for determining a level of a buffer that stores data samples. The level may be determined at a predetermined position of a data frame sequence. Based on the level of the buffer at this position, a vocoder and modem of a mobile station may be synchronized. One or both of the vocoder and modem may be adjusted to attain the synchronization. Thus a rate mismatch between the vocoder and modem may be resolved.
摘要翻译：在一个实施例中，本发明包括一种用于确定存储数据样本的缓冲器的级别的方法。可以在数据帧序列的预定位置确定电平。基于该位置的缓冲器的电平，移动站的声码器和调制解调器可以被同步。可以调整声码器和调制解调器中的一个或两个以实现同步。因此，声码器和调制解调器之间的速率失配可以被解决。

28. 发明申请

WO2007001539A1 PERFORMING DIAGNOSTICS IN A WIRELESS SYSTEM 审中-公开
标题翻译：在无线系统中执行诊断
公开(公告)号：WO2007001539A1
公开(公告)日：2007-01-04
申请号：PCT/US2006/011769
申请日：2006-03-30
申请人： SILICON LABORATORIES INC. , ANDERTON, David, O.
发明人： ANDERTON, David, O.
IPC分类号： H04Q7/34 , H04M1/24
CPC分类号： H04W24/00 , H04M1/24 , H04M1/72522
摘要： In one embodiment, the present invention includes an apparatus for permitting diagnostic testing of a wireless device. The apparatus may include a first switch to route diagnostic information or acoustic information received from a processor of the device, a codec coupled to the first switch to code the routed diagnostic information or acoustic information, and a second switch coupled to the codec to route the coded diagnostic information to a first port of the wireless device and to route the coded acoustic information to the first port or a second port of the wireless device.
摘要翻译：在一个实施例中，本发明包括用于允许无线设备的诊断测试的装置。该设备可以包括第一交换机以路由从设备的处理器接收的诊断信息或声学信息，耦合到第一交换机的编解码器来编码路由的诊断信息或声学信息，以及耦合到编解码器的第二开关以路由将编码的诊断信息发送到无线设备的第一端口并且将编码的声学信息路由到无线设备的第一端口或第二端口。

29. 发明申请

WO2006105323A1 METHOD AND SYSTEM FOR SAMPLING A SIGNAL 审中-公开
标题翻译：采样信号的方法和系统
公开(公告)号：WO2006105323A1
公开(公告)日：2006-10-05
申请号：PCT/US2006/011698
申请日：2006-03-30
申请人： SILICON LABORATORIES, INC. , SOMAYAJULA, Shyam, S.
发明人： SOMAYAJULA, Shyam, S.
IPC分类号： H03M3/00 , H03M1/08
CPC分类号： H03M1/0658 , H03M1/0818 , H03M1/1215 , H03M1/128 , H03M3/336 , H03M3/458 , H03M3/47
摘要： A system includes a digital circuit that may be clocked by a digital clock signal having an associated clock period. The system also includes a sample clock generation circuit coupled to a sampling circuit. The sample clock generation circuit may be configured to receive an input clock having a fixed phase relationship with respect to the digital clock signal. The sample clock generation circuit may also generate a sample clock having a first sampling edge corresponding to a first relative offset within the clock period and a subsequent sampling edge corresponding to a different relative offset within the clock period. The sampling circuit may be configured to sample a designated signal upon a first sampling instance corresponding to the first sampling edge and to sample the designated signal upon a subsequent sampling instance corresponding to the subsequent sampling edge.
摘要翻译：一种系统包括可由具有相关时钟周期的数字时钟信号来计时的数字电路。该系统还包括耦合到采样电路的采样时钟产生电路。采样时钟产生电路可以被配置为接收相对于数字时钟信号具有固定相位关系的输入时钟。采样时钟产生电路还可以产生具有与时钟周期内的第一相对偏移相对应的第一采样边沿和对应于时钟周期内的不同相对偏移的后续采样边沿的采样时钟。采样电路可以被配置为在与第一采样边缘相对应的第一采样实例上对指定信号进行采样，并且在对应于后续采样边沿的后续采样实例上采样指定信号。

30. 发明申请

WO2006105184A1 MAGNETICALLY DIFFERENTIAL INDUCTORS AND ASSOCIATED METHODS 审中-公开
标题翻译：电磁差分电感和相关方法
公开(公告)号：WO2006105184A1
公开(公告)日：2006-10-05
申请号：PCT/US2006/011445
申请日：2006-03-29
申请人： SILICON LABORATORIES INC. , MARQUES, Augusto Manuel
发明人： MARQUES, Augusto Manuel
IPC分类号： H01F17/00 , H01L23/522 , H01F27/36 , H01F27/34
CPC分类号： H05K1/0228 , H01F17/0006 , H01F27/346 , H01L23/5227 , H01L2924/0002 , H05K1/165 , H05K2201/09254 , H01L2924/00
摘要： A method and apparatus is provided for use in an integrated circuit (60) or printed circuit board for reducing or minimizing interference. An inductance is formed using two or more inductors (10A, 10B) coupled together and configured such that current flows through the inductors (10A, 10B) in different directions, thus at least partially canceling magnetic fields. When designing a circuit, the configuration of the inductors(10A, 10B), as well as the relative positions of portions of the circuit, can be tweaked to provide optimal interference or noise control.
摘要翻译：提供了一种用于集成电路（60）或印刷电路板中用于减少或最小化干扰的方法和装置。使用耦合在一起的两个或更多个电感器（10A，10B）形成电感，并且被配置为使得电流在不同方向上流过电感器（10A，10B），从而至少部分地消除磁场。当设计电路时，电感器（10A，10B）的配置以及电路部分的相对位置可以进行调整，以提供最佳的干扰或噪声控制。

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