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21. 发明授权

US08228089B2 Wafer test method and wafer test apparatus 失效
标题翻译：晶圆试验方法和晶圆试验装置
公开(公告)号：US08228089B2
公开(公告)日：2012-07-24
申请号：US12704206
申请日：2010-02-11
申请人： Youngok Kim , Jeongnam Han , Changki Hong , Boun Yoon , Kuntack Lee , Young-Hoo Kim
发明人： Youngok Kim , Jeongnam Han , Changki Hong , Boun Yoon , Kuntack Lee , Young-Hoo Kim
IPC分类号： G01R31/26 , G01R31/08 , H01L21/66
CPC分类号： H01L22/14
摘要： The inventive concept provides a wafer test method and a wafer test apparatus. The wafer test method can recognize the amount of residuals generated in a sidewall of the metal-containing layer pattern and the extent of corrosion of a sidewall of the metal-containing layer pattern using the measured electric resistance by supplying an electrolyte so that the electrolyte is in contact with a portion of the metal-containing layer pattern in a predetermined chip region and measuring an electric resistance between a first electrode which is electrically in contact with the other portion of the metal-containing layer pattern and a second electrode which is in contact with the electrolyte in the predetermined region. Thus, a wafer test method and a wafer test apparatus can be embodied by an in-line method without dividing a wafer into each chip.
摘要翻译：本发明的概念提供了晶片测试方法和晶片测试装置。晶片测试方法可以通过提供电解质来确定含金属层图案的侧壁中产生的残留量以及含金属层图案的侧壁的腐蚀程度，使得电解质为与预定芯片区域中的含金属层图案的一部分接触，并且测量与含金属层图案的另一部分电接触的第一电极和接触的第二电极之间的电阻电解液在预定区域内。因此，可以通过在线方式来实现晶片测试方法和晶片测试装置，而不将晶片分成每个芯片。

22. 发明申请

US20110266606A1 METHOD OF MANUFACTURING NONVOLATILE MEMORY DEVICE AND NONVOLATILE MEMORY DEVICE MANUFACTURED BY THE METHOD 有权
标题翻译：制造非易失性存储器件的方法和由该方法制造的非易失性存储器件
公开(公告)号：US20110266606A1
公开(公告)日：2011-11-03
申请号：US13179842
申请日：2011-07-11
申请人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
发明人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
IPC分类号： H01L29/78
CPC分类号： H01L27/11578 , G11C16/0483 , H01L27/11582 , H01L29/792 , H01L29/7926
摘要： A method of manufacturing a nonvolatile memory device having a three-dimensional memory device includes alternately stacking a plurality of first and second material layers having a different etching selectivity on a semiconductor substrate; forming an opening penetrating the plurality of first and second material layers; removing the first material layers exposed by the opening to form extended portions extending in a direction perpendicular to the semiconductor substrate from the opening; conformally forming a charge storage layer along a surface of the opening and the extended portions; and removing the charge storage layer formed on sidewalls of the second material layers to locally form the charge storage layer patterns in the extended portions.
摘要翻译：一种制造具有三维存储器件的非易失性存储器件的方法包括在半导体衬底上交替堆叠具有不同蚀刻选择性的多个第一和第二材料层; 形成贯穿所述多个第一和第二材料层的开口; 去除由开口暴露的第一材料层，以形成从开口垂直于半导体衬底的方向延伸的延伸部分; 沿着开口和延伸部分的表面保形地形成电荷存储层; 并且去除形成在第二材料层的侧壁上的电荷存储层，以在延伸部分中局部形成电荷存储层图案。

23. 发明申请

US20100181610A1 NON-VOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING NON-VOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件的制造方法和非易失性存储器件的制造方法
公开(公告)号：US20100181610A1
公开(公告)日：2010-07-22
申请号：US12650076
申请日：2009-12-30
申请人： Young-Hoo Kim , Daehyuk Kang , Youngok Kim , Sang Won Bae , Boun Yoon , Kuntack Lee
发明人： Young-Hoo Kim , Daehyuk Kang , Youngok Kim , Sang Won Bae , Boun Yoon , Kuntack Lee
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L27/11582 , H01L29/7926
摘要： Provided are nonvolatile memory devices with a three-dimensional structure and methods of fabricating the same. The nonvolatile memory device includes conductive patterns three-dimensionally arranged on a semiconductor substrate, semiconductor patterns that extend from the semiconductor substrate and intersect one-side walls of the conductive patterns, charge storage layers interposed between the semiconductor patterns and one-side walls of the conductive patterns, and seed layer patterns interposed between the charge storage layers and one-side walls of the conductive patterns.
摘要翻译：提供具有三维结构的非易失性存储器件及其制造方法。非易失性存储器件包括三维地布置在半导体衬底上的导电图案，半导体图案从半导体衬底延伸并与导电图案的一侧壁相交，插入在半导体图案和半导体图案的一侧壁之间的电荷存储层导电图案和介于电荷存储层和导电图案的单侧壁之间的种子层图案。

24. 发明申请

US20100127398A1 Wiring structure of a semiconductor device 审中-公开
标题翻译：半导体器件的接线结构
公开(公告)号：US20100127398A1
公开(公告)日：2010-05-27
申请号：US12592042
申请日：2009-11-18
申请人： Young-Hoo Kim , Chang-Ki Hong , Jae-Dong Lee
发明人： Young-Hoo Kim , Chang-Ki Hong , Jae-Dong Lee
IPC分类号： H01L23/498
CPC分类号： H01L21/76831 , H01L21/76885 , H01L27/10855 , H01L27/10888
摘要： In a wiring structure of a semiconductor device and a method of manufacturing the same, a wiring structure includes a contact pad, a contact plug, a spacer and an insulation interlayer pattern. The contact pad is electrically connected to a contact region of a substrate. The contact plug is provided on the contact pad and is electrically connected to the contact pad. The spacer faces an upper side surface of the contact pad and sidewalls of the contact plug. The insulation interlayer pattern has an opening, the contact plug and the spacer being provided in the opening. The spacer of the wiring structure may prevent the contact pad from being damaged by a cleaning solution while forming a contact plug to be connected to a capacitor.
摘要翻译：在半导体器件的布线结构及其制造方法中，布线结构包括接触焊盘，接触插塞，间隔物和绝缘夹层图案。接触垫电连接到基板的接触区域。接触插头设置在接触垫上并且电连接到接触垫。隔离物面向接触垫的上侧表面和接触插塞的侧壁。绝缘夹层图案具有开口，接触插塞和间隔件设置在开口中。布线结构的间隔件可以防止接触垫在形成要连接到电容器的接触插塞时被清洁溶液损坏。

25. 发明申请

US20100120214A1 Method of manufacturing nonvolatile memory device and nonvolatile memory device manufactured by the method 有权
标题翻译：通过该方法制造非易失性存储器件和非易失性存储器件的制造方法
公开(公告)号：US20100120214A1
公开(公告)日：2010-05-13
申请号：US12590614
申请日：2009-11-10
申请人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
发明人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
IPC分类号： H01L21/336
CPC分类号： H01L27/11578 , G11C16/0483 , H01L27/11582 , H01L29/792 , H01L29/7926
摘要： A method of manufacturing a nonvolatile memory device having a three-dimensional memory device includes alternately stacking a plurality of first and second material layers having a different etching selectivity on a semiconductor substrate; forming an opening penetrating the plurality of first and second material layers; removing the first material layers exposed by the opening to form extended portions extending in a direction perpendicular to the semiconductor substrate from the opening; conformally forming a charge storage layer along a surface of the opening and the extended portions; and removing the charge storage layer formed on sidewalls of the second material layers to locally form the charge storage layer patterns in the extended portions.
摘要翻译：一种制造具有三维存储器件的非易失性存储器件的方法包括在半导体衬底上交替堆叠具有不同蚀刻选择性的多个第一和第二材料层; 形成贯穿所述多个第一和第二材料层的开口; 去除由开口暴露的第一材料层，以形成从开口垂直于半导体衬底的方向延伸的延伸部分; 沿着开口和延伸部分的表面保形地形成电荷存储层; 并且去除形成在第二材料层的侧壁上的电荷存储层，以在延伸部分中局部形成电荷存储层图案。

26. 发明申请

US20090004826A1 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20090004826A1
公开(公告)日：2009-01-01
申请号：US12214019
申请日：2008-06-16
申请人： Young-Hoo Kim , Hyun Park , Byung-Hong Chung , Jeong-Lim Nam
发明人： Young-Hoo Kim , Hyun Park , Byung-Hong Chung , Jeong-Lim Nam
IPC分类号： H01L21/20
CPC分类号： H01L27/11568 , H01L21/8221 , H01L27/0688 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/11551
摘要： In a method of manufacturing a semiconductor device, a first substrate and a second substrate, which include a plurality of memory cells and selection transistors, respectively, are provided. A first insulating interlayer and a second insulating interlayer are formed on the first substrate and the second substrate, respectively, to cover the memory cells and the selection transistors. A lower surface of the second substrate is partially removed to reduce a thickness of the second substrate. The lower surface of the second substrate is attached to the first insulating interlayer. Plugs are formed through the second insulating interlayer, the second substrate and the first insulating interlayer to electrically connect the selection transistors in the first substrate and the second substrate to the plugs. Thus, impurity ions in the first substrate will not diffuse during a thermal treatment process.
摘要翻译：在制造半导体器件的方法中，提供分别包括多个存储单元和选择晶体管的第一衬底和第二衬底。分别在第一基板和第二基板上形成第一绝缘层和第二绝缘中间层，以覆盖存储单元和选择晶体管。部分地去除第二基板的下表面以减小第二基板的厚度。第二基板的下表面附接到第一绝缘中间层。插塞通过第二绝缘中间层，第二基板和第一绝缘夹层形成，以将第一基板和第二基板中的选择晶体管电连接到插头。因此，在热处理过程中，第一衬底中的杂质离子将不会扩散。

27. 发明授权

US08120089B2 Non-volatile memory device and method for fabricating non-volatile memory device 有权
标题翻译：非易失性存储器件和用于制造非易失性存储器件的方法
公开(公告)号：US08120089B2
公开(公告)日：2012-02-21
申请号：US12650076
申请日：2009-12-30
申请人： Young-Hoo Kim , Daehyuk Kang , Youngok Kim , Sang Won Bae , Boun Yoon , Kuntack Lee
发明人： Young-Hoo Kim , Daehyuk Kang , Youngok Kim , Sang Won Bae , Boun Yoon , Kuntack Lee
IPC分类号： H01L29/76
CPC分类号： H01L29/792 , H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L27/11582 , H01L29/7926
摘要： Provided are nonvolatile memory devices with a three-dimensional structure and methods of fabricating the same. The nonvolatile memory device includes conductive patterns three-dimensionally arranged on a semiconductor substrate, semiconductor patterns that extend from the semiconductor substrate and intersect one-side walls of the conductive patterns, charge storage layers interposed between the semiconductor patterns and one-side walls of the conductive patterns, and seed layer patterns interposed between the charge storage layers and one-side walls of the conductive patterns.
摘要翻译：提供具有三维结构的非易失性存储器件及其制造方法。非易失性存储器件包括三维地布置在半导体衬底上的导电图案，半导体图案从半导体衬底延伸并与导电图案的一侧壁相交，插入在半导体图案和半导体图案的一侧壁之间的电荷存储层导电图案和介于电荷存储层和导电图案的单侧壁之间的种子层图案。

28. 发明授权

US07994011B2 Method of manufacturing nonvolatile memory device and nonvolatile memory device manufactured by the method 有权
标题翻译：通过该方法制造非易失性存储器件和非易失性存储器件的制造方法
公开(公告)号：US07994011B2
公开(公告)日：2011-08-09
申请号：US12590614
申请日：2009-11-10
申请人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
发明人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
IPC分类号： H01L21/336 , H01L29/66
CPC分类号： H01L27/11578 , G11C16/0483 , H01L27/11582 , H01L29/792 , H01L29/7926
摘要： A method of manufacturing a nonvolatile memory device having a three-dimensional memory device includes alternately stacking a plurality of first and second material layers having a different etching selectivity on a semiconductor substrate; forming an opening penetrating the plurality of first and second material layers; removing the first material layers exposed by the opening to form extended portions extending in a direction perpendicular to the semiconductor substrate from the opening; conformally forming a charge storage layer along a surface of the opening and the extended portions; and removing the charge storage layer formed on sidewalls of the second material layers to locally form the charge storage layer patterns in the extended portions.
摘要翻译：一种制造具有三维存储器件的非易失性存储器件的方法包括在半导体衬底上交替堆叠具有不同蚀刻选择性的多个第一和第二材料层; 形成贯穿所述多个第一和第二材料层的开口; 去除由开口暴露的第一材料层，以形成从开口垂直于半导体衬底的方向延伸的延伸部分; 沿着开口和延伸部分的表面保形地形成电荷存储层; 并且去除形成在第二材料层的侧壁上的电荷存储层，以在延伸部分中局部形成电荷存储层图案。

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