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21. 发明申请

US20050029681A1 Semiconductor memory device and method for producing the same 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20050029681A1
公开(公告)日：2005-02-10
申请号：US10883738
申请日：2004-07-06
申请人： Tomoyuki Ishii , Taro Osabe , Hideaki Kurata , Takeshi Sakata
发明人： Tomoyuki Ishii , Taro Osabe , Hideaki Kurata , Takeshi Sakata
IPC分类号： G11C8/00 , G11C11/56 , G11C16/04 , H01L21/8246 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11568 , B82Y10/00 , G11C11/5621 , G11C11/5671 , G11C16/0433 , G11C16/0458 , G11C16/0475 , G11C16/0491 , G11C2216/06 , H01L27/115 , H01L27/11521
摘要： Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 μm, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.
摘要翻译：公开了使用设置在半导体衬底上的反转层作为数据线的非易失性半导体存储器件。存储器件可以减少存储器单元之间的特性变化并且可以降低位成本。多个辅助栅极通过栅极氧化膜形成在p型阱的上部。在覆盖这些辅助栅极的层间绝缘体的上部形成用作控制电极的字线。这些字线的宽度例如为0.1μm，并且每个字线通过作为厚度为约20nm的氧化硅膜的侧壁间隔物与其相邻字线分开。

22. 发明授权

US06787835B2 Semiconductor memories 失效
标题翻译：半导体存储器
公开(公告)号：US06787835B2
公开(公告)日：2004-09-07
申请号：US10167754
申请日：2002-06-11
申请人： Bryan Atwood , Kazuo Yano , Tomoyuki Ishii , Taro Osabe , Kazumasa Yanagisawa , Takeshi Sakata
发明人： Bryan Atwood , Kazuo Yano , Tomoyuki Ishii , Taro Osabe , Kazumasa Yanagisawa , Takeshi Sakata
IPC分类号： H01L27108
CPC分类号： H01L27/105 , G11C11/405 , G11C11/406 , G11C11/4076 , G11C2207/2281 , G11C2207/229 , H01L27/0207 , H01L27/108 , H01L27/1203
摘要： A high integration dynamic random access memory is provided by this invention. Furthermore, a write method is provided such that the cell size of two- and three-transistor gain cell memories is reduced. A dynamic memory incorporating a thin-channel transistor as the write element such that long data storage retention is achieved in the memory devices of this invention. A dynamic memory cell having low operating power and high density is also realized by this invention.
摘要翻译：本发明提供了高集成度的动态随机存取存储器。此外，提供了一种写入方法，使得减少了双晶体管和三晶体管增益单元存储器的单元尺寸。一种结合了作为写入元件的薄沟道晶体管的动态存储器，使得在本发明的存储器件中实现长的数据存储保持。通过本发明也实现了具有低操作功率和高密度的动态存储单元。

23. 发明申请

US20130341745A1 Magnetic Field Measurement Apparatus 审中-公开
标题翻译：磁场测量装置
公开(公告)号：US20130341745A1
公开(公告)日：2013-12-26
申请号：US13980579
申请日：2011-03-14
申请人： Seiichi Suzuki , Taro Osabe , Ryuzo Kawabata
发明人： Seiichi Suzuki , Taro Osabe , Ryuzo Kawabata
IPC分类号： H01L43/02
CPC分类号： H01L43/02 , G01R33/032
摘要： A light pumping magnetic measurement apparatus configured to suppress an influence on a magnetic field from a heater and facilitate reduction in size and integration of a gas cell when heating the gas cell in order to improve a sensitivity of detection of the magnetic field is provided. This measurement apparatus includes a first glass substrate, a substrate 102 having a thermal conductivity higher than glass, and a second glass substrate laminated in this order. At least one portion of a through hole formed on the substrate 102 having a thermal conductivity higher than the glass and penetrating therethrough when viewed in cross section constitutes a void 111 hermetically sealed by the first glass substrate and the second glass substrate, the void is filled with alkali metal gas generated by an alkali metal solid substance or liquid 112, and a flow channel (through hole) 113 connected to inlet-outlet ports 114 provided on the laminated substrate is formed in the vicinity of the void 111 of a substrate 103, so that the temperature of the alkali metal gas may be adjusted by causing the fluid to flow to the flow channel (through hole).
摘要翻译：提供了一种光泵测量装置，其被配置为抑制对来自加热器的磁场的影响，并且在加热气室时有利于减小气室的尺寸和集成，以提高磁场检测的灵敏度。该测量装置包括第一玻璃基板，具有高于玻璃的导热率的基板102和依次层压的第二玻璃基板。形成在基板102上的通孔的至少一部分具有高于玻璃的热导率并且在横截面中观察时贯穿其中，形成由第一玻璃基板和第二玻璃基板气密密封的空隙111，填充空隙由碱金属固体物质或液体112产生的碱金属气体和与层叠基板上设置的入口排出口114连接的流路（通孔）113形成在基板103的空隙111的附近，使得可以通过使流体流向流路（通孔）来调节碱金属气体的温度。

24. 发明授权

US07294880B2 Semiconductor non-volatile memory cell with a plurality of charge storage regions 有权
标题翻译：具有多个电荷存储区域的半导体非易失性存储单元
公开(公告)号：US07294880B2
公开(公告)日：2007-11-13
申请号：US10919471
申请日：2004-08-17
申请人： Taro Osabe , Tomoyuki Ishii , Kazuo Yano , Takashi Kobayashi
发明人： Taro Osabe , Tomoyuki Ishii , Kazuo Yano , Takashi Kobayashi
IPC分类号： H01L27/108
CPC分类号： H01L27/11521 , B82Y10/00 , G11C16/0433 , G11C16/0458 , G11C16/0483 , G11C16/0491 , G11C16/10 , G11C16/26 , G11C2216/06 , H01L27/115 , H01L29/42332 , H01L29/42348 , H01L29/7887
摘要： For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
摘要翻译：为了通过电池级提供具有提高可靠性的便宜的半导体存储器件，以代替通过诸如ECC的电存储器单元中的缺陷脱离，并且还用于提供能够在垂直方向上按比例缩小的单元结构，同时保持在需要高速读出操作的半导体存储器件中的可靠性，电荷存储区域由大量半导体电荷存储小区域制成的粒子构成，各自独立，从而通过细胞水平。

25. 发明申请

US20070257306A1 Semiconductor memory device and method for producing the same 失效
公开(公告)号：US20070257306A1
公开(公告)日：2007-11-08
申请号：US11808228
申请日：2007-06-07
申请人： Tomoyuki Ishii , Taro Osabe , Hideaki Kurata , Takeshi Sakata
发明人： Tomoyuki Ishii , Taro Osabe , Hideaki Kurata , Takeshi Sakata
IPC分类号： H01L29/788
CPC分类号： H01L27/11568 , B82Y10/00 , G11C11/5621 , G11C11/5671 , G11C16/0433 , G11C16/0458 , G11C16/0475 , G11C16/0491 , G11C2216/06 , H01L27/115 , H01L27/11521
摘要： Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 μm, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.

26. 发明授权

US07238570B2 Semiconductor memory device and method for producing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07238570B2
公开(公告)日：2007-07-03
申请号：US11271739
申请日：2005-11-14
申请人： Tomoyuki Ishii , Taro Osabe , Hideaki Kurata , Takeshi Sakata
发明人： Tomoyuki Ishii , Taro Osabe , Hideaki Kurata , Takeshi Sakata
IPC分类号： H01L29/788
CPC分类号： H01L27/11568 , B82Y10/00 , G11C11/5621 , G11C11/5671 , G11C16/0433 , G11C16/0458 , G11C16/0475 , G11C16/0491 , G11C2216/06 , H01L27/115 , H01L27/11521
摘要： Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 μm, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.
摘要翻译：公开了使用设置在半导体衬底上的反转层作为数据线的非易失性半导体存储器件。存储器件可以减少存储器单元之间的特性变化并且可以降低位成本。多个辅助栅极通过栅极氧化膜形成在p型阱的上部。在覆盖这些辅助栅极的层间绝缘体的上部形成用作控制电极的字线。这些字线的宽度例如为0.1μm，并且每个字线通过作为厚度为约20nm的氧化硅膜的侧壁间隔物与其相邻字线分开。

27. 发明授权

US06949782B2 Semiconductor memories 失效
标题翻译：半导体存储器
公开(公告)号：US06949782B2
公开(公告)日：2005-09-27
申请号：US10790183
申请日：2004-03-02
申请人： Bryan Atwood , Kazuo Yano , Tomoyuki Ishii , Taro Osabe , Kazumasa Yanagisawa , Takeshi Sakata
发明人： Bryan Atwood , Kazuo Yano , Tomoyuki Ishii , Taro Osabe , Kazumasa Yanagisawa , Takeshi Sakata
IPC分类号： G11C11/00 , G11C11/401 , G11C11/405 , G11C11/406 , G11C11/4076 , H01L21/8242 , H01L27/105 , H01L27/108 , H01L27/12
CPC分类号： H01L27/105 , G11C11/405 , G11C11/406 , G11C11/4076 , G11C2207/2281 , G11C2207/229 , H01L27/0207 , H01L27/108 , H01L27/1203
摘要： A high integration dynamic random access memory is provided by this invention. Furthermore, a write method is provided such that the cell size of two-and three-transistor gain cell memories is reduced. A dynamic memory incorporating a thin-channel transistor as the write element such that long data storage retention is achieved in the memory devices of this invention. A dynamic memory cell having low operating power and high density is also realized by this invention.
摘要翻译：本发明提供了高集成度的动态随机存取存储器。此外，提供了一种写入方法，使得减少了二晶体管和三晶体管增益单元存储器的单元尺寸。一种结合了作为写入元件的薄沟道晶体管的动态存储器，使得在本发明的存储器件中实现长的数据存储保持。通过本发明也实现了具有低操作功率和高密度的动态存储单元。

28. 发明申请

US20050056884A1 Semiconductor memory element, semiconductor device and control method thereof 有权
标题翻译：半导体存储元件，半导体器件及其控制方法
公开(公告)号：US20050056884A1
公开(公告)日：2005-03-17
申请号：US10957680
申请日：2004-10-05
申请人： Taro Osabe , Tomoyuki Ishii
发明人： Taro Osabe , Tomoyuki Ishii
IPC分类号： H01L21/8247 , G11C16/04 , H01L21/28 , H01L27/115 , H01L29/423 , H01L29/788 , H01L29/792 , H01L21/336
CPC分类号： H01L29/42332 , G11C16/0408 , H01L21/28273 , H01L27/115 , H01L29/7885
摘要： In a semiconductor flash memory required to have high reliability, injection and extraction of electrons must be performed through an oxide film obtained by directly oxidizing a silicon substrate. Accordingly, the voltage to be used is a large voltage ranging from positive to negative one. In contrast, by storing charges in a plurality of dispersed regions, high reliability is achieved. Based on the high reliability, transfer of electrons is permitted through not only the oxide film obtained by directly thermally oxidizing a high reliability silicon substrate but also another oxide film deposited by CVD, or the like. In consequence, a device is controlled by electric potentials of the same polarity upon writing of data and upon erasing of data.
摘要翻译：在需要具有高可靠性的半导体闪速存储器中，必须通过直接氧化硅衬底获得的氧化膜进行电子注入和提取。因此，要使用的电压是从正极到负极的大电压。相反，通过在多个分散区域中存储电荷，实现了高可靠性。基于高可靠性，不仅可以通过直接热氧化高可靠性硅衬底而且通过CVD沉积的另一氧化膜等获得的氧化膜来允许电子的转移。因此，在写入数据和擦除数据时，器件由相同极性的电位控制。

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