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21. 发明授权

US5557771A Data processing system and storage device and auxiliary memory bits for controlling data protection in the storage device 失效
标题翻译：数据处理系统和存储设备和辅助存储器位，用于控制存储设备中的数据保护
公开(公告)号：US5557771A
公开(公告)日：1996-09-17
申请号：US039761
申请日：1993-03-30
申请人： Atsuo Kawaguchi , Hiroshi Motoda
发明人： Atsuo Kawaguchi , Hiroshi Motoda
IPC分类号： G06F12/14
CPC分类号： G06F12/1483
摘要： This invention relates to the data processing system which provides, for example, data protection in units smaller than the page or the segment in a more flexible form without causing a marked decrease in efficiency. The conventional data word array has added thereto auxiliary memory bit array and a control unit, such that when a data word is read or updated, the execution of the program is interrupted according to the value of an auxiliary memory bit and a predetermined procedure is called. In this way, the set value of the auxiliary memory bit is used to specify that the processing is to be interrupted each time a data word with the set bit value is read or written.
摘要翻译：本发明涉及数据处理系统，其以更灵活的形式提供例如小于页面或段的单元的数据保护，而不会导致效率的显着降低。常规数据字阵列已经添加了辅助存储器位阵列和控制单元，使得当读取或更新数据字时，根据辅助存储器位的值中断程序的执行，并且调用预定过程。以这种方式，辅助存储器位的设定值用于指定每次读取或写入具有设定位值的数据字时处理将中断。

22. 发明授权

US5253212A Semiconductor memory IC and semiconductor memory device 失效
标题翻译：半导体存储器IC和半导体存储器件
公开(公告)号：US5253212A
公开(公告)日：1993-10-12
申请号：US801351
申请日：1991-12-02
申请人： Atsuo Kawaguchi , Hiroshi Motoda
发明人： Atsuo Kawaguchi , Hiroshi Motoda
IPC分类号： G11C8/04 , G11C8/00
CPC分类号： G11C8/04
摘要： A semiconductor memory IC including an address value register, an adder and an address difference signal line, wherein an address for operation of the semiconductor memory IC is specified by an address difference signal representing an increment/decrement of the address value register An optional address can be specified by an increment/decrement signal, and all memory cells can be addressed even though the number of terminals is smaller than that required for specifying an absolute value of an address, so that the semiconductor memory IC can be reduced in size. To form a semiconductor memory device by using this semiconductor memory IC, an address memory unit, an address value difference computing unit and an addressing unit are provided. When operating the memory device, a target address in the memory unit can be reached by specifying a difference between the target address and the address held in the address memory unit.
摘要翻译：一种包括地址值寄存器，加法器和地址差信号线的半导体存储器IC，其中半导体存储器IC的操作地址由表示地址值寄存器的递增/减量的地址差信号指定。可选地址可以由增量/减量信号指定，即使端子数小于指定地址的绝对值所需的存储单元，也可以对所有的存储单元进行寻址，从而可以减小半导体存储器IC的尺寸。为了通过使用该半导体存储器IC来形成半导体存储器件，提供了地址存储器单元，地址值差值计算单元和寻址单元。当操作存储器件时，通过指定目标地址与地址存储器单元中保存的地址之间的差异可以达到存储器单元中的目标地址。

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