专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明申请

US20090114969A1 Silicon carbide semiconductor device and related manufacturing method 有权
标题翻译：碳化硅半导体器件及相关制造方法
公开(公告)号：US20090114969A1
公开(公告)日：2009-05-07
申请号：US12289624
申请日：2008-10-30
申请人： Naohiro Suzuki , Yuuichi Takeuchi , Takeshi Endo , Eiichi Okuno , Toshimasa Yamamoto
发明人： Naohiro Suzuki , Yuuichi Takeuchi , Takeshi Endo , Eiichi Okuno , Toshimasa Yamamoto
IPC分类号： H01L29/94 , H01L21/04 , H01L29/68
CPC分类号： H01L29/7813 , H01L29/045 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/0847 , H01L29/1095 , H01L29/1608 , H01L29/47 , H01L29/66068 , H01L29/7391 , H01L29/7397 , H01L29/7828
摘要： An SiC semiconductor device and a related manufacturing method are disclosed having a structure provided with a p+-type deep layer formed in a depth equal to or greater than that of a trench to cause a depletion layer between at a PN junction between the p+-type deep layer and an n−-type drift layer to extend into the n−-type drift layer in a remarkable length, making it difficult for a high voltage, resulting from an adverse affect arising from a drain voltage, to enter a gate oxide film. This results in a capability of minimizing an electric field concentration in the gate oxide film, i.e., an electric field concentration occurring at the gate oxide film at a bottom wall of the trench.
摘要翻译：公开了一种SiC半导体器件和相关制造方法，其具有设置有等于或大于沟槽深度形成的p +型深层的结构，以在p +型之间的PN结处引起耗尽层深层和n型漂移层以非常长的长度延伸到n型漂移层中，使得由于漏极电压引起的不利影响导致的高电压难以进入栅极氧化膜。这导致使栅极氧化膜中的电场浓度最小化的能力，即在沟槽的底壁处的栅极氧化膜处发生的电场浓度。

22. 发明申请

US20080203402A1 SiC semiconductor device and method for manufacturing the same 有权
标题翻译： SiC半导体器件及其制造方法
公开(公告)号：US20080203402A1
公开(公告)日：2008-08-28
申请号：US12071717
申请日：2008-02-26
申请人： Takeshi Endo , Tsuyoshi Yamamoto , Eiichi Okuno
发明人： Takeshi Endo , Tsuyoshi Yamamoto , Eiichi Okuno
IPC分类号： H01L29/15 , H01L21/3205 , H01L21/336
CPC分类号： H01L29/7828 , H01L21/049 , H01L29/045 , H01L29/0847 , H01L29/1608 , H01L29/51 , H01L29/66068
摘要： A SiC semiconductor device includes: a SiC substrate having a main surface; a channel region on the substrate; first and second impurity regions on upstream and downstream sides of the channel region, respectively; a gate on the channel region through a gate insulating film. The channel region for flowing current between the first and second impurity regions is controlled by a voltage applied to the gate. An interface between the channel region and the gate insulating film has a hydrogen concentration equal to or greater than 2.6×1020 cm−3. The interface provides a channel surface perpendicular to a (0001)-orientation plane.
摘要翻译： SiC半导体器件包括：具有主表面的SiC衬底; 衬底上的沟道区; 分别在通道区域的上游侧和下游侧的第一和第二杂质区域; 通过栅极绝缘膜在沟道区上形成栅极。用于在第一和第二杂质区域之间流动电流的沟道区域由施加到栅极的电压来控制。沟道区域和栅极绝缘膜之间的界面的氢浓度等于或大于2.6×10 20 cm -3。界面提供垂直于（0001）取向平面的通道表面。

23. 发明申请

US20080102585A1 Method of manufacturing silicon carbide semiconductor device 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US20080102585A1
公开(公告)日：2008-05-01
申请号：US11976216
申请日：2007-10-23
申请人： Hiroki Nakamura , Hiroyuki Ichikawa , Eiichi Okuno
发明人： Hiroki Nakamura , Hiroyuki Ichikawa , Eiichi Okuno
IPC分类号： H01L21/336
CPC分类号： H01L29/7828 , H01L21/049 , H01L29/1608 , H01L29/66068 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a silicon carbide semiconductor device having a MOS structure includes preparing a substrate made of silicon carbide, and forming a channel region, a first impurity region, a second impurity region, a gate insulation layer, and a gate electrode to form a semiconductor element on the substrate. In addition, a film is formed on the semiconductor element to provide a material of an interlayer insulation layer, and a reflow process is performed at a temperature about 700° C. or over in an wet atmosphere so that the interlayer insulation layer is formed from the film. Furthermore, a dehydration process is performed at about 700° C. or lower in an inert gas atmosphere after the reflow process is performed.
摘要翻译：制造具有MOS结构的碳化硅半导体器件的方法包括制备由碳化硅制成的衬底，并形成沟道区，第一杂质区，第二杂质区，栅绝缘层和栅电极，以形成半导体元件。此外，在半导体元件上形成膜以提供层间绝缘层的材料，并且在湿气氛中在约700℃或更高的温度下进行回流工艺，使得层间绝缘层由这个电影。此外，在进行回流处理之后，在惰性气体气氛中，在约700℃以下进行脱水处理。

24. 发明申请

US20080090383A1 Method for manufacturing SiC semiconductor device 有权
标题翻译： SiC半导体器件的制造方法
公开(公告)号：US20080090383A1
公开(公告)日：2008-04-17
申请号：US11730600
申请日：2007-04-03
申请人： Hiroki Nakamura , Yoshihiro Miyoshi , Eiichi Okuno
发明人： Hiroki Nakamura , Yoshihiro Miyoshi , Eiichi Okuno
IPC分类号： H01L21/265 , H01L21/304
CPC分类号： H01L21/046 , H01L21/324 , H01L29/1608 , H01L29/66068 , H01L29/7828 , Y10S438/931
摘要： A method for manufacturing a SiC semiconductor device includes: forming an impurity layer in a SiC layer; and forming an oxide film on the SiC layer. The forming the impurity layer includes: implanting an impurity ion in the SiC layer; forming a carbon layer on the SiC layer; heating the SiC layer for activating the implanted impurity in the SiC layer covered with the carbon layer; and removing the carbon layer from the SiC layer. The forming the carbon layer includes: coating a resist on the SiC layer; and heating the resist for evaporating organic matter in the resist so that the resist is carbonized. The forming the oxide film is performed after the removing the carbon layer.
摘要翻译：一种制造SiC半导体器件的方法包括：在SiC层中形成杂质层; 在SiC层上形成氧化膜。形成杂质层包括：在SiC层中注入杂质离子; 在所述SiC层上形成碳层; 加热SiC层以激活被碳层覆盖的SiC层中的注入杂质; 并从SiC层除去碳层。形成碳层包括：在SiC层上涂覆抗蚀剂; 并加热抗蚀剂以蒸发抗蚀剂中的有机物质，使得抗蚀剂被碳化。在去除碳层之后进行氧化膜的形成。

25. 发明授权

US06455892B1 Silicon carbide semiconductor device and method for manufacturing the same 有权
标题翻译：碳化硅半导体器件及其制造方法
公开(公告)号：US06455892B1
公开(公告)日：2002-09-24
申请号：US09663134
申请日：2000-09-15
申请人： Eiichi Okuno , Shinji Amano
发明人： Eiichi Okuno , Shinji Amano
IPC分类号： H01L2994
CPC分类号： H01L29/66068 , H01L29/1608 , H01L29/41766 , H01L29/7828 , H01L29/7838
摘要： In an accumulation mode MOSFET, a surface channel layer is disposed on a p− type base region between an n+ type source region and an n− type epi layer. The surface channel layer is composed of an n type channel layer formed on the p− type base region and a p type channel layer formed on the n type channel layer. A gate insulating film is formed on the p type channel layer. A channel is formed in the n type channel layer. Accordingly, channel mobility can be improved and on-resistance can be reduced without being affected by a state of an interface between the gate insulating film and the surface channel layer.
摘要翻译：在累积模式MOSFET中，表面沟道层设置在n +型源区和n型外延层之间的p型基极区上。表面沟道层由形成在p型基极区上的n型沟道层和形成在n型沟道层上的p型沟道层构成。栅极绝缘膜形成在p型沟道层上。在n型沟道层中形成沟道。因此，可以改善沟道迁移率，并且可以降低导通电阻，而不受栅极绝缘膜和表面沟道层之间的界面的状态的影响。

26. 发明授权

US06280562B1 Contact adhering method 失效
标题翻译：接触粘附方法
公开(公告)号：US06280562B1
公开(公告)日：2001-08-28
申请号：US08200554
申请日：1994-02-22
申请人： Nobuyoshi Nishikawa , Eiichi Okuno , Toshiharu Horie , Zyunzo Makino , Hiroshi Aoki
发明人： Nobuyoshi Nishikawa , Eiichi Okuno , Toshiharu Horie , Zyunzo Makino , Hiroshi Aoki
IPC分类号： C09J502
CPC分类号： C09J5/00 , Y10T428/283
摘要： A contact adhering method comprising the steps of: (1) applying a layer of a moisture curable adhesive to at least one of two adherends; (2) maintaning the two adherends in non-contact with each other for a period of time until the surface of the layer of moisture curable adhesive develops tack as a result of exposure to atmospheric moisture; and (3) bringing the two adherends into contact with each other in a tack range.
摘要翻译：一种接触粘附方法，包括以下步骤：（1）向两个被粘物中的至少一个施加一层湿气可固化粘合剂;（2）将两个被粘物彼此不接触一段时间，直到表面的湿气固化粘合剂层由于暴露于大气湿气而产生粘性; 和（3）使两个被粘物在粘性范围内彼此接触。

27. 发明授权

US4595129A Moistureproof sealing of a container 失效
标题翻译：容器的防潮密封
公开(公告)号：US4595129A
公开(公告)日：1986-06-17
申请号：US566429
申请日：1983-12-28
申请人： Eiichi Okuno , Naomi Okamura , Keiji Ozawa , Takashi Saitoh
发明人： Eiichi Okuno , Naomi Okamura , Keiji Ozawa , Takashi Saitoh
IPC分类号： B65D81/26 , B65D8/04
CPC分类号： B65D81/266
摘要： A container for storing a moisture-sensitive material which comprises a fillable space behind the moisture-sensitive material, which has contained therein a water-reactive, highly volatile silane, alkyl titanate or isocyanate which, upon reaction with water, produces a low-viscosity material which is water repellant. The water-reactive compound prevents contact of moisture with the moisture-sensitive material while it is in the container.
摘要翻译：一种用于储存湿敏材料的容器，其中包含湿敏材料后面的可填充空间，其中含有水反应性高挥发性硅烷，钛酸烷基酯或异氰酸酯，其在与水反应时产生低粘度防水材料。水反应性化合物防止水分与湿敏物质在容器中的接触。

28. 发明授权

US08324704B2 Silicon carbide semiconductor device with Schottky barrier diode and method of manufacturing the same 有权
标题翻译：具有肖特基势垒二极管的碳化硅半导体器件及其制造方法
公开(公告)号：US08324704B2
公开(公告)日：2012-12-04
申请号：US12659853
申请日：2010-03-23
申请人： Takeo Yamamoto , Takeshi Endo , Eiichi Okuno , Hirokazu Fujiwara , Masaki Konishi , Takashi Katsuno , Yukihiko Watanabe
发明人： Takeo Yamamoto , Takeshi Endo , Eiichi Okuno , Hirokazu Fujiwara , Masaki Konishi , Takashi Katsuno , Yukihiko Watanabe
IPC分类号： H01L29/24 , H01L29/47 , H01L21/04
CPC分类号： H01L29/47 , H01L21/0465 , H01L21/0495 , H01L29/0615 , H01L29/0619 , H01L29/1608 , H01L29/6606 , H01L29/66143 , H01L29/872
摘要： A silicon carbide semiconductor device with a Schottky barrier diode includes a first conductivity type silicon carbide substrate, a first conductivity type silicon carbide drift layer on a first surface of the substrate, a Schottky electrode forming a Schottky contact with the drift layer, and an ohmic electrode on a second surface of the substrate. The Schottky electrode includes an oxide layer in direct contact with the drift layer. The oxide layer is made of an oxide of molybdenum, titanium, nickel, or an alloy of at least two of these elements.
摘要翻译：具有肖特基势垒二极管的碳化硅半导体器件包括第一导电型碳化硅衬底，在衬底的第一表面上的第一导电型碳化硅漂移层，与漂移层形成肖特基接触的肖特基电极和欧姆电极在基板的第二表面上。肖特基电极包括与漂移层直接接触的氧化物层。氧化物层由钼，钛，镍或这些元素中的至少两种的合金的氧化物制成。

29. 发明授权

US07994513B2 Silicon carbide semiconductor device including deep layer 有权
标题翻译：碳化硅半导体器件包括深层
公开(公告)号：US07994513B2
公开(公告)日：2011-08-09
申请号：US12385715
申请日：2009-04-16
申请人： Kensaku Yamamoto , Eiichi Okuno
发明人： Kensaku Yamamoto , Eiichi Okuno
IPC分类号： H01L21/02
CPC分类号： H01L29/7397 , H01L29/0623 , H01L29/0634 , H01L29/0847 , H01L29/1608 , H01L29/66068 , H01L29/7828
摘要： A silicon carbide semiconductor device includes a substrate, a drift layer located on a first surface of the substrate, a base region located on the drift layer, a source region located on the base region, a trench sandwiched by each of the base region to the drift layer, a channel layer located in the trench, a gate insulating layer located on the channel layer, a gate electrode located on the gate insulating layer, a source electrode electrically coupled with the source region and the base region, a drain electrode located on a second surface of the substrate, and a deep layer located under the base region and extending to a depth deeper than the trench. The deep layer is formed into a lattice pattern.
摘要翻译：碳化硅半导体器件包括衬底，位于衬底的第一表面上的漂移层，位于漂移层上的基极区域，位于基极区域上的源极区域，夹在基底区域之中的沟槽漂移层，位于沟槽中的沟道层，位于沟道层上的栅极绝缘层，位于栅极绝缘层上的栅电极，与源区和基极区电耦合的源电极，位于衬底的第二表面，以及位于基底区域下方并延伸到比沟槽深的深度的深层。深层形成为格子图案。

30. 发明授权

US07947555B2 Method of making silicon carbide semiconductor device 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US07947555B2
公开(公告)日：2011-05-24
申请号：US12385519
申请日：2009-04-09
申请人： Atsuya Akiba , Eiichi Okuno
发明人： Atsuya Akiba , Eiichi Okuno
IPC分类号： H01L21/336
CPC分类号： H01L29/66068 , H01L29/0623 , H01L29/0634 , H01L29/0847 , H01L29/1608 , H01L29/7828
摘要： In a method of making a silicon carbide semiconductor device having a MOSFET, after a mask is placed on a surface of a first conductivity type drift layer of silicon carbide, ion implantation is performed by using the mask to form a lower layer of a deep layer extending in one direction. A first conductivity type current scattering layer having a higher concentration than the drift layer is formed on the surface of the drift layer. After another mask is placed on a surface of the current scattering layer, ion implantation is performed by using the other mask to form an upper layer of the deep layer at a position corresponding to the lower layer in such a manner that the lower layer and the upper layer are connected together.
摘要翻译：在制造具有MOSFET的碳化硅半导体器件的方法中，在将掩模放置在碳化硅的第一导电型漂移层的表面上之后，通过使用掩模进行离子注入以形成深层的下层在一个方向上延伸。在漂移层的表面上形成具有比漂移层更高的浓度的第一导电型电流散射层。在另一个掩模放置在当前散射层的表面上之后，通过使用另一个掩模进行离子注入，以在与下层对应的位置处形成深层的上层，使得下层和上层连接在一起。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式