专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US06968162B2 Satellite communication transmission control system and small aperture terminal 失效
标题翻译：卫星通信传输控制系统和小孔径终端
公开(公告)号：US06968162B2
公开(公告)日：2005-11-22
申请号：US10106501
申请日：2002-03-27
申请人： Hizuru Nawata
发明人： Hizuru Nawata
IPC分类号： H04B7/15 , H04B7/155 , H04B7/185 , H04B7/208 , H04B1/18
CPC分类号： H04B7/208 , H04B7/18528
摘要： A satellite communication transmission control system includes one central station, a plurality of small aperture terminals, and one communication satellite serving as a repeater for the central and aperture terminals. This system performs communication via a frequency division multiple access communication channel. The central station includes a modulator for transmitting via a common channel a signal for controlling/monitoring the small aperture terminals on the basis of a stable clock signal. Each aperture terminal includes a modulator, transmission frequency converter, antenna/RF device, reception frequency converter, demodulator, and frequency comparator. The modulator modulates communication information. The transmission frequency converter frequency-converts a modulated wave from the modulator into a carrier signal (modulated carrier). The reception frequency converter frequency-converts the modulated carrier. The demodulator demodulates a signal received via the common channel and outputs a reception clock. The frequency comparator detects the frequency error of a local oscillator, and generates a control signal for stopping transmission of the modulated carrier until the frequency error falls within a preset tolerance range.
摘要翻译：卫星通信传输控制系统包括一个中心站，多个小孔径终端以及用作中央和小孔终端的中继器的一个通信卫星。该系统通过频分多址通信信道进行通信。中心站包括一个调制器，用于经由公共通道发送一个用于根据稳定的时钟信号控制/监视小孔径终端的信号。每个孔径终端包括调制器，传输频率转换器，天线/ RF设备，接收频率转换器，解调器和频率比较器。调制器调制通信信息。传输频率转换器将来自调制器的调制波频率转换为载波信号（调制载波）。接收频率转换器对调制载波进行频率转换。解调器解调通过公共信道接收的信号并输出接收时钟。频率比较器检测本地振荡器的频率误差，并产生用于停止调制载波的传输的控制信号，直到频率误差落在预设的容差范围内。

22. 发明申请

US20050107050A1 Variable communication system 失效
标题翻译：可变通信系统
公开(公告)号：US20050107050A1
公开(公告)日：2005-05-19
申请号：US10506623
申请日：2003-03-07
申请人： Hizuru Nawata
发明人： Hizuru Nawata
IPC分类号： H04L27/22 , H04B1/707 , H04J13/16 , H04L1/18 , H04L25/02 , H04L27/00 , H04L29/06 , H03C1/62
CPC分类号： H04B1/707 , H04L1/18 , H04L25/0262 , H04L27/0008
摘要： A communication amount monitoring circuit (124) monitors a transmission buffer (123) to which communication data (122) is input, and discriminates the magnitude of the amount of communication data. If the amount of information per unit time is relatively large, information is read out from the transmission buffer in accordance with a chip clock. This information is modulated as communication data (137) by a modulator (139) and transmitted. If the amount of information is relatively small, information is read out from the transmission buffer (123) in accordance with a clock obtained by frequency-dividing the chip clock. This information is exclusive-ORed with a spreading code generated by using the chip clock and is then modulated by a modulator (139). The resultant data is transmitted as communication data (137). Since there is no change in the frequency of the communication data (137), there is no need to provide any resynchronization on the reception device side at the time of switching between the large and small amounts of information. There is therefore no need to provide any buffer area for resynchronization.
摘要翻译：通信量监视电路（124）监视输入了通信数据（122）的发送缓冲器（123），并且辨别通信数据量的大小。如果每单位时间的信息量相对较大，则根据芯片时钟从发送缓冲器读出信息。该信息由调制器（139）调制为通信数据（137）并被发送。如果信息量相对较小，则根据通过对芯片时钟进行分频而获得的时钟，从发送缓冲器（123）读出信息。该信息与通过使用芯片时钟产生并由调制器（139）调制的扩展码进行异或运算。所得数据作为通信数据发送（137）。由于通信数据（137）的频率没有变化，所以在切换大量和少量信息之间不需要在接收装置侧提供任何再同步。因此，不需要为重新同步提供任何缓冲区。

23. 发明授权

US5229997A Carrier recovery control with sequential FEC sync detection and frame sync detection 失效
标题翻译：具有顺序FEC同步检测和帧同步检测的载波恢复控制
公开(公告)号：US5229997A
公开(公告)日：1993-07-20
申请号：US854244
申请日：1992-03-20
申请人： Yozo Hirata , Hizuru Nawata
发明人： Yozo Hirata , Hizuru Nawata
IPC分类号： H04L1/00 , H04L7/04 , H04L27/00 , H04L27/227
CPC分类号： H04L27/2273 , H04L2027/0032 , H04L2027/0057 , H04L2027/0073 , H04L2027/0095 , H04L7/041
摘要： At the transmit end of a communications system, a convolutional code of a multiplex of an information-bearing signal and a unique word is modulated upon a transmitted carrier. At the receive end, the transmitted carrier is demodulated with a local carrier to detect the convolutional code. The error rate of a decoded version of the convolutional code is determined, and an out-of-FEC-sync signal is produced when the error rate is higher than a threshold value. Unique words are detected from the decoded signal and counted during a prescribed time interval to produce an out-of-frame-sync signal when the count falls below a threshold. The frequency of the local carrier is swept in the presence of the out-of-FEC-sync signal. When the signal ceases to exist, a timeout period is set, and the local carrier frequency is swept again when the timeout period expires during the presence of the out-of-frame-sync signal.

24. 发明授权

US5050192A Automatic gain control 失效
标题翻译：自动增益控制
公开(公告)号：US5050192A
公开(公告)日：1991-09-17
申请号：US616956
申请日：1990-11-21
申请人： Hizuru Nawata
发明人： Hizuru Nawata
IPC分类号： H03G3/30 , H03G3/20 , H04B1/16 , H04J3/00 , H04L7/04 , H04L27/06
CPC分类号： H03G3/3078 , H04L7/04
摘要： An automatic gain control (AGC) for a demodulator which receives digitally modulated burst signals time-serially from a plurality of terminals. The AGC has a series connection of a variable attenuator and a limiter that precedes a demodulator. The variable attenuator is controlled such that when a burst signal is absent, the noise power level inputted to the limiter coincides with a predetermined reference value, whereby when burst signal is present, the limiter controls the burst signal to a predetermined level. As a result, when burst signals greatly differ in level from one another, they are controlled to the predetermined level in their preamble word portions. This insures stable demodulation of data signals.

25. 发明授权

US4920278A Phase comparator 失效
标题翻译：相位比较器
公开(公告)号：US4920278A
公开(公告)日：1990-04-24
申请号：US197851
申请日：1988-05-24
申请人： Hizuru Nawata
发明人： Hizuru Nawata
IPC分类号： H03L7/085 , H03D13/00 , H03L7/087 , H04L27/00 , H04L27/227
CPC分类号： H04L27/2273 , H03D13/00 , H03L7/087 , H04L2027/003 , H04L2027/0051 , H04L2027/0067
摘要： A phase comparator included in a phase locked loop (PLL) for comparing two input signals with respect to phase to thereby determine their phase difference includes two multipliers and two low-pass filters for producing a sine component signal and a cosine component signal which are associated with the phase difference. A discrimination signal representative of a polarity is generated on the basis of one of those two component signals, and a phase error signal is generated on the basis of the other of them. The phase error signal monotonously increases during predetermined one period which is determined by the discrimination signal, i.e. (2n-1).pi. to (2n+1).pi. where n is 0, .+-.1, .+-.2 and so on. A PLL using such a phase comparator is allowed to rapidly converge to a stable point even when the phase error is close to an unstable point, i.e., .+-.(2n-1) where n is 0, 1, 2 and so on, achieving an extremely short acquisition time.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式