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21. 发明授权

US07763920B2 Semiconductor memory having ferroelectric capacitor 失效
标题翻译：具有铁电电容器的半导体存储器
公开(公告)号：US07763920B2
公开(公告)日：2010-07-27
申请号：US11898297
申请日：2007-09-11
申请人： Yoshinori Kumura , Tohru Ozaki , Iwao Kunishima
发明人： Yoshinori Kumura , Tohru Ozaki , Iwao Kunishima
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119 , H01L31/062 , H01L31/113
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55
摘要： According to an aspect of the present invention, there is provided a semiconductor memory including a lower electrode, a first insulating region formed in the same layer as the lower electrode, a ferroelectric film formed on the lower electrode and on the first insulating region, an upper electrode formed on the ferroelectric film, a second insulating region formed in the same layer as the upper electrode and a transistor. The first insulating region partitions the lower electrode. The second insulating region partitions the upper electrode. The transistor includes a first impurity region connected to the lower electrode and a second impurity region connected to the upper electrode. At least one of the first insulating region and the second insulating region is formed by insulating the lower electrode or the upper electrode.
摘要翻译：根据本发明的一个方面，提供了一种半导体存储器，其包括下电极，与下电极形成在同一层中的第一绝缘区域，形成在下电极和第一绝缘区上的强电介质膜，形成在强电介质膜上的上电极，形成在与上电极相同的层中的第二绝缘区域和晶体管。第一绝缘区域分隔下电极。第二绝缘区域分隔上电极。晶体管包括连接到下电极的第一杂质区和连接到上电极的第二杂质区。通过使下部电极或上部电极绝缘来形成第一绝缘区域和第二绝缘区域中的至少一个。

22. 发明申请

US20100117128A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20100117128A1
公开(公告)日：2010-05-13
申请号：US12564728
申请日：2009-09-22
申请人： Saku Hashiura , Yoshinori Kumura , Tohru Ozaki
发明人： Saku Hashiura , Yoshinori Kumura , Tohru Ozaki
IPC分类号： H01L27/108 , H01L21/8242
CPC分类号： H01L27/11507 , H01L28/55 , H01L28/60 , H01L28/65 , H01L28/75
摘要： A semiconductor memory device has a semiconductor substrate, an impurity diffusion layer that is formed at a surface portion of the semiconductor substrate, an interlayer insulating film that is formed on the semiconductor substrate, a contact plug that penetrates the interlayer insulating film, has a top surface formed higher than a top surface of the interlayer insulating film, a region having a convex shape formed higher than the top surface of the interlayer insulating film, and contacts the impurity diffusion layer, a lower capacitor electrode film that is formed on the contact plug and a predetermined region of the interlayer insulating film, a ferroelectric film that is formed on the lower capacitor electrode film, and an upper capacitor electrode film that is formed on the ferroelectric film.
摘要翻译：半导体存储器件具有半导体衬底，形成在半导体衬底的表面部分的杂质扩散层，形成在半导体衬底上的层间绝缘膜，穿透层间绝缘膜的接触插塞具有顶部表面形成为比层间绝缘膜的顶表面高的区域，具有形成为高于层间绝缘膜的顶表面的凸形的区域，并且与杂质扩散层接触;形成在接触插塞上的下电容器电极膜层间绝缘膜的预定区域，形成在下部电容器电极膜上的铁电体膜和形成在强电介质膜上的上部电容电极膜。

23. 发明授权

US07612398B2 Semiconductor storage device and method of manufacturing the same 失效
标题翻译：半导体存储装置及其制造方法
公开(公告)号：US07612398B2
公开(公告)日：2009-11-03
申请号：US10931193
申请日：2004-09-01
申请人： Yoshinori Kumura , Yoshiro Shimojo , Iwao Kunishima , Tohru Ozaki
发明人： Yoshinori Kumura , Yoshiro Shimojo , Iwao Kunishima , Tohru Ozaki
IPC分类号： H01L21/02
CPC分类号： G11C11/22 , H01L27/11502 , H01L27/11507 , H01L28/57 , H01L28/65
摘要： A semiconductor storage device wherein a plurality of ferroelectric capacitors are sufficiently covered with a hydrogen barrier film formed thereon comprises a field effect transistor formed on one surface side of a semiconductor substrate, a plurality of ferroelectric capacitors formed close to each other above the field effect transistor, an insulting film configured to cover the plurality of ferroelectric capacitors and planarised a space between adjacent ferroelectric capacitors in a self-aligned manner during formation thereof, and a hydrogen barrier film formed on the insulating film.
摘要翻译：一种半导体存储装置，其中多个强电介质电容器被形成在其上的氢阻挡膜充分覆盖，其包括形成在半导体衬底的一个表面侧的场效应晶体管，在场效应晶体管之上彼此靠近地形成的多个铁电电容器被配置为覆盖多个铁电电容器的绝缘膜，并且在其形成期间以自对准的方式平铺相邻的铁电电容器之间的空间，以及形成在绝缘膜上的氢阻挡膜。

24. 发明申请

US20080308902A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20080308902A1
公开(公告)日：2008-12-18
申请号：US12125557
申请日：2008-05-22
申请人： Yoshinori KUMURA , Tohru Ozaki
发明人： Yoshinori KUMURA , Tohru Ozaki
IPC分类号： H01L29/00 , H01L21/00
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/57
摘要： This disclosure concerns a semiconductor device comprising a switching transistor provided on a semiconductor substrate; an interlayer dielectric film formed on the switching transistor; a ferroelectric capacitor including an upper electrode, a ferroelectric film, and a lower electrode formed on the interlayer dielectric film; a contact plug provided in the interlayer dielectric film and electrically connected to the lower electrode; a diffusion layer connecting between the contact plug and the switching transistor; a trench formed around the ferroelectric capacitor; and a barrier film filling in the trench and provided on a side surface of the ferroelectric capacitor and on an upper surface of the interlayer dielectric film, the barrier film suppressing percolation of hydrogen, wherein a thickness of the barrier film on the side surface of the ferroelectric capacitor is larger than a thickness of the barrier film on the upper surface of the interlayer dielectric film.
摘要翻译：本公开涉及一种包括设置在半导体衬底上的开关晶体管的半导体器件; 形成在所述开关晶体管上的层间绝缘膜; 包括形成在层间绝缘膜上的上电极，铁电体膜和下电极的铁电电容器; 设置在所述层间电介质膜中并且电连接到所述下电极的接触插塞; 连接在所述接触插塞和所述开关晶体管之间的扩散层; 形成在铁电电容器周围的沟槽; 以及阻挡膜填充在所述沟槽中并且设置在所述强电介质电容器的侧表面上并且在所述层间电介质膜的上表面上，所述阻挡膜抑制氢的渗透，其中所述阻挡膜在所述侧壁表面上的厚度铁电电容器大于层间电介质膜的上表面上的阻挡膜的厚度。

25. 发明授权

US07400005B2 Semiconductor memory device having ferroelectric capacitors with hydrogen barriers 失效
标题翻译：具有具有氢屏障的铁电电容器的半导体存储器件
公开(公告)号：US07400005B2
公开(公告)日：2008-07-15
申请号：US11142441
申请日：2005-06-02
申请人： Yoshinori Kumura , Iwao Kunishima , Hiroyuki Kanaya , Tohru Ozaki , Kazuhiro Tomioka
发明人： Yoshinori Kumura , Iwao Kunishima , Hiroyuki Kanaya , Tohru Ozaki , Kazuhiro Tomioka
IPC分类号： H01L29/92
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/57 , H01L28/65
摘要： A semiconductor memory device, which prevents the penetration of hydrogen or moisture to a ferroelectric capacitor from its surrounding area including a contact plug portion, comprises a ferroelectric capacitor formed above a semiconductor substrate, a first hydrogen barrier film formed on an upper surface of the ferroelectric capacitor to work as a mask in the formation of the ferroelectric capacitor, a second hydrogen barrier film formed on the upper surface and a side face of the ferroelectric capacitor including on the first hydrogen barrier film, and a contact plug disposed through the first and second hydrogen barrier films, and connected to an upper electrode of the ferroelectric capacitor, a side face thereof being surrounded with the hydrogen barrier films.
摘要翻译：一种半导体存储器件，其防止氢或水分从其包括接触插塞部分的周围区域渗入铁电电容器，包括形成在半导体衬底上的强电介质电容器，形成在铁电体的上表面上的第一氢阻挡膜电容器在形成铁电电容器时用作掩模，在上表面上形成的第二氢阻挡膜和包括在第一氢阻挡膜上的强电介质电容器的侧面，以及通过第一和第二氢阻挡膜，并连接到铁电电容器的上电极，其侧面被氢阻挡膜包围。

26. 发明授权

US07095068B2 Semiconductor memory device having ferroelectric capacitor and method of manufacturing the same 有权
标题翻译：具有铁电电容器的半导体存储器件及其制造方法
公开(公告)号：US07095068B2
公开(公告)日：2006-08-22
申请号：US10455376
申请日：2003-06-06
申请人： Yoshinori Kumura , Iwao Kunishima , Tohru Ozaki , Hiroyuki Kanaya , Shinichi Watanabe
发明人： Yoshinori Kumura , Iwao Kunishima , Tohru Ozaki , Hiroyuki Kanaya , Shinichi Watanabe
IPC分类号： H01L29/76 , H01L27/108
CPC分类号： H01L27/11502 , H01L27/11507
摘要： A semiconductor memory device includes a semiconductor substrate, a first transistor formed on the semiconductor substrate and including a first gate electrode and first and second diffusion layers, a first contact connected to the first diffusion layer, a first conductive oxygen barrier film electrically connected to the first contact and covering at least the upper surface of the first contact, a first ferroelectric capacitor including a first electrode, a second electrode, and a first ferroelectric film interposed between the first and second electrodes, and a first connecting member connected to the first electrode and to the first conductive oxygen barrier film.
摘要翻译：半导体存储器件包括半导体衬底，形成在半导体衬底上的第一晶体管，包括第一栅电极和第一和第二扩散层，与第一扩散层连接的第一触点，与第一导电氧阻隔膜电连接的第一导电氧阻隔膜首先接触并且至少覆盖第一接触件的上表面;第一铁电电容器，包括插入在第一和第二电极之间的第一电极，第二电极和第一铁电体膜;以及连接到第一电极的第一连接构件和第一导电氧阻隔膜。

27. 发明申请

US20060180894A1 Semiconductor memory device and its manufacturing method 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20060180894A1
公开(公告)日：2006-08-17
申请号：US11142441
申请日：2005-06-02
申请人： Yoshinori Kumura , Iwao Kunishima , Hiroyuki Kanaya , Tohru Ozaki , Kazuhiro Tomioka
发明人： Yoshinori Kumura , Iwao Kunishima , Hiroyuki Kanaya , Tohru Ozaki , Kazuhiro Tomioka
IPC分类号： H01L29/00
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/57 , H01L28/65
摘要： A semiconductor memory device, which prevents the penetration of hydrogen or moisture to a ferroelectric capacitor from its surrounding area including a contact plug portion, comprises a ferroelectric capacitor formed above a semiconductor substrate, a first hydrogen barrier film formed on an upper surface of the ferroelectric capacitor to work as a mask in the formation of the ferroelectric capacitor, a second hydrogen barrier film formed on the upper surface and a side face of the ferroelectric capacitor including on the first hydrogen barrier film, and a contact plug disposed through the first and second hydrogen barrier films, and connected to an upper electrode of the ferroelectric capacitor, a side face thereof being surrounded with the hydrogen barrier films.
摘要翻译：一种半导体存储器件，其防止氢或水分从其包括接触插塞部分的周围区域渗入铁电电容器，包括形成在半导体衬底上的强电介质电容器，形成在铁电体的上表面上的第一氢阻挡膜电容器在形成铁电电容器时用作掩模，在上表面上形成的第二氢阻挡膜和包括在第一氢阻挡膜上的强电介质电容器的侧面，以及通过第一和第二氢阻挡膜，并连接到铁电电容器的上电极，其侧面被氢阻挡膜包围。

28. 发明授权

US06972990B2 Ferro-electric memory device and method of manufacturing the same 失效
标题翻译：铁电记忆装置及其制造方法
公开(公告)号：US06972990B2
公开(公告)日：2005-12-06
申请号：US10858441
申请日：2004-06-02
申请人： Yoshinori Kumura , Tohru Ozaki , Hiroyuki Kanaya , Iwao Kunishima , Yoshiro Shimojo
发明人： Yoshinori Kumura , Tohru Ozaki , Hiroyuki Kanaya , Iwao Kunishima , Yoshiro Shimojo
IPC分类号： H01L27/10 , G11C11/14 , G11C11/22 , H01L21/8246 , H01L27/105
CPC分类号： G11C11/22 , H01L27/105 , H01L27/11502 , H01L27/11507 , H01L27/11509 , H01L28/57
摘要： A ferro-electric memory device includes a gate electrode which is formed on a semiconductor substrate, first and second diffusion layers which are formed in the semiconductor substrate, a first contact which is electrically connected to the first diffusion layer, a first oxygen barrier film having insulating properties, which is formed on the first contact, a second contact which is electrically connected to the first contact, a second oxygen barrier film having insulating properties, which is formed on the second contact, a ferro-electric capacitor which has a lower electrode, a ferro-electric film, and an upper electrode, a third contact which is electrically connected to the upper electrode, a first interconnection which is electrically connected to the second and third contacts, and a third oxygen barrier film having insulating properties, which is arranged between the ferro-electric capacitor and the second contact and brought into contact with the first oxygen barrier film.
摘要翻译：铁电存储器件包括形成在半导体衬底上的栅电极，形成在半导体衬底中的第一和第二扩散层，与第一扩散层电连接的第一触点，具有第一氧阻隔膜，绝缘性能，其形成在第一接触件上，与第一接触件电连接的第二接触件，形成在第二接触件上的具有绝缘性能的第二氧阻隔膜，具有下电极的铁电电容器铁电膜和上电极，与上电极电连接的第三触点，与第二触头和第三触头电连接的第一互连件，以及具有绝缘性能的第三隔氧膜，其为布置在铁电电容器和第二触点之间并与第一氧阻隔膜接触。

29. 发明申请

US20050207202A1 FERRO-ELECTRIC MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：电动记忆体装置及其制造方法
公开(公告)号：US20050207202A1
公开(公告)日：2005-09-22
申请号：US10858441
申请日：2004-06-02
申请人： Yoshinori Kumura , Tohru Ozaki , Hiroyuki Kanaya , Iwao Kunishima , Yoshiro Shimojo
发明人： Yoshinori Kumura , Tohru Ozaki , Hiroyuki Kanaya , Iwao Kunishima , Yoshiro Shimojo
IPC分类号： H01L27/10 , G11C11/14 , G11C11/22 , H01L21/8246 , H01L27/105
CPC分类号： G11C11/22 , H01L27/105 , H01L27/11502 , H01L27/11507 , H01L27/11509 , H01L28/57
摘要： A ferro-electric memory device includes a gate electrode which is formed on a semiconductor substrate, first and second diffusion layers which are formed in the semiconductor substrate, a first contact which is electrically connected to the first diffusion layer, a first oxygen barrier film having insulating properties, which is formed on the first contact, a second contact which is electrically connected to the first contact, a second oxygen barrier film having insulating properties, which is formed on the second contact, a ferro-electric capacitor which has a lower electrode, a ferro-electric film, and an upper electrode, a third contact which is electrically connected to the upper electrode, a first interconnection which is electrically connected to the second and third contacts, and a third oxygen barrier film having insulating properties, which is arranged between the ferro-electric capacitor and the second contact and brought into contact with the first oxygen barrier film.
摘要翻译：铁电存储器件包括形成在半导体衬底上的栅电极，形成在半导体衬底中的第一和第二扩散层，与第一扩散层电连接的第一触点，具有第一氧阻隔膜，绝缘性能，其形成在第一接触件上，与第一接触件电连接的第二接触件，形成在第二接触件上的具有绝缘性能的第二氧阻隔膜，具有下电极的铁电电容器铁电膜和上电极，与上电极电连接的第三触点，与第二触头和第三触头电连接的第一互连件，以及具有绝缘性能的第三隔氧膜，其为布置在铁电电容器和第二触点之间并与第一氧阻隔膜接触。

30. 发明申请

US20120139024A1 NONVOLATILE SEMICONDUCTOR MEMORY AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：非易失性半导体存储器及其制造方法
公开(公告)号：US20120139024A1
公开(公告)日：2012-06-07
申请号：US13050297
申请日：2011-03-17
申请人： Takayuki TOBA , Tohru Ozaki
发明人： Takayuki TOBA , Tohru Ozaki
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L27/11524 , H01L27/11534 , H01L29/66825
摘要： In one embodiment, a nonvolatile semiconductor memory includes a memory cell array, a first silicon nitride film and a second silicon nitride film. The memory cell array includes NAND cell units. Each of the NAND cell units has memory cell transistors, a source-side select gate transistor and a drain-side select gate transistor. The source-side select gate transistors is disposed in such a manner as to face each other and the drain-side select gate transistors is disposed in such a manner as to face each other. The first silicon nitride film is present in a region between the source-side select gate transistors and is disposed at a position lowest from the upper surface of the semiconductor substrate. The second silicon nitride film is formed in a region between the drain-side select gate transistors and is disposed at a position lowest from the upper surface of the semiconductor substrate.
摘要翻译：在一个实施例中，非易失性半导体存储器包括存储单元阵列，第一氮化硅膜和第二氮化硅膜。存储单元阵列包括NAND单元单元。每个NAND单元单元具有存储单元晶体管，源极选择栅极晶体管和漏极侧选择栅极晶体管。源极侧选择栅极晶体管以彼此面对的方式设置，并且漏极侧选择栅极晶体管以彼此面对的方式设置。第一氮化硅膜存在于源极选择栅晶体管之间的区域中，并且设置在从半导体衬底的上表面最低的位置。第二氮化硅膜形成在漏极侧选择栅晶体管之间的区域中，并且设置在从半导体衬底的上表面最低的位置。

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