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    • 22. 发明申请
    • Photovoltaic Array Using Integrated Boards
    • 使用集成电路板的光伏阵列
    • US20160079908A1
    • 2016-03-17
    • US14774246
    • 2014-03-05
    • Tao SUN
    • Tao Sun
    • H02S20/00
    • H02S20/00F24S25/10F24S25/40Y02E10/50
    • A photovoltaic array using photovoltaic module integrated boards comprises at least two cross beams and at least two photovoltaic module integrated boards; the angle between the longitudinal axes of the at least two beams is less than 15 degrees; the angle between the longitudinal axis of at least one beams and the longitudinal axis of the at least two photovoltaic module integrated boards is not less than 30 degrees and not more than 150 degrees; and the total area of all the photovoltaic module integrated boards supported by at least one group of the beams is more than 12 square meters. The present invention is designed to share beams, columns and foundations, thus saving materials and installation time and greatly reducing cost.
    • 使用光伏模块集成板的光伏阵列包括至少两个横梁和至少两个光伏模块集成板; 所述至少两个梁的纵向轴线之间的角度小于15度; 至少一个光束的纵向轴线与至少两个光伏模块集成板的纵向轴线之间的角度不小于30度且不超过150度; 并且由至少一组梁支撑的所有光伏模块集成板的总面积大于12平方米。 本发明设计用于共享梁,立柱和基座,从而节省材料和安装时间,大大降低成本。
    • 25. 发明申请
    • Comparator with reduced power consumption and method for the same
    • 具有降低功耗的比较器和方法相同
    • US20080136461A1
    • 2008-06-12
    • US11955199
    • 2007-12-12
    • Tao Sun
    • Tao Sun
    • H03K3/023
    • H03K3/023
    • Techniques pertaining to a comparator circuit with reduced power consumption are disclosed. According to one aspect of the present invention, the comparator unit has a pair of input signal pins VIP and VIN, a pair of output signal pins VOR and VOS, and a clock signal pin CLK. In operation, when the CLK signal is at an idle voltage level, the comparator unit comes into an idle state. At the idle state, the comparator unit does not compare the two input signals VIP and VIN so that the output signals are identical. When the CLK signal is at a busy voltage level, the comparator comes into a busy state. At the busy state, the comparator compares the input signals VIP and VIN, and determines the values of the output signals VOR and VOS depending on the comparing result, e.g., if the input signal VIP is larger than the input signal VIN, the output signal VOR is high and the output signal VOS is low; otherwise, the output signal VOR is low and the output signal VOS is high.
    • 公开了具有降低功耗的比较器电路的技术。 根据本发明的一个方面,比较器单元具有一对输入信号引脚VIP和VIN,一对输出信号引脚VOR和VOS以及时钟信号引脚CLK。 在操作中,当CLK信号处于空闲电压电平时,比较器单元进入空闲状态。 在空闲状态下,比较器单元不比较两个输入信号VIP和VIN,使得输出信号相同。 当CLK信号处于忙电压电平时,比较器进入忙状态。 在忙状态下,比较器比较输入信号VIP和VIN,并根据比较结果确定输出信号VOR和VOS的值,例如,如果输入信号VIP大于输入信号VIN,输出信号 VOR为高电平,输出信号VOS为低电平; 否则,输出信号VOR为低,输出信号VOS为高电平。