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21. 发明申请

US20060149566A1 Distributed management service for an auto-identification system 有权
公开(公告)号：US20060149566A1
公开(公告)日：2006-07-06
申请号：US11025133
申请日：2004-12-30
申请人： Tao Lin
发明人： Tao Lin
IPC分类号： G06Q99/00
CPC分类号： G06Q10/08 , G06Q20/203
摘要： An auto-identification system is described that includes a plurality of distributed auto-id nodes that are operable to track physical objects as they move through an operation of an enterprise, such as, for example, a supply chain network or a sales network. The auto-id nodes are distributed across sites of the network, and are in communication with enterprise application systems and/or data acquisition systems such as RFID readers or sensor devices. By focusing on their respective sites, the auto-id nodes minimize the amount of data tracked by their respective enterprise applications. Further, a distributed management service may be in communication with all of the auto-id nodes, so as to distribute rules governing the operation of the enterprise to at least one of the auto-id nodes. The distributed management service may be used for, for example, generating and updating new rules, distributing the rules into the local auto-id nodes, and operating the rules for handling the data collected from different auto-id nodes.

22. 发明授权

US06252919B1 Re-synchronization of independently-clocked audio streams by fading-in with a fractional sample over multiple periods for sample-rate conversion 有权
$Re-synchronization of independently-clocked audio streams by fading-in with a fractional sample over multiple periods for sample-rate conversion$
标题翻译：独立时钟音频流的重新同步，通过在多个时间段内通过分数采样进行采样率转换
公开(公告)号：US06252919B1
公开(公告)日：2001-06-26
申请号：US09215507
申请日：1998-12-17
申请人： Tao Lin
发明人： Tao Lin
IPC分类号： H04L2300
CPC分类号： H04L7/0029 , G10L21/04 , H04J3/0632 , H04J3/07 , H04L7/005 , H04L25/05
摘要： A net sample is added or removed from an audio sample stream by fading in or out fractional samples over many sample periods. A sample-rate converter has a FIFO that is written with an input sample by an input clock synchronized to the input audio stream. The samples are read from the FIFO by a derived clock. The derived clock is generated from an output clock using a nominal ratio of Q/P. Read and write counters for the FIFO are compared. When the write counter is ahead of the read counter by exactly a target amount the derived clock is a ratio of Q/P of the output clock. When the write counter is ahead of the read counter by more than the target, the read rate is increased by removing one net sample over many sample periods. When the write counter is ahead of the read counter by less than the target amount, the read rate is decreased by adding one net sample over many sample periods. Samples from a delayed stream from the FIFO are faded in (out) by gradually increasing (decreasing) a weighting of successive fractional samples from the delayed stream and decreasing (increasing) the weighting of successive input-stream samples. Fade-in occurs over many sample periods, such as 256, to reduce audible distortion.
摘要翻译：通过在多个采样周期内淡入或淡出分数样本，从音频采样流中添加或删除净采样。采样率转换器具有通过与输入音频流同步的输入时钟与输入采样一起写入的FIFO。通过派生时钟从FIFO读取样本。导出时钟是使用标称比例的Q / P从输出时钟生成的。比较FIFO的读写计数器。当写计数器在读计数器之前超过目标量时，导出时钟是输出时钟的Q / P比。当写计数器超出读取计数器超过目标时，通过在多个采样周期中移除一个净采样来增加读取速率。当写计数器在读取计数器之前小于目标量时，通过在多个采样周期中添加一个净采样来减小读取速率。来自FIFO的延迟流的采样通过逐渐增加（减少）来自延迟流的连续分数样本的加权并减小（增加）连续输入流样本的加权，从而衰减（输出）。淡入淡出发生在许多采样周期，例如256，以减少可听见的失真。

23. 发明授权

US6057789A Re-synchronization of independently-clocked audio streams by dynamically switching among 3 ratios for sampling-rate-conversion 有权
标题翻译：通过在3个比率之间动态切换采样率转换，重新同步独立时钟的音频流
公开(公告)号：US6057789A
公开(公告)日：2000-05-02
申请号：US182348
申请日：1998-10-29
申请人： Tao Lin
发明人： Tao Lin
IPC分类号： G06F5/10 , H03M7/00 , G06F7/10
CPC分类号： G06F5/10 , G06F2205/061
摘要： A sample-rate converter has a FIFO for buffering input samples. The FIFO is written with an input sample by an input clock synchronized to the input audio stream. The samples are read from the FIFO by a derived clock. The derived clock is generated from an output clock using a nominal ratio of Q/P. Read and write counters for the FIFO are compared. When the write counter is ahead of the read counter by exactly a target amount the derived clock is a ratio of Q/P of the output clock. When the write counter is ahead of the read counter by more than the target, the read rate is increased by accelerating the derived clock to a ratio of (Q+1)/P. When the write counter is ahead of the read counter by less than the target amount, the read rate is decreased by slowing the derived clock to a ratio of (Q-1)/P. An accumulator generates the derived clock by adding Q, Q+1, or Q-1 for each output-clock pulse. Each derived-clock pulse reduces the accumulator by P. The accumulator value is used to select one group of L coefficients in a set of P groups to apply to a convolution FIR filter that generates the output sample from L input samples stored from the FIFO in a shift register.
摘要翻译：采样率转换器具有用于缓冲输入采样的FIFO。 FIFO通过与输入音频流同步的输入时钟写入输入采样。通过派生时钟从FIFO读取样本。导出时钟是使用标称比例的Q / P从输出时钟生成的。比较FIFO的读写计数器。当写计数器在读计数器之前超过目标量时，导出时钟是输出时钟的Q / P比。当写计数器超过读取计数器超过目标时，通过将导出的时钟加速到（Q + 1）/ P的比率来增加读取速率。当写计数器在读取计数器之前小于目标量时，通过将导出的时钟减慢到（Q-1）/ P的比率来减小读取速率。累加器通过为每个输出时钟脉冲添加Q，Q + 1或Q-1来产生导出的时钟。每个派生时钟脉冲将累加器减少P.累加器值用于选择一组P组中的一组L系数，以应用于从FIFO中存储的L个输入样本生成输出样本的卷积FIR滤波器一个移位寄存器。

24. 发明授权

US5586309A Universal programming interface for clock generators operable in a parallel programming mode and a serial programming mode 失效
标题翻译：用于时钟发生器的通用编程接口，可在并行编程模式和串行编程模式下工作
公开(公告)号：US5586309A
公开(公告)日：1996-12-17
申请号：US341036
申请日：1994-11-15
申请人： Tao Lin
发明人： Tao Lin
IPC分类号： G04G3/02 , G06F1/08 , G09G5/18 , H03K5/13 , G06F1/02 , H02J1/00
CPC分类号： H03K5/13 , G04G3/02 , G06F1/08 , G09G5/18
摘要： A programmable frequency synthesizer includes a first memory (e.g., ROM) for storing a plurality of pre-programmed frequencies, a second memory (e.g., RAM) for storing at least one user input programmable frequency, and dual purpose frequency synthesizer inputs for providing command address information to select one of the pre-programmed frequencies from the first memory and for providing serial data representing a user input programmable frequency to be stored in the second memory. The frequency synthesizer further includes a control input and decoder for directing the address information and the user input programmable frequency data to the first or second memory, respectively.
摘要翻译：可编程频率合成器包括用于存储多个预编程频率的第一存储器（例如，ROM），用于存储至少一个用户输入可编程频率的第二存储器（例如，RAM）和用于提供命令的双用途频率合成器输入地址信息以从第一存储器中选择一个预先编程的频率，并提供表示要存储在第二存储器中的用户输入可编程频率的串行数据。频率合成器还包括用于分别将地址信息和用户输入可编程频率数据分配给第一或第二存储器的控制输入和解码器。

25. 发明授权

US09477543B2 Installation health dashboard 有权
标题翻译：安装健康仪表板
公开(公告)号：US09477543B2
公开(公告)日：2016-10-25
申请号：US14498301
申请日：2014-09-26
申请人： Miles Henley , Dolan Sum , Alfred Fung , Edward Lam , Tao Lin , Randy Uy , Ren Horikiri , Jeff Lavoie
发明人： Miles Henley , Dolan Sum , Alfred Fung , Edward Lam , Tao Lin , Randy Uy , Ren Horikiri , Jeff Lavoie
IPC分类号： G06F9/44 , G06F11/07 , G06F11/36 , G06F17/30 , G06F11/32
CPC分类号： G06F11/079 , G06F8/00 , G06F8/60 , G06F11/0721 , G06F11/0769 , G06F11/32 , G06F11/323 , G06F11/327 , G06F11/3476 , G06F11/366 , G06F17/30554
摘要： The disclosure generally describes computer-implemented methods, software, and systems for presenting error information. Logs are received from different locations, the logs associated with a plurality of builds at the different locations and associated with one or more systems. The logs are stored in a centralized location. Build information is generated for a given build, including identifying errors associated with the given build. Information for a current log associated with the given build is analyzed, including accessing information for previous logs associated with previous related builds related to the given build. Based on the analyzing, error diagnostic information that is to be presented is determined, including an analysis of errors that occurred in the given build and previous related builds. Instructions are provided, the instructions operable to present the error diagnostic information to a user, including providing log information, for presentation in a user interface.
摘要翻译：本公开一般地描述了用于呈现错误信息的计算机实现的方法，软件和系统。从不同位置接收日志，该日志与在不同位置处的多个构建相关联并且与一个或多个系统相关联。日志存储在集中的位置。为给定的构建生成构建信息，包括识别与给定构建相关联的错误。分析与给定构建相关联的当前日志的信息，包括访问与先前与给定构建相关的构建相关联的先前日志的信息。基于分析，确定要呈现的错误诊断信息，包括对给定构建中发生的错误的分析和先前的相关构建。提供了说明，该指令可操作以向用户呈现错误诊断信息，包括提供日志信息，以便在用户界面中呈现。

26. 发明授权

US09094264B2 Method and apparatus for dual stack access 有权
标题翻译：用于双栈访问的方法和装置
公开(公告)号：US09094264B2
公开(公告)日：2015-07-28
申请号：US12757261
申请日：2010-04-09
申请人： Tao Lin
发明人： Tao Lin
IPC分类号： G06F15/16 , H04L29/12 , H04L29/06 , H04L12/931
CPC分类号： H04L63/105 , H04L29/12216 , H04L29/12245 , H04L29/12915 , H04L29/12971 , H04L49/602 , H04L61/203 , H04L61/251 , H04L61/6059 , H04L61/6086 , H04L63/0263 , H04L63/10 , H04L63/20 , H04L69/18
摘要： The present invention discloses a method of dual stack access, wherein a network device authenticates the first protocol address of a requesting client, stores the user name, first protocol address, and address status information of the client in the user information table if the authentication succeeds, assigns a second protocol address to the client, stores this second protocol address and address status information in the user information table, generates control rules for the client according to its user information, and controls dual stack access of the client according to the rules. This invention provides effective authentication-based access control of dual stack users.
摘要翻译：本发明公开了一种双栈接入方法，其中网络设备认证请求客户端的第一协议地址，如果认证成功，则将客户端的用户名，第一协议地址和地址状态信息存储在用户信息表中向客户端分配第二协议地址，将该第二协议地址和地址状态信息存储在用户信息表中，根据用户信息生成客户端控制规则，根据规则控制客户端的双栈访问。本发明提供了双堆栈用户的有效的基于认证的访问控制。

27. 发明授权

US08768777B2 Tracking assets between organizations in a consortium of organizations 有权
标题翻译：跟踪组织机构之间的资产
公开(公告)号：US08768777B2
公开(公告)日：2014-07-01
申请号：US11214992
申请日：2005-08-31
申请人： Tao Lin
发明人： Tao Lin
IPC分类号： G06G1/14
CPC分类号： G06Q10/08 , G06Q10/087 , G06Q20/203
摘要： A system includes a network of auto-id nodes and a processor. Each auto-id node includes index data that defines a hierarchical relationship between the auto-id node and another auto-id node within the network, and the auto-id nodes include a storage for storing status and history data about one or more assets that have been read by the auto-id node. The processor is operable to extract data from the network of auto-id nodes by following index data within the auto-id nodes to query only selected auto-id nodes within the network, and the selected nodes are arranged in a hierarchical network defined by indices of the auto-id nodes.
摘要翻译：系统包括自动编号节点网络和处理器。每个自动身份节点包括索引数据，其定义自动ID节点和网络中的另一自动身份节点之间的分层关系，并且自动身份节点包括用于存储关于一个或多个资产的状态和历史数据的存储，已被auto-id节点读取。处理器可操作地通过跟踪自身ID节点内的索引数据从自动ID节点的网络中提取数据，以仅查询网络内所选择的自动身份节点，并将所选择的节点排列在由索引定义的分层网络中的自动ID节点。

28. 发明授权

US08759759B2 Linear ion trap analyzer 有权
标题翻译：线性离子阱分析仪
公开(公告)号：US08759759B2
公开(公告)日：2014-06-24
申请号：US13079740
申请日：2011-04-04
申请人： Li Ding , Tao Lin , Gongyu Jiang , Hui Mu
发明人： Li Ding , Tao Lin , Gongyu Jiang , Hui Mu
IPC分类号： H01J49/00
CPC分类号： H01J49/423
摘要： The present invention relates generally to the field of ion storage and analysis, in particular to a linear ion trap mass analyzer comprised by multiple columnar electrodes. High frequency voltages are applied on at least one of the columnar electrodes to form ion confining space, which mainly consists of two-dimensional quadrupole electric radial trapping field, and there is at least one through slot for ion ejection in at least one direction perpendicular to the axis of the ion trap, wherein an AC electric field superposition is applied to invoke dipole excitation. Opposite to the through slot, there is an elongated electrode for field adjusting between two columnar electrodes or inside the slit of one of the columnar electrodes mentioned above. The potential on the elongated electrode for field adjusting is set as the sum of a portion of the high frequency voltage which applied on one adjacent columnar electrode and a DC offset, which can be adjusted freely. Through adjusting the portion of the high frequency potential and DC potential on this electrode, one or more objectives, including field optimization inside the ion trap as well as ion motion characteristics of resonant ejection, can be realized.
摘要翻译：本发明一般涉及离子存储和分析领域，特别涉及由多个柱状电极组成的线性离子阱质量分析仪。在至少一个柱状电极上施加高频电压以形成主要由二维四极电子径向捕获场组成的离子限制空间，并且至少有一个通孔用于在至少一个垂直于离子阱的轴线，其中施加AC电场叠加以调用偶极子激发。与通孔相对，有一个用于在两个柱状电极之间进行现场调节的细长电极或者在上述一个柱状电极的狭缝内部。用于场调整的细长电极上的电位被设置为施加在一个相邻柱状电极上的高频电压的一部分和可以自由调节的DC偏移之和。通过调节该电极上的高频电位和直流电位的一部分，可以实现一个或多个目标，包括离子阱内的场优化以及共振喷射的离子运动特性。

29. 发明申请

US20130190420A1 NONTEMPERATURE SENSITIVE MEMORY FOAM OF MDI SYSTEM SUITABLE FOR HORIZONTAL FOAMING PROCESS 有权
标题翻译：适用于水平泡沫过程的MDI系统的非易失性记忆泡沫
公开(公告)号：US20130190420A1
公开(公告)日：2013-07-25
申请号：US13824031
申请日：2011-02-11
申请人： Zhanggen Ni , Tao Lin
发明人： Zhanggen Ni , Tao Lin
IPC分类号： C08G18/48
CPC分类号： C08G18/4812 , C08G18/1808 , C08G18/3203 , C08G18/4072 , C08G18/4825 , C08G18/4829 , C08G18/632 , C08G18/667 , C08G18/7664 , C08G2101/0016 , C08G2101/0083
摘要： A MDI system non-temperature sensitive memory sponge suitable for flat foam foaming process, is made by mainly using polyether polyol and polymer polyol as main material, then adding three additives isocyanate and foaming agent, the pore adjusting agent and catalyst. The polyether polyol is polyoxypropylene glycerol with molecular weight of 700, the polymer polyol is high activity grafting polyether, the isocyanate is modified polyphenyl methane diisocyanate, wherein a polyoxypropylene trihydroxy ether with the molecular weight of 4800 is added to the polyether polyol, polyol chain extender is added to said additives.
摘要翻译： MDI系统非温度敏感记忆海绵适用于平泡沫发泡工艺，主要以聚醚多元醇和聚合物多元醇为主要原料，然后加入三种添加剂异氰酸酯和发泡剂，孔隙调节剂和催化剂。聚醚多元醇为分子量为700的聚氧丙烯甘油，聚合物多元醇为高活性接枝聚醚，异氰酸酯为改性聚苯甲烷二异氰酸酯，其中分子量为4800的聚氧丙烯三羟基醚加入到聚醚多元醇中，多元醇增链剂添加到所述添加剂中。

30. 发明授权

US08417854B2 Generic device integration within an auto-id system 有权
标题翻译：自动识别系统中的通用设备集成
公开(公告)号：US08417854B2
公开(公告)日：2013-04-09
申请号：US11027691
申请日：2004-12-30
申请人： Jie Weng , Tao Lin , Brian S. Mo , Richard J. Swan , Rama Gurram
发明人： Jie Weng , Tao Lin , Brian S. Mo , Richard J. Swan , Rama Gurram
IPC分类号： G06F3/00 , G06F13/12 , G06F13/42 , H04L12/66
CPC分类号： G06Q30/00 , G06Q10/06 , G06Q10/08 , H04L67/12
摘要： Systems, methods and computer program products for generic device integration within an auto-id system. The system includes an auto-id node operable to collect data emitted by one or more automatic data acquisition devices, process the data, and make the data available to one or more enterprise applications, user interfaces, or other auto-id nodes. The auto-id node includes a device integration layer that is operable to handle communication between the auto-id node and different types of automatic data acquisition devices, device controllers, or device management systems.
摘要翻译：自动识别系统中通用设备集成的系统，方法和计算机程序产品。该系统包括一个自动识别节点，用于收集由一个或多个自动数据采集设备发出的数据，处理数据，并使数据可用于一个或多个企业应用，用户接口或其他自动身份节点。自动ID节点包括可操作以处理自动识别节点与不同类型的自动数据采集设备，设备控制器或设备管理系统之间的通信的设备集成层。

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