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21. 发明授权

US4661903A Digital data processing system incorporating apparatus for resolving names 失效
标题翻译：数字数据处理系统，包括解析名称的装置
公开(公告)号：US4661903A
公开(公告)日：1987-04-28
申请号：US647271
申请日：1984-09-04
申请人： Walter A. Wallach, Jr. , Michael S. Richmond , John K. Ahlstrom , David H. Bernstein , Richard G. Bratt
发明人： Walter A. Wallach, Jr. , Michael S. Richmond , John K. Ahlstrom , David H. Bernstein , Richard G. Bratt
IPC分类号： G06F9/318 , G06F9/35 , G06F9/44 , G06F13/00
CPC分类号： G06F9/30192 , G06F9/35 , G06F9/4428
摘要： Apparatus in a digital computer system for obtaining descriptors of data from names representing the data. The digital computer system executes sequences of instructions. Names representing data processed during execution of an instruction sequence are associated with the instruction sequence. Each name associated with the instruction sequence corresponds to a name table entry associated with the instruction sequence. The operation of resolving a name, i.e., obtaining the descriptor for the data represented by the name, is performed by name processing apparatus in processors of the data processing system. In response to a name, the name processing apparatus locates the name table entry corresponding to the name obtains the descriptor for the item represented by the name using the information in the name table entry corresponding to the name. In a present embodiment, the descriptor specifies the address and length of a data item. The information in the name table entry specifies the address of the represented item by specifying a base address and a displacement and further specifies the length and type of the represented item.
摘要翻译：数字计算机系统中的装置，用于从表示数据的名称获得数据的描述符。数字计算机系统执行指令序列。表示在执行指令序列期间处理的数据的名称与指令序列相关联。与指令序列相关联的每个名称对应于与指令序列相关联的名称表条目。通过名称处理装置在数据处理系统的处理器中执行解析名称的操作，即获得由名称表示的数据的描述符。响应于名称，名称处理设备找到与名称相对应的名称表项，使用与名称相对应的名称表项中的信息来获得由名称表示的项目的描述符。在本实施例中，描述符指定数据项的地址和长度。名称表项目中的信息通过指定基址和位移来指定所表示项目的地址，并进一步指定所表示项目的长度和类型。

22. 发明授权

US4939640A Data processing system having unique microinstruction control and stack means 失效
标题翻译：数据处理系统具有独特的微指令控制和堆栈手段
公开(公告)号：US4939640A
公开(公告)日：1990-07-03
申请号：US597195
申请日：1984-04-05
申请人： Brett L. Bachman , Richard A. Belgard , Richard G. Bratt , Thomas M. Jones
发明人： Brett L. Bachman , Richard A. Belgard , Richard G. Bratt , Thomas M. Jones
IPC分类号： G06F9/22
CPC分类号： G06F9/223
摘要： A data processing system which includes a memory and a processor comprising at least two execution units. The system further includes a microcode control unit for storing sequences of microinstructions and an execution microinstruction stack containing at least one stack frame containing the machine state of a first execution unit when the execution of a microinstruction has been interrupted. A memory microinstruction stack is provided to store a plurality of stack frames, stack frames being transferrable between the execution microinstruction stack and the memory microinstructiion stack. The microcode control unit contains sequences of monitor microinstructions and has associated with it a minotor microinstruction stack for storing the machine state of the first execution unit when the execution of a monitor microinstruction has been interrupted. A second execution unit for executing primarily arithmetic microinstructions includes an execution storage unit containing the current machine state of the second execution unit and an arithmetic stack which stores the machine state of the second execution unit when it has executed a previous arithmetic microinstruction. The memory includes a memory arithmetic stack containing further arithmetic stack frames, stack frames being transferrable between the execution storage unit and the memory arithmetic stack. Further an instruction stack is provided for storing the machine state in the processor when execution of a macroinstruction has been interrupted.
摘要翻译：一种包括存储器和包括至少两个执行单元的处理器的数据处理系统。所述系统还包括微代码控制单元，用于存储微指令序列和执行微指令栈，所述执行微指令栈包含至少一个堆栈帧，所述至少一个堆栈帧在微指令的执行已中断时包含第一执行单元的机器状态。提供存储器微指令堆栈以存储多个堆栈帧，堆栈帧可在可执行微指令栈和存储器微指令栈之间传送。微代码控制单元包含监视器微指令的序列，并且与监视器微指令相关联，当监视器微指令的执行已被中断时，用于存储第一执行单元的机器状态的微运动微指令堆栈。用于主要执行算术微指令的第二执行单元包括执行存储单元，其包含第二执行单元的当前机器状态，以及算术堆栈，当执行了先前的算术微指令时，存储第二执行单元的机器状态。存储器包括存储器运算堆栈，其包含进一步的算术堆栈帧，堆栈帧可在执行存储单元和存储器运算堆栈之间传输。此外，提供了用于在执行宏指令已被中断时将处理器状态存储在处理器中的指令堆栈。

23. 发明授权

US4618925A Digital data processing system capable of executing a plurality of internal language dialects 失效
标题翻译：能够执行多种内部语言方言的数字数据处理系统
公开(公告)号：US4618925A
公开(公告)日：1986-10-21
申请号：US630991
申请日：1984-07-13
申请人： Richard G. Bratt , Ronald H. Gruner , Thomas M. Jones , James T. Nealon
发明人： Richard G. Bratt , Ronald H. Gruner , Thomas M. Jones , James T. Nealon
IPC分类号： G06F9/45 , G06F9/16
CPC分类号： G06F8/47
摘要： The processor of the present invention can execute any of a plurality of dialects of "S-Language" instructions. S-Languages are of a higher order than typical machine languages but of a lower order than the user's own high order language. They can be tailored for compatibility with user high order languages. Each instruction of a particular S-Language is interpreted by a sequence of microinstructions. In the processor of the present invention, dispatching to the microinstruction sequencer is controlled jointly by the instruction bit pattern and the current contents of a dialect register. Each procedure to be executed carries with it information from which the appropriate contents of the dialect register may be determined. Thus, the processor of the present invention can always operate as an effective optimum processor for executing the procedure regardless of the source language chosen for writing that procedure.
摘要翻译：本发明的处理器可以执行“S语言”指令的多个方言中的任何一种。 S语言的排序比典型的机器语言高，但比用户自己的高级语言的顺序要低。它们可以根据用户高阶语言进行定制。特定S语言的每个指令由微指令序列解释。在本发明的处理器中，通过指令位模式和方言寄存器的当前内容共同地控制对微指令定序器的调度。要执行的每个过程携带有可以确定方言寄存器的适当内容的信息。因此，本发明的处理器可以始终作为用于执行该过程的有效的最佳处理器来操作，而不管选择用于写入该过程的源语言。

24. 发明授权

US4554626A Digital data processing system 失效
标题翻译：数字数据处理系统
公开(公告)号：US4554626A
公开(公告)日：1985-11-19
申请号：US642732
申请日：1984-08-20
申请人： Lawrence H. Katz , Douglas M. Wells , Richard G. Bratt
发明人： Lawrence H. Katz , Douglas M. Wells , Richard G. Bratt
IPC分类号： G06F9/46 , G06F9/48
CPC分类号： G06F9/4843 , G06F9/54
摘要： A digital data processing system using process synchronization techniques which comprise processing await logic for suspending the execution of a program controlled by a process, virtual processor await logic for performing an await operation at the virtual processor level and for temporarily inhibiting the loading of state items for the execution of the program, virtual processor advance logic for performing an advance operation at the virtual processor level to cease the inhibition of the loading of such state items, and process advance logic for causing the processor of the system to resume execution of the suspended program which is under control of the process.
摘要翻译：一种使用过程同步技术的数字数据处理系统，其包括处理等待用于暂停由进程控制的程序的执行的逻辑，虚拟处理器等待用于在虚拟处理器级执行等待操作的逻辑，并且暂时禁止用于程序的执行，用于在虚拟处理器级别执行提前操作的虚拟处理器提前逻辑，以停止对这种状态项的加载的禁止，以及处理提前逻辑，以使系统的处理器恢复执行暂停的程序这是在过程的控制之下。

25. 发明授权

US4633406A Digital data processing system method for making a general call 失效
标题翻译：用于进行一般呼叫的数字数据处理系统方法
公开(公告)号：US4633406A
公开(公告)日：1986-12-30
申请号：US642731
申请日：1984-08-20
申请人： Lawrence H. Katz , Douglas M. Wells , Richard G. Bratt
发明人： Lawrence H. Katz , Douglas M. Wells , Richard G. Bratt
IPC分类号： A44C5/20 , G06F9/44
CPC分类号： A44C5/20
摘要： A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanism and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration. Information is identified to bit granular level and to information type and format. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.
摘要翻译：具有灵活的内部结构的数据处理系统，具有多层次的控制和堆栈机制以及执行多个并发操作的能力，并为用户提供灵活，简化的界面，保护用户和用户不可见。该系统内部由多个独立的独立处理器组成，每个独立的处理器具有单独的微指令控制和至少一个独立于中央通信和存储器节点的独立端口。通信和存储器节点是具有独立且独立的微指令控制的独立处理器，并且包括能够执行多个并发存储器和通信操作的多个独立操作的微指令控制的处理器。寻址机制允许永久，唯一的信息识别和所有这些系统可访问和共同的极大的地址空间。地址与系统物理配置无关。信息被识别为细粒度级别和信息类型和格式。保护机制提供与个体信息相关联的可变访问权限。用户语言指令被转换为方言编码的，统一的中间级指令，以便为所有用户语言提供相同的执行功能。操作数由统一格式名称引用，通过对用户透明的内部机制转换为地址。

26. 发明授权

US4455603A System for resolving pointers in a digital data processing system 失效
标题翻译：用于解析数字数据处理系统中的指针的系统
公开(公告)号：US4455603A
公开(公告)日：1984-06-19
申请号：US266416
申请日：1981-05-22
申请人： Richard G. Bratt , Lawrence H. Katz , Douglas M. Wells
发明人： Richard G. Bratt , Lawrence H. Katz , Douglas M. Wells
IPC分类号： G06F9/44 , G06F9/22
CPC分类号： G06F9/4428
摘要： Systems and method for resolving unresolved pointers in digital computer systems. In unresolved pointers, addresses are represented by means of data items from which the addresses may be derived. The unresolved pointer is resolved when the represented address is derived from the data items. One such system includes the unresolved pointers and procedures for resolving the unresolved pointers in the digital computer system's memory and apparatus in the digital computer system's process which operates under control of pointer translation microcode to translate pointers into represented addreses and under control of call-return microcode for invoking procedures from microcode. The pointer translation microcode responds to an unresolved pointer by causing the call-return microcode to invoke the procedures for resolving the unresolved pointer. Using the data items in the unresolved pointer, the procedures derive the represented address and return it to the pointer translation microcode. Another such system includes an associated address table which associates an unresolved pointer with its represented address and associated pointer fault procedures. Here, the pointer translation microcode responds to the unresolved pointer by searching the table for an entry containing the unresolved pointer. If there is such an entry, the pointer translation microcode obtains the represented address from the table. If there is not, the pointer translation microcode causes the call-return microcode to invoke the associated pointer fault procedures, which resolve the unresolved pointer and place the represented address in the associated address table. A third such system combines the first two systems. Details of the systems and methods of resolving unresolved pointers are also disclosed.
摘要翻译：用于解决数字计算机系统中未解决的指针的系统和方法。在未解决的指针中，地址通过可以从其导出地址的数据项来表示。当表示的地址从数据项导出时，未解决的指针被解析。一个这样的系统包括用于解决数字计算机系统的存储器中的未解决的指针的未解决的指针和过程，以及在指针转换微代码的控制下操作的数字计算机系统的过程中的设备，以将指针转换成所表示的地址并且在调用返回微代码的控制下用于从微代码调用过程。指针转换微代码通过使调用返回微代码调用解决未解析指针的过程来响应未解决的指针。使用未解决的指针中的数据项，程序导出表示的地址并将其返回到指针转换微码。另一个这样的系统包括相关联的地址表，其将未解决的指针与其表示的地址和相关联的指针故障过程相关联。这里，指针转换微代码通过在表中搜索包含未解决的指针的条目来响应未解决的指针。如果有这样的条目，则指针转换微代码从表中获得表示的地址。如果没有，则指针转换微码导致调用返回微代码调用相关联的指针故障过程，其解决未解决的指针并将所表示的地址放置在相关联的地址表中。第三个这样的系统结合了前两个系统。还公开了解决未解决的指针的系统和方法的细节。

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