专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US07999394B2 Void reduction in indium thermal interface material 有权
标题翻译：铟热界面材料的空隙减少
公开(公告)号：US07999394B2
公开(公告)日：2011-08-16
申请号：US12638112
申请日：2009-12-15
申请人： Seah Sun Too , Hsiang Wan Liau , Janet Kirkland , Tek Seng Tan , Maxat Touzelbaev , Raj N. Master
发明人： Seah Sun Too , Hsiang Wan Liau , Janet Kirkland , Tek Seng Tan , Maxat Touzelbaev , Raj N. Master
IPC分类号： H01L23/48 , H01L23/12
CPC分类号： H01L23/42 , H01L23/367 , H01L23/3736 , H01L23/4338 , H01L2224/16 , H01L2224/73253 , H01L2924/01079 , H01L2924/16152 , H01L2924/3511
摘要： Thermal interface materials and method of using the same in packaging are provided. In one aspect, a thermal interface material is provided that includes an indium preform that has a first surface and a second surface opposite to the first surface, an interior portion and a peripheral boundary. The indium preform has a channel extending from the peripheral boundary towards the interior portion. The channel enables flux to liberate during thermal cycling.
摘要翻译：提供热界面材料及其在包装中的使用方法。在一个方面，提供一种热界面材料，其包括具有第一表面和与第一表面相对的第二表面的铟预制件，内部部分和外围边界。铟预制件具有从周边边界向内部延伸的通道。该通道使热通量在热循环期间释放。

22. 发明申请

US20100117222A1 Void Reduction in Indium Thermal Interface Material 有权
标题翻译：铟热界面材料的空隙减少
公开(公告)号：US20100117222A1
公开(公告)日：2010-05-13
申请号：US12638112
申请日：2009-12-15
申请人： Seah Sun Too , Hsiang Wan Liau , Janet Kirkland , Tek Seng Tan , Maxat Touzelbaev , Raj N. Master
发明人： Seah Sun Too , Hsiang Wan Liau , Janet Kirkland , Tek Seng Tan , Maxat Touzelbaev , Raj N. Master
IPC分类号： H01L23/34 , H01L21/50 , H01L23/373 , H01L23/40
CPC分类号： H01L23/42 , H01L23/367 , H01L23/3736 , H01L23/4338 , H01L2224/16 , H01L2224/73253 , H01L2924/01079 , H01L2924/16152 , H01L2924/3511
摘要： Thermal interface materials and method of using the same in packaging are provided. In one aspect, a thermal interface material is provided that includes an indium preform that has a first surface and a second surface opposite to the first surface, an interior portion and a peripheral boundary. The indium preform has a channel extending from the peripheral boundary towards the interior portion. The channel enables flux to liberate during thermal cycling.
摘要翻译：提供热界面材料及其在包装中的使用方法。在一个方面，提供一种热界面材料，其包括具有第一表面和与第一表面相对的第二表面的铟预制件，内部部分和外围边界。铟预制件具有从周边边界向内部延伸的通道。该通道使热通量在热循环期间释放。

23. 发明授权

US06709963B1 Method and apparatus for jet printing a flux pattern selectively on flip-chip bumps 失效
标题翻译：用于在倒装芯片凸块上选择性地喷射印刷通量图案的方法和装置
公开(公告)号：US06709963B1
公开(公告)日：2004-03-23
申请号：US09617104
申请日：2000-07-14
申请人： Jonathan D. Halderman , Raj N. Master
发明人： Jonathan D. Halderman , Raj N. Master
IPC分类号： H01L2144
CPC分类号： H01L24/11 , H01L24/10 , H01L24/13 , H01L2224/13 , H01L2224/13099 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01039 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/30107 , H05K3/3436 , H05K3/3489 , H01L2924/00 , H01L2224/0401
摘要： A method and an apparatus are provided for selectively depositing flux on a plurality of flip-chip bumps arranged on a semiconductor chip by jet printing a flux pattern, which is substantially identical to the arrangement pattern of the flip-chip bumps. The flux pattern is determined by measuring the chip configuration and converting the configuration to computer-recognizable data. The converted chip configuration is stored in data storage, and a jet printing head prints the flux pattern based on the computer-recognizable data. A conveyance plate is provided to transport the semiconductor chip to a flux-deposition area below the jet printing head.
摘要翻译：提供了一种方法和装置，用于通过喷射打印基本上与倒装芯片凸块的布置图案相同的磁通图案，在布置在半导体芯片上的多个倒装芯片凸块上选择性地沉积磁通。通过测量芯片配置并将配置转换为计算机可识别的数据来确定通量模式。转换的芯片配置存储在数据存储器中，并且喷墨打印头基于计算机可识别的数据打印通量图案。提供传送板以将半导体芯片传送到喷墨打印头下方的助熔剂区域。

24. 发明授权

US06591992B1 Boat for cleaning ball grid array packages 有权
公开(公告)号：US06591992B1
公开(公告)日：2003-07-15
申请号：US10227382
申请日：2002-08-26
申请人： Ajit M. Dubey , Raj N. Master , Ong Ot , Chan Cs
发明人： Ajit M. Dubey , Raj N. Master , Ong Ot , Chan Cs
IPC分类号： A47F700
CPC分类号： H01L21/67333 , H01L21/67028 , H01L2221/68313
摘要： A boat for cleaning semiconductor packages, including cleaning ball grid array packages in centrifugal cleaners. The boat includes a bottom plate with receptacles for receiving semiconductor packages and a top plate having through holes, where each through hole is smaller than the receptacle with which it corresponds in the bottom plate. An alignment mechanism ensures that the top plate is aligned with the bottom plate in a manner that results in each through hole being positioned directly over a respective one of the receptacles. An attachment mechanism releasably attaches the top plate to the bottom plate in a co-planar relationship that results in the presence of a vertical space between the two plates.

25. 发明授权

US06536649B1 Method of preventing residue contamination of semiconductor devices during furnace processing 失效
标题翻译：防止炉加工过程中半导体器件残留污染的方法
公开(公告)号：US06536649B1
公开(公告)日：2003-03-25
申请号：US09627437
申请日：2000-07-28
申请人： Raj N. Master , Jonathan D. Halderman
发明人： Raj N. Master , Jonathan D. Halderman
IPC分类号： B23R3704
CPC分类号： H01L21/67253
摘要： Residue contaminates semiconductor devices during processing in a furnace. Residue contamination is prevented by removing the residue before it builds up to a point where it can contaminate semiconductor devices. Residue build-up is monitored using a residue build-up monitoring device mounted on the furnace exhaust stack. When residue build-up reaches a predetermined level a signal is generated by the residue build-up monitoring device notifying technicians that furnace cleaning is required.
摘要翻译：残渣在炉中加工期间污染半导体器件。通过在残留物积聚到可能污染半导体器件的点之前去除残留物来防止残留污染。使用安装在炉排气堆上的残渣积聚监测装置来监测残留物积聚。当残渣累积达到预定水平时，残留物积聚监测装置产生信号，通知技术人员需要进行炉清洗。

26. 发明授权

US06409070B1 Minimizing flux residue by controlling amount of moisture during reflow 有权
标题翻译：通过控制回流期间的水分量来最大限度地减少助焊剂残留量
公开(公告)号：US06409070B1
公开(公告)日：2002-06-25
申请号：US09663939
申请日：2000-09-18
申请人： Raj N. Master , Mohammad Z. Khan , Maria G. Guardado , Diong Hing Ding , Junaida Abu Bakar
发明人： Raj N. Master , Mohammad Z. Khan , Maria G. Guardado , Diong Hing Ding , Junaida Abu Bakar
IPC分类号： B23K3102
CPC分类号： B23K1/203 , B23K2101/40 , H01L2224/16225 , H01L2224/73204 , H05K3/3436 , H05K3/3489
摘要： A method of manufacturing a flip-chip semiconductor device by attaching a semiconductor die to a substrate using solder comprises the steps of applying a no-clean flux to the semiconductor die and the substrate; heating the solder and the flux in a furnace to bond the semiconductor die to the substrate; and underfilling between the semiconductor die and the substrate. While the solder and flux is being heated, a reducing atmosphere in the furnace is being measured to determine the moisture content. When the moisture content exceeds a threshold amount, a signal will be provided. A reflow furnace for practicing the method is also disclosed.
摘要翻译：通过使用焊料将半导体管芯附着到衬底来制造倒装芯片半导体器件的方法包括以下步骤：向半导体管芯和衬底施加免清洗助焊剂; 在炉中加热焊料和焊剂以将半导体管芯粘合到衬底上; 并且在半导体管芯和衬底之间的底部填充。当焊料和焊剂被加热时，测量炉中的还原气氛以确定含水量。当水分含量超过阈值时，将提供信号。还公开了用于实施该方法的回流炉。

27. 发明授权

US06371310B1 Boat for land grid array packages 失效
标题翻译：船用地电网阵列包
公开(公告)号：US06371310B1
公开(公告)日：2002-04-16
申请号：US09740838
申请日：2000-12-21
申请人： Raj N. Master , Mohammad Z. Khan , L. K. Teoh
发明人： Raj N. Master , Mohammad Z. Khan , L. K. Teoh
IPC分类号： A47F700
CPC分类号： H01L21/67333
摘要： A boat is formed with layers comprising substantially aligned holes for safely accommodating land grid array semiconductor packages during assembly. The boat includes a bottom layer with an array of through-holes having a substantially square cross-sectional shape with rounded corners, a middle layer with an array of through-holes having a substantially octagonal cross-sectional shape and a top layer having an array of through-holes having a substantially square cross-sectional shape with notched sides and vertical tabs extending upwardly from the sidewalls of each notched side. The layers may be attached by spot welding or other means.
摘要翻译：船形成有包括基本上对准的孔的层，用于在组装期间安全地容纳平台阵列半导体封装。船包括具有基本上具有圆角的基本正方形横截面形状的通孔阵列的底层，具有基本上八边形横截面形状的通孔阵列的中间层和具有阵列的顶层的通孔具有基本正方形的横截面形状，具有切口侧面和从每个缺口侧的侧壁向上延伸的垂直突出部。这些层可以通过点焊或其他方式附着。

28. 发明授权

US06258612B1 Determination of flux prior to package assembly 有权
标题翻译：包装组装之前的通量测定
公开(公告)号：US06258612B1
公开(公告)日：2001-07-10
申请号：US09642832
申请日：2000-08-22
申请人： Raj N. Master , Jonathan D. Halderman
发明人： Raj N. Master , Jonathan D. Halderman
IPC分类号： H01L2166
CPC分类号： H01L22/20 , H01L24/81 , H01L2224/13111 , H01L2224/81801 , H01L2924/01006 , H01L2924/01012 , H01L2924/01033 , H01L2924/01049 , H01L2924/0105 , H01L2924/01075 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , Y10S33/04 , H01L2924/00
摘要： A package assembly is formed by applying flux to a device and/or a substrate and inspecting the applied flux to determine whether the amount applied is within a predetermined range. Embodiments include applying a rosin based flux on a laminate substrate and measuring the thickness of the applied flux with an interferometer.
摘要翻译：通过将助焊剂施加到装置和/或基底并检查所施加的通量以确定所施加的量是否在预定范围内来形成包装组件。实施方案包括在层压基板上施加松香基焊剂并用干涉仪测量施加的焊剂的厚度。

29. 发明授权

US5605277A Hot vacuum device removal process and apparatus 失效
标题翻译：热真空装置拆除工艺及装置
公开(公告)号：US5605277A
公开(公告)日：1997-02-25
申请号：US360100
申请日：1994-12-20
申请人： Raymond A. Jackson , Kathleen A. Lidestri , William E. Sablinski , David C. Linnell , Raj N. Master
发明人： Raymond A. Jackson , Kathleen A. Lidestri , William E. Sablinski , David C. Linnell , Raj N. Master
IPC分类号： B23K1/018
CPC分类号： B23K1/018 , B23K2201/40
摘要： A cost efficient, highly reliable method to remove electronic devices and components from substrates eliminates separate tooling for every substrate and device or component size. The apparatus which implements the method allows for multiple device or component removal simultaneously, or in a single sequential operation, in a nondestructive action in a very low cost environment. A box oven and vacuum system and is used with different device or component and substrate sizes providing a simple, low cost, molten device removal procedure, eliminating the need for thermal monitor build and associated profiling for each product. The apparatus works independently of chip type or size, utilizing universal fixturing, and can be set up to pull multiple devices and/or components in a single run.
摘要翻译：从基板上去除电子设备和组件的成本效益高，可靠的方法消除了每个基板和设备或部件尺寸的单独的工具。实现该方法的装置允许在非常低成本的环境中的非破坏性动作中同时进行多个装置或部件移除，或者在单个顺序操作中。箱式烘箱和真空系统，并且使用不同的装置或部件和基板尺寸，提供简单，低成本的熔融装置移除程序，消除了对每个产品的热监测器构建和相关的分析的需要。该设备独立于芯片类型或尺寸，利用通用的固定方式工作，并可设置为在单次运行中拉出多个设备和/或组件。

30. 发明授权

US5167913A Method of forming an adherent layer of metallurgy on a ceramic substrate 失效
标题翻译：在陶瓷基板上形成冶金粘附层的方法
公开(公告)号：US5167913A
公开(公告)日：1992-12-01
申请号：US813244
申请日：1991-12-23
申请人： John Acocella , Philip L. Flaitz , Raj N. Master , Chandrasekhar Narayan , Sarah H. Knickerbocker , Paul H. Palmateer , Sampath Purushothaman , Srinivasa S. N. Reddy
发明人： John Acocella , Philip L. Flaitz , Raj N. Master , Chandrasekhar Narayan , Sarah H. Knickerbocker , Paul H. Palmateer , Sampath Purushothaman , Srinivasa S. N. Reddy
IPC分类号： H01L21/48 , H05K1/09 , H05K3/12 , H05K3/18 , H05K3/38 , H05K3/46
CPC分类号： H05K3/1291 , H01L21/4846 , H01L21/486 , H05K1/092 , H05K2203/1126 , H05K3/4629 , Y10T428/12528 , Y10T428/12611
摘要： A method of forming an adherent layer of metallurgy on a ceramic substrate which includes the steps of obtaining a ceramic material containing a polymeric binder and copper metallurgy patterns within the ceramic body. In one embodiment of the invention, the ceramic body also contains MgO.Thereafter, a surface layer of metallurgy is formed on the surface of the ceramic body. In one embodiment, the surface layer is nickel and in another embodiment, the surface layer is copper or gold.Then, the ceramic body undergoes a sintering cycle which includes the steps of pyrolysis, binder burnoff and, lastly, densification and, in some cases, crystallization. During densification and crystallization, there is a predetermined steam atmosphere which meets the following requirements: a partial pressure of oxygen less than that necessary to satisfy the equilibrium equation 4Cu+O.sub.2 =2Cu.sub.2 O; and a partial pressure of oxygen less than or equal to that necessary to satisfy the equilibrium equation 2Ni+O.sub.2 =2NiO for nickel in said surface metallurgy.
摘要翻译：一种在陶瓷基板上形成冶金粘附层的方法，包括以下步骤：在陶瓷体内获得含有聚合物粘合剂和铜冶金图案的陶瓷材料。在本发明的一个实施例中，陶瓷体还含有MgO。此后，在陶瓷体的表面上形成表面冶金层。在一个实施方案中，表面层是镍，在另一个实施方案中，表面层是铜或金。然后，陶瓷体经历烧结循环，其包括热解，粘合剂燃烧的步骤，最后是致密化，在某些情况下，结晶。在致密化和结晶过程中，有一个预定的蒸气气氛满足以下要求：氧气分压小于满足平衡方程式4Cu + O2 = 2Cu2O所需的氧分压; 以及小于或等于满足所述表面冶金中镍的平衡方程式2Ni + O2 = 2NiO所需的氧分压。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式