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21. 发明申请

US20190386057A1 SMALL PIXELS HAVING DUAL CONVERSION GAIN PROVIDING HIGH DYNAMIC RANGE 审中-公开
公开(公告)号：US20190386057A1
公开(公告)日：2019-12-19
申请号：US16008434
申请日：2018-06-14
申请人： OmniVision Technologies, Inc.
发明人： Rui Wang , Zheng Yang , Hiroaki Ebihara , Tiejun Dai
IPC分类号： H01L27/146
摘要： A group of shared pixels comprises: a first shared pixel comprising a first photodiode and a first transfer gate; a second shared pixel comprising a second photodiode and a second transfer gate; a third shared pixel comprising a third photodiode and a third transfer gate; a fourth shared pixel comprising a fourth photodiode and a first transfer gate; a first floating diffusion shared by the first shared pixel and the second shared pixel; a second floating diffusion shared by the third shared pixel and the fourth shared pixel; a capacitor coupled to the first floating diffusion through a first dual conversion gain transistor, and the second floating diffusion through a second dual conversion gain transistor; wherein the capacitor is formed in an area covering most of the first shared pixel, the second shared pixel, the third shared pixel, and the fourth shared pixel.

22. 发明授权

US10498993B1 Ramp signal settling reduction circuitry 有权
公开(公告)号：US10498993B1
公开(公告)日：2019-12-03
申请号：US16287848
申请日：2019-02-27
申请人： OmniVision Technologies, Inc.
发明人： Hiroaki Ebihara , Rui Wang , Liang Zuo
IPC分类号： H04N5/3745 , H03M1/56 , H04N5/353 , H04N5/378
CPC分类号： H04N5/37455 , H03M1/56 , H04N5/353 , H04N5/378
摘要： Comparison circuitry includes a comparator having a first input configured to receive a pixel signal. A switch is coupled to a second input of the comparator, a reference generator, and a ramp generator. A first capacitance is coupled to the switch. The switch is configured to couple the first capacitance to the reference generator to charge the first capacitance to a reference voltage from the reference generator prior to a ramp event in a ramp signal, and to couple the first capacitance to the ramp signal from the ramp generator at an onset of the ramp event in the ramp signal. The first capacitance is coupled to provide positive current injection into the ramp signal at the onset of the ramp event in the ramp signal to reduce a ramp settling time in the ramp signal, which is provided to the second input of the comparator.

23. 发明申请

US20190246057A1 IMAGE SENSOR WITH DUAL CONVERSION GAIN READOUT 有权
公开(公告)号：US20190246057A1
公开(公告)日：2019-08-08
申请号：US15890762
申请日：2018-02-07
申请人： OmniVision Technologies, Inc.
发明人： Hiroaki Ebihara , Rui Wang , Yandong Chen , Eiichi Funatsu
IPC分类号： H04N5/3745 , H04N5/378 , H01L27/146 , H04N5/355 , H04N5/235 , H04N5/357
CPC分类号： H04N5/37455 , H01L27/14605 , H01L27/14609 , H01L27/14643 , H04N5/2355 , H04N5/3559 , H04N5/3575 , H04N5/37452 , H04N5/378
摘要： A method includes reading a first analog reference signal from a first storage node in a dual conversion gain pixel, and converting the first analog reference signal to a first digital reference signal using a comparator coupled to the dual conversion gain pixel. The method also includes reading a first analog image signal from the first storage node, and converting the first analog image signal to a first digital image signal using the comparator. A second analog image signal may be read from the first storage node and a second storage node in the dual conversion gain pixel, and the second analog image signal may be converted to a second digital image signal. A second analog reference signal may be read from the first storage node and the second storage node, and the second analog reference signal may be converted to a second digital reference signal using the comparator.

24. 发明授权

US10356351B1 Image sensor with dual conversion gain readout 有权
公开(公告)号：US10356351B1
公开(公告)日：2019-07-16
申请号：US15890762
申请日：2018-02-07
申请人： OmniVision Technologies, Inc.
发明人： Hiroaki Ebihara , Rui Wang , Yandong Chen , Eiichi Funatsu
IPC分类号： H04N5/335 , H04N5/3745 , H04N5/378 , H01L27/146 , H04N5/355 , H04N5/235 , H04N5/357
CPC分类号： H04N5/37455 , H01L27/14605 , H01L27/14609 , H01L27/14643 , H04N5/2355 , H04N5/3559 , H04N5/3575 , H04N5/37452 , H04N5/378
摘要： A method includes reading a first analog reference signal from a first storage node in a dual conversion gain pixel, and converting the first analog reference signal to a first digital reference signal using a comparator coupled to the dual conversion gain pixel. The method also includes reading a first analog image signal from the first storage node, and converting the first analog image signal to a first digital image signal using the comparator. A second analog image signal may be read from the first storage node and a second storage node in the dual conversion gain pixel, and the second analog image signal may be converted to a second digital image signal. A second analog reference signal may be read from the first storage node and the second storage node, and the second analog reference signal may be converted to a second digital reference signal using the comparator.

25. 发明授权

US09961279B1 Blooming free high dynamic range image sensor read out architecture using in-frame multi-bit exposure control 有权
公开(公告)号：US09961279B1
公开(公告)日：2018-05-01
申请号：US15384872
申请日：2016-12-20
申请人： OMNIVISION TECHNOLOGIES, INC.
发明人： Rui Wang , Tiejun Dai
IPC分类号： H04N5/355 , H04N5/374 , H04N5/378 , H04N5/235 , H04N5/359 , H04N5/376 , H01L27/146
CPC分类号： H01L27/14643 , H01L27/1461 , H01L27/14612 , H04N5/2353 , H04N5/3594 , H04N5/374 , H04N5/376
摘要： A pixel circuit includes a transfer transistor coupled between a photodiode and a floating diffusion to selectively transfer image charge accumulated in the photodiode to the floating diffusion. A selection circuit is coupled to select one of a first transfer control signal, a second transfer control signal, or a third transfer control signal to control the transfer transistor. The selection circuit is coupled to output the first transfer control signal in response to a precharge enable signal during a read out operation of a different row than a row in which the transfer transistor is included, to output the second transfer control signal in response to a sample enable signal during a read out operation of the row in which the transfer transistor is included, and output the third transfer control signal to partially turn on the transfer transistor during an idle state of the pixel circuit.

26. 发明授权

US09819930B2 Time of flight imaging with improved initiation signaling 有权
公开(公告)号：US09819930B2
公开(公告)日：2017-11-14
申请号：US14721424
申请日：2015-05-26
申请人： OMNIVISION TECHNOLOGIES, INC.
发明人： Tianjia Sun , Rui Wang , Tiejun Dai
IPC分类号： H04N13/02 , H04N5/374 , G01S7/486 , G01S17/89 , G01S7/481 , G01S7/497 , H01L27/146 , H04N13/00
CPC分类号： H04N13/254 , G01S7/4816 , G01S7/4863 , G01S7/4865 , G01S7/497 , G01S17/89 , H01L27/14609 , H01L27/14627 , H01L27/14634 , H04N5/374 , H04N13/211 , H04N2013/0081
摘要： A time of flight sensor includes control circuitry and a time of flight pixel array. The control circuitry is coupled to synchronously send a sync signal. The time of flight pixel array includes a plurality of time of flight pixel cells. Each one of the time of flight pixel cells includes a photosensor and a delay circuit. The photosensor is configured to generate an image signal in response to receiving photons from a light pulse reflected from an object. The delay circuit is coupled to generate a delayed sync signal in response to the sync signal. The delay circuit includes a delay transistor. The time of flight pixel array includes a transistor gradient where a transistor gate length of the delay transistor varies so that each of the time of flight pixel cells receive their respective delayed sync signal at a same time.

27. 发明授权

US09819890B2 Readout circuitry to mitigate column fixed pattern noise of an image sensor 有权
公开(公告)号：US09819890B2
公开(公告)日：2017-11-14
申请号：US14828404
申请日：2015-08-17
申请人： OMNIVISION TECHNOLOGIES, INC.
发明人： Rui Wang , Le Huang , Tianjia Sun , Tiejun Dai
IPC分类号： H04N5/378 , H04N5/365
CPC分类号： H04N5/378 , H04N5/365
摘要： Techniques and mechanisms to mitigate fixed pattern noise in image sensor data. In an embodiment, readout circuitry includes an adaptive analog-to-digital converter (ADC) comprising a differential amplifier and a feedback path coupled across the differential amplifier, where the ADC is to receive a ramp signal, a control signal associated with a transition rate of the ramp signal, and an analog signal generated by one or more pixels. In another embodiment, the feedback path and/or one or more other circuit elements coupled to the differential amplifier are configured, based on the control signal, to provide one of multiple loop gains with the differential amplifier. The ADC provides a digital output to determine a comparison based on the ramp signal and the analog signal.

28. 发明申请

US20160061941A1 CALIBRATION CIRCUITRY AND METHOD FOR A TIME OF FLIGHT IMAGING SYSTEM 有权
标题翻译：用于飞行成像系统时间的校准电路和方法
公开(公告)号：US20160061941A1
公开(公告)日：2016-03-03
申请号：US14473803
申请日：2014-08-29
申请人： OMNIVISION TECHNOLOGIES, INC.
发明人： Jian Guo , Rui Wang , Tiejun Dai
IPC分类号： G01S7/497 , G01S17/08 , G01S7/487
CPC分类号： G01S7/497 , G01S7/483 , G01S17/89 , G06F3/017
摘要： A time of flight imaging system includes a light source coupled to emit light pulses to an object in response a light source modulation signal generated in response to a reference modulation signal. Each pixel cell of a time of flight pixel cell array is coupled to sense light pulses reflected from the object in response a pixel modulation signal. A programmable pixel delay line circuit is coupled to generate the pixel modulation signal with a variable pixel delay programmed in response to a pixel programming signal. A control circuit is coupled to receive pixel information from the time of flight pixel array representative of the sensed reflected light pulses. The control circuit is coupled to vary the pixel programming signal during a calibration mode to synchronize the light pulses emitted from the light source with the pulses of the pixel modulation signal.
摘要翻译：飞行时间成像系统包括耦合以响应于参考调制信号而产生的光源调制信号而向对象发射光脉冲的光源。飞行时间像素单元阵列的每个像素单元耦合以响应于像素调制信号来感测从物体反射的光脉冲。耦合可编程像素延迟线电路以响应于像素编程信号编程的可变像素延迟来产生像素调制信号。控制电路被耦合以从代表所感测的反射光脉冲的飞行时间像素阵列接收像素信息。控制电路被耦合以在校准模式期间改变像素编程信号，以使从光源发射的光脉冲与像素调制信号的脉冲同步。

29. 发明申请

US20150288902A1 FEED-FORWARD TECHNIQUE FOR POWER SUPPLY REJECTION RATIO IMPROVEMENT OF BIT LINE 有权
标题翻译：用于电源抑制比例改进的前馈技术
公开(公告)号：US20150288902A1
公开(公告)日：2015-10-08
申请号：US14247855
申请日：2014-04-08
申请人： OMNIVISION TECHNOLOGIES, INC.
发明人： Tianjia Sun , Rui Wang , Liping Deng , Tiejun Dai
IPC分类号： H04N5/369 , H04N5/357
CPC分类号： H04N5/3698 , H04N5/357 , H04N5/378
摘要： An image sensor read out circuit includes a first current mirror circuit in which a second current conducted through a second current path is controlled in response to a first current conducted through the first current path. The second current is conducted through an amplifier transistor of a pixel circuit. A first current source coupled to the first current path to provide a substantially constant current component of the first current. A second current source coupled to a power supply rail of the pixel circuit and coupled to the first current path to provide a ripple current component of the first current. The ripple current component provided by the second current source is responsive to a ripple in the power supply rail. The first current is responsive to a sum of the currents from the first and second current sources.
摘要翻译：图像传感器读出电路包括第一电流镜电路，其中响应于通过第一电流路径传导的第一电流来控制通过第二电流路径传导的第二电流。第二电流通过像素电路的放大器晶体管导通。耦合到第一电流路径以提供第一电流的基本上恒定的电流分量的第一电流源。耦合到所述像素电路的电源轨并耦合到所述第一电流路径以提供所述第一电流的纹波电流分量的第二电流源。由第二电流源提供的纹波电流分量响应于电源轨道中的纹波。第一电流响应于来自第一和第二电流源的电流的总和。

30. 发明公开

US20240334085A1 PHASE DETECTION AUTO FOCUS WITH HORIZONTAL/VERTICAL QUAD PHASE DETECTION 审中-公开
公开(公告)号：US20240334085A1
公开(公告)日：2024-10-03
申请号：US18295207
申请日：2023-04-03
申请人： OMNIVISION TECHNOLOGIES, INC.
发明人： Rui Wang , Chengcheng Xu , Lihang Fan , Eiichi Funatsu
IPC分类号： H04N25/704 , G02B5/20 , H04N25/13 , H04N25/44 , H04N25/78
CPC分类号： H04N25/704 , G02B5/201 , H04N25/134 , H04N25/44 , H04N25/78
摘要： An imaging device includes a pixel array with 2×2 pixel circuits arranged in rows and columns. Each 2×2 pixel circuit includes 4 photodiodes. Bitlines are coupled to the 2×2 pixel circuits and a color filter array is disposed over photodiodes of the pixel array. The color filter array includes color filters having a first color, color filters having a second color, color filters having a third color. The photodiodes of each 2×2 pixel circuits are covered by one of the color filters. Photodiodes covered by color filters having the first color and photodiodes covered by color filters having the second color are configured to provide non-phase detection (non-PD) information. Photodiodes covered by color filters having the third color are configured to provide phase detection (PD) information. Half of the 2×2 pixel circuits have the photodiodes covered by color filters having the third color.

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