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21. 发明授权

US07676001B2 MLD demapping using sub-metrics for soft-output MIMO detection and the like 有权
标题翻译：使用用于软输出MIMO检测的子度量的MLD解映射等
公开(公告)号：US07676001B2
公开(公告)日：2010-03-09
申请号：US11085025
申请日：2005-03-16
申请人： Nils Graef , Joachim S. Hammerschmidt
发明人： Nils Graef , Joachim S. Hammerschmidt
IPC分类号： H04L27/06
CPC分类号： H04L25/067 , H04L27/2601 , H04L27/38
摘要： A method for detecting a symbol encoded in one or more received signals, wherein the detected symbol corresponds to a combination of values of n components, n>1, comprises (a) for each of a plurality of different combinations of values of the n components, generating a set of two or more sub-metric values based on the one or more received signals. Each sub-metric is a function of one or more of the n components, and at least one sub-metric is a function of fewer than all n components. The method further comprise (b) detecting the symbol based on the sets of sub-metric values. In another embodiment, an apparatus for detecting a symbol encoded in one or more received signals, wherein the detected symbol corresponds to a combination of values of n components, n>1, comprises (a) means for generating a set of two or more sub-metric values based on the one or more received signals for each of a plurality of different combinations of values of the n components. Each sub-metric is a function of one or more of the n components, and at least one sub-metric is a function of fewer than all n components. The apparatus further comprises (b) means for detecting the symbol based on the sets of sub-metric values.
摘要翻译：一种用于检测在一个或多个接收信号中编码的符号的方法，其中所述检测到的符号对应于n个分量值n> 1的值的组合，包括（a）对于n个分量的值的多个不同组合中的每一个基于所述一个或多个接收到的信号产生一组两个或更多个子度量值。每个子度量是n个分量中的一个或多个的函数，并且至少一个子度量是少于全部n个分量的函数。该方法还包括（b）基于子度量值集合来检测符号。在另一个实施例中，一种用于检测在一个或多个接收信号中编码的符号的装置，其中所检测的符号对应于n个分量n> 1的值的组合，包括（a）用于生成一组两个或更多个子基于用于n个分量的值的多个不同组合中的每一个的一个或多个接收信号的测量值。每个子度量是n个分量中的一个或多个的函数，并且至少一个子度量是少于全部n个分量的函数。该装置还包括（b）用于基于子度量值集合来检测符号的装置。

22. 发明申请

US20100057977A1 REDUCED-POWER PROGRAMMING OF MULTI-LEVEL CELL (MLC) MEMORY 有权
标题翻译：多级电池（MLC）存储器的低功耗编程
公开(公告)号：US20100057977A1
公开(公告)日：2010-03-04
申请号：US12200129
申请日：2008-08-28
申请人： Nils Graef
发明人： Nils Graef
IPC分类号： G06F12/02
CPC分类号： G11C7/1006 , G11C11/5628 , G11C2211/5622
摘要： In one embodiment, a mobile electronic device has a host controller, an energy-saving encoder, an energy-saving decoder, and a multi-level cell (MLC) NAND flash memory. The host controller provides raw user data to the energy-saving encoder in k-bit segments. The energy-saving encoder encodes each k-bit segment into an n-bit segment of encoded user data for programming the MLC NAND flash memory as a p-symbol codeword, where (i) k is smaller than n (ii) p(=n/log2m) MLCs are used to store the p-symbol codeword (iii) each MLC stores one symbol of the codeword. The energy-saving decoder is adapted to read p-symbol codewords from the MLC NAND flash memory and decode each p-symbol codeword into a k-bit segment of raw user data for provision to the host controller. The host controller is adapted to vary k and n to conserve usage of power or memory-space, as needed.
摘要翻译：在一个实施例中，移动电子设备具有主机控制器，节能编码器，节能解码器和多电平单元（MLC）NAND闪速存储器。主机控制器以k位分段向节能编码器提供原始用户数据。节能编码器将每个k比特段编码为编码用户数据的n比特段，用于将MLC NAND闪存编程为p符号码字，其中（i）k小于n（ii）p（= n / log2m）MLC用于存储p符号码字（iii），每个MLC存储码字的一个符号。节能解码器适于从MLC NAND闪速存储器读取p符号码字，并将每个p符号码字解码为原始用户数据的k比特段以提供给主机控制器。主机控制器适于根据需要改变k和n以节省功率或存储空间的使用。

23. 发明授权

US07669110B2 Trace-ahead method and apparatus for determining survivor paths in a Viterbi detector 有权
标题翻译：用于确定维特比检测器中的幸存路径的跟踪方法和装置
公开(公告)号：US07669110B2
公开(公告)日：2010-02-23
申请号：US11241760
申请日：2005-09-30
申请人： Nils Graef
发明人： Nils Graef
IPC分类号： H03M13/03
CPC分类号： H03M13/4184 , H03M13/4161
摘要： Methods and apparatus are provided for determining survivor paths in a Viterbi detector, using a trace-ahead algorithm. A trellis memory is maintained having a depth L that stores L trellis stages, each of the L stages having a plurality, N, of trellis states; and a status memory is maintained for each of the N states of the trellis, wherein each entry in the status memory identifies a least recent trellis state stored in the trellis memory of a survivor path that begins at a given state on a side of the trellis associated with most recent states. A bit sequence of one or more of the survivor paths in the trellis is determined in an order that the bits are received by examining least and most recent trellis stages of the trellis and the status memory. One or fork memories maintain an indicator of whether a given fork is active; a list of active forks; a trellis position of active forks in the trellis; and a fork type of one or more forks in the trellis.
摘要翻译：提供了使用跟踪提前算法来确定维特比检测器中的幸存路径的方法和装置。保持具有存储L格状阶段的深度L的网格存储器，每个L级具有多个N格状态; 并且为网格的N个状态中的每一个维护状态存储器，其中状态存储器中的每个条目标识存储在网格一侧的给定状态下开始的幸存路径的网格存储器中的最近最近的网格状态与最近的州相关联。按照顺序确定网格中的一个或多个幸存路径的位序列，以便通过检查网格和状态存储器的最小和最近的网格级来接收比特。一个或多个叉存储器保持给定叉子是否活动的指示器; 活动叉列表; 在网格中有一个网格位置活跃的叉子; 和一个叉子类型的一个或多个叉子在网格。

24. 发明授权

US07640444B2 Systems and methods for low power bus operation 有权
标题翻译：低功率总线运行的系统和方法
公开(公告)号：US07640444B2
公开(公告)日：2009-12-29
申请号：US11341344
申请日：2006-01-26
申请人： Nils Graef
发明人： Nils Graef
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/3253 , G06F13/4217 , Y02D10/126 , Y02D10/151
摘要： Various systems and methods for power reduction are disclosed herein. As one example, a method for power reduction in a semiconductor device is disclosed. The method includes providing a semiconductor device that includes a bus. The bus includes a group of signals and a control signal associated with the group of signals. In one particular case, the group of signals is a data bus and the control signal is a low frequency signal implementing some particular control specific to the bus. In the method, the control signal doubles as a polarity control that indicates a polarity state of the group of signals while actively indicating the status of the particular control.
摘要翻译：本文公开了用于功率降低的各种系统和方法。作为一个示例，公开了半导体器件中的功率降低的方法。该方法包括提供包括总线的半导体器件。总线包括一组信号和与该组信号相关联的控制信号。在一个特定情况下，该组信号是数据总线，并且控制信号是实现特定于总线的特定控制的低频信号。在该方法中，控制信号同时作为指示特定控制状态的极性状态，同时表示该组信号的极性状态。

25. 发明申请

US20080301527A1 SYSTEMS AND METHODS FOR JOINT LDPC ENCODING AND DECODING 有权
标题翻译：用于连接LDPC编码和解码的系统和方法
公开(公告)号：US20080301527A1
公开(公告)日：2008-12-04
申请号：US11756709
申请日：2007-06-01
申请人： Nils Graef
发明人： Nils Graef
IPC分类号： G06F11/10
CPC分类号： H03M13/1105 , G11B20/1833 , G11B2020/185 , G11B2220/2516 , H03M13/6502
摘要： Various embodiments of the present invention provide systems and methods for LDPC encoding and decoding. For example, a system for performing LDPC encoding and decoding is disclosed that includes a joint LDPC encoder/decoder. The joint LDPC encoder/decoder includes both an LDPC decoder and an LDPC encoder that each utilize a common LDPC decoder circuit to perform the respective functions of encoding and decoding.
摘要翻译：本发明的各种实施例提供了用于LDPC编码和解码的系统和方法。例如，公开了一种用于执行LDPC编码和解码的系统，其包括联合LDPC编码器/解码器。联合LDPC编码器/解码器包括LDPC解码器和LDPC编码器，每个LDPC解码器和LDPC编码器均利用公共LDPC解码器电路来执行编码和解码的各自的功能。

26. 发明申请

US20070174643A1 Systems and methods for low power bus operation 有权
标题翻译：低功率总线运行的系统和方法
公开(公告)号：US20070174643A1
公开(公告)日：2007-07-26
申请号：US11341344
申请日：2006-01-26
申请人： Nils Graef
发明人： Nils Graef
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/3253 , G06F13/4217 , Y02D10/126 , Y02D10/151
摘要： Various systems and methods for power reduction are disclosed herein. As one example, a method for power reduction in a semiconductor device is disclosed. The method includes providing a semiconductor device that includes a bus. The bus includes a group of signals and a control signal associated with the group of signals. In one particular case, the group of signals is a data bus and the control signal is a low frequency signal implementing some particular control specific to the bus. In the method, the control signal doubles as a polarity control that indicates a polarity state of the group of signals while actively indicating the status of the particular control.
摘要翻译：本文公开了用于功率降低的各种系统和方法。作为一个示例，公开了半导体器件中的功率降低的方法。该方法包括提供包括总线的半导体器件。总线包括一组信号和与该组信号相关联的控制信号。在一个特定情况下，该组信号是数据总线，并且控制信号是实现特定于总线的特定控制的低频信号。在该方法中，控制信号同时作为指示特定控制状态的极性状态，同时表示该组信号的极性状态。

27. 发明申请

US20060209994A1 MLD demapping using sub-metrics for soft-output MIMO detection and the like 有权
标题翻译：使用用于软输出MIMO检测的子度量的MLD解映射等
公开(公告)号：US20060209994A1
公开(公告)日：2006-09-21
申请号：US11085025
申请日：2005-03-16
申请人： Nils Graef , Joachim Hammerschmidt
发明人： Nils Graef , Joachim Hammerschmidt
IPC分类号： H04L27/06
CPC分类号： H04L25/067 , H04L27/2601 , H04L27/38
摘要： A method for detecting a symbol encoded in one or more received signals, wherein the detected symbol corresponds to a combination of values of n components, n>1, comprises (a) for each of a plurality of different combinations of values of the n components, generating a set of two or more sub-metric values based on the one or more received signals. Each sub-metric is a function of one or more of the n components, and at least one sub-metric is a function of fewer than all n components. The method further comprises (b) detecting the symbol based on the sets of sub-metric values. In another embodiment, an apparatus for detecting a symbol encoded in one or more received signals, wherein the detected symbol corresponds to a combination of values of n components, n>1, comprises (a) means for generating a set of two or more sub-metric values based on the one or more received signals for each of a plurality of different combinations of values of the n components. Each sub-metric is a function of one or more of the n components, and at least one sub-metric is a function of fewer than all n components. The apparatus further comprises (b) means for detecting the symbol based on the sets of sub-metric values.
摘要翻译：一种用于检测在一个或多个接收信号中编码的符号的方法，其中所述检测到的符号对应于n个分量值n> 1的值的组合，包括（a）对于n个分量的值的多个不同组合中的每一个基于所述一个或多个接收到的信号产生一组两个或更多个子度量值。每个子度量是n个分量中的一个或多个的函数，并且至少一个子度量是少于全部n个分量的函数。该方法还包括（b）基于子度量值集合来检测符号。在另一个实施例中，一种用于检测在一个或多个接收信号中编码的符号的装置，其中所检测的符号对应于n个分量n> 1的值的组合，包括（a）用于生成一组两个或更多个子基于用于n个分量的值的多个不同组合中的每一个的一个或多个接收信号的测量值。每个子度量是n个分量中的一个或多个的函数，并且至少一个子度量是少于全部n个分量的函数。该装置还包括（b）用于基于子度量值集合来检测符号的装置。

28. 发明授权

US09544090B2 Hard input low density parity check decoder 有权
标题翻译：硬输入低密度奇偶校验解码器
公开(公告)号：US09544090B2
公开(公告)日：2017-01-10
申请号：US12750871
申请日：2010-03-31
申请人： Nils Graef
发明人： Nils Graef
IPC分类号： G06F11/00 , H04L1/00 , H03M13/11 , H03M13/00
CPC分类号： H04L1/0057 , H03M13/1108 , H03M13/6502 , H04L1/0045
摘要： A hard input low density parity check decoder is provided that shares logic between a bit-flipping decoder and a syndrome calculator. The hard-decision decoder decodes one or more error-correcting (EC) codewords and comprises a bit-flipping decoder that flips one or more bit nodes connected to one or more unsatisfied parity checks; and a syndrome calculator that performs a parity check to determine whether the bit-flipping decoder has converged on a valid codeword, wherein the bit-flipping decoder and the syndrome calculator share one or more logic elements. The decoder optionally includes means for updating a parity check equation of each flipped bit. Error-correcting (EC) codewords are decoded by flipping one or more bit nodes connected to one or more unsatisfied parity checks; and updating one or more parity check equations associated with the one or more bit nodes each time the one or more bit nodes are flipped. The parity check equations are updated whenever a bit is updated. The exemplary method terminates based on a predefined syndrome output.
摘要翻译：提供了一种硬输入低密度奇偶校验解码器，其在位翻转解码器和综合征计算器之间共享逻辑。硬判决解码器解码一个或多个错误校正（EC）码字，并且包括翻转与一个或多个不满足的奇偶校验检查相关联的一个或多个比特节点的比特翻译解码器; 以及校正子计算器，执行奇偶校验以确定比特翻转解码器是否已经收敛在有效码字上，其中比特翻转解码器和辨识器计算器共享一个或多个逻辑元素。解码器可选地包括用于更新每个翻转位的奇偶校验等式的装置。通过翻转连接到一个或多个不满足的奇偶校验的一个或多个比特节点来解码纠错（EC）码字; 以及每当所述一个或多个比特节点被翻转时，更新与所述一个或多个比特节点相关联的一个或多个奇偶校验方程。每当更新位时，更新奇偶校验方程。该示例性方法基于预定义的错误输出终止。

29. 发明授权

US08503128B2 Systems and methods for variable compensated fly height measurement 有权
标题翻译：可变补偿飞行高度测量的系统和方法
公开(公告)号：US08503128B2
公开(公告)日：2013-08-06
申请号：US13326493
申请日：2011-12-15
申请人： Nils Graef
发明人： Nils Graef
IPC分类号： G11B21/02
CPC分类号： G11B5/6029 , G11B5/6064
摘要： Various embodiments of the present invention provide systems and methods for determining fly height.
摘要翻译：本发明的各种实施例提供了用于确定飞行高度的系统和方法。

30. 发明授权

US08375281B2 Method and apparatus for storing survivor paths in a viterbi detector using systematic pointer exchange 失效
标题翻译：用于使用系统指针交换在维特比检测器中存储幸存路径的方法和装置
公开(公告)号：US08375281B2
公开(公告)日：2013-02-12
申请号：US13369624
申请日：2012-02-09
申请人： Nils Graef
发明人： Nils Graef
IPC分类号： H03M13/03
CPC分类号： H03M13/4184 , H03M13/395 , H03M13/6331
摘要： A survivor path memory is provided for a Viterbi detector. The survivor path memory comprises a plurality of columns, each associated with a different time step, and an input processor. Each column comprises a flip flop for storing one bit or portion of a bit sequence associated with a Viterbi state; and a multiplexer for each state controlled by a case signal indicating a time step, the multiplexer selecting a state from a previous time step, wherein an output of the multiplexer of a given state is connected to at least one data input of a flip flop of the given state. The input processor generates a control signal that exchanges one or more pointers based on a trellis structure, wherein each of the pointers points to one of the flip flops.
摘要翻译：为维特比检测器提供幸存路径存储器。幸存者路径存储器包括多个列，每个列与不同的时间步长相关联，以及输入处理器。每列包括用于存储与维特比状态相关联的位序列的一个位或部分的触发器; 以及多路复用器，用于由指示时间步长的情况信号控制的每个状态，所述多路复用器从先前的时间步长选择状态，其中给定状态的多路复用器的输出连接到触发器的至少一个数据输入给定的状态。输入处理器生成基于网格结构交换一个或多个指针的控制信号，其中每个指针指向其中一个触发器。

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