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21. 发明授权

US09053401B2 Laminating system, IC sheet, scroll of IC sheet, and method for manufacturing IC chip 有权
标题翻译：复合体系，IC片，IC片卷，IC芯片的制造方法
公开(公告)号：US09053401B2
公开(公告)日：2015-06-09
申请号：US11631688
申请日：2005-07-28
申请人： Ryosuke Watanabe , Naoto Kusumoto , Osamu Nakamura
发明人： Ryosuke Watanabe , Naoto Kusumoto , Osamu Nakamura
IPC分类号： H01L27/10 , B29C65/00 , B32B37/00 , G06K19/077 , B32B37/22 , H01L23/00 , H01L27/12
CPC分类号： H01L27/1266 , B32B37/0053 , B32B37/226 , B32B2425/00 , G06K19/077 , G06K19/07718 , H01L24/86 , H01L27/1214 , H01L2224/7965 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01041 , H01L2924/01042 , H01L2924/01049 , H01L2924/01056 , H01L2924/0106 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/04953 , H01L2924/09701 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/00
摘要： Thin film integrated circuits are peeled from a substrate and the peeled thin film integrated circuits are sealed, efficiently in order to improve manufacturing yields. The present invention provides laminating system comprising transporting means for transporting a substrate provided with a plurality of thin film integrated circuits; first peeling means for bonding first surfaces of the thin film integrated circuits to a first sheet member to peel the thin film integrated circuits from the substrate; second peeling means for bonding second surfaces of the thin film integrated circuits to a second sheet member to peel the thin film integrated circuits from the first sheet member; and sealing means for interposing the thin film integrated circuits between the second sheet member and a third sheet member to seal the thin film integrated circuit with the second sheet member and the third sheet member.
摘要翻译：薄膜集成电路从基板剥离，并且剥离的薄膜集成电路被有效地密封以提高制造成品率。本发明提供了一种层叠体系，其包括用于输送设置有多个薄膜集成电路的基板的输送机构; 第一剥离装置，用于将薄膜集成电路的第一表面接合到第一片状部件，以从基板剥离薄膜集成电路; 第二剥离装置，用于将薄膜集成电路的第二表面接合到第二片状部件，以将薄膜集成电路从第一片状部件剥离; 以及密封装置，用于将所述薄膜集成电路插入所述第二片状部件和第三片状部件之间，以与所述第二片状部件和所述第三片状部件密封所述薄膜集成电路。

22. 发明授权

US08698156B2 Laminating system 有权
标题翻译：复合系统
公开(公告)号：US08698156B2
公开(公告)日：2014-04-15
申请号：US12403988
申请日：2009-03-13
申请人： Ryosuke Watanabe , Hidekazu Takahashi , Takuya Tsurume
发明人： Ryosuke Watanabe , Hidekazu Takahashi , Takuya Tsurume
IPC分类号： H01L29/12 , H01L29/786 , H01L23/31
CPC分类号： H01L21/56 , B32B37/20 , B32B2305/342 , B42D25/45 , B42D2033/46 , G06K19/07718 , G06K19/07749 , G06K19/0775 , H01L21/67126 , H01L21/67132 , H01L21/67144 , H01L21/6835 , H01L27/1214 , H01L27/1266 , H01L2221/68318 , H01L2221/68354 , H01L2221/68363 , H01L2924/0002 , Y10T156/1089 , Y10T156/1093 , Y10T156/1712 , H01L2924/00
摘要： It is an object of the invention to improve the production efficiency in sealing a thin film integrated circuit and to prevent the damage and break. Further, it is another object of the invention to prevent a thin film integrated circuit from being damaged in shipment and to make it easier to handle the thin film integrated circuit. The invention provides a laminating system in which rollers are used for supplying a substrate for sealing, receiving IC chips, separating, and sealing. The separation, sealing, and reception of a plurality of thin film integrated circuits can be carried out continuously by rotating the rollers; thus, the production efficiency can be extremely improved. Further, the thin film integrated circuits can be easily sealed since a pair of rollers opposite to each other is used.
摘要翻译：本发明的目的是提高密封薄膜集成电路的生产效率并防止损坏和断裂。此外，本发明的另一个目的是防止薄膜集成电路在运输中受损，并且使得更容易处理薄膜集成电路。本发明提供了一种层压系统，其中辊子用于供应用于密封的基板，接收IC芯片，分离和密封。通过旋转辊可以连续地进行多个薄膜集成电路的分离，密封和接收; 从而可以极大地提高生产效率。此外，由于使用了彼此相对的一对辊，所以能够容易地密封薄膜集成电路。

23. 发明授权

US08481377B2 Method for manufacturing a semiconductor device with impurity doped oxide semiconductor 有权
标题翻译：制造具有杂质掺杂氧化物半导体的半导体器件的方法
公开(公告)号：US08481377B2
公开(公告)日：2013-07-09
申请号：US13026518
申请日：2011-02-14
申请人： Kengo Akimoto , Ryosuke Watanabe , Masashi Tsubuku , Shunpei Yamazaki
发明人： Kengo Akimoto , Ryosuke Watanabe , Masashi Tsubuku , Shunpei Yamazaki
IPC分类号： H01L21/338
CPC分类号： H01L29/7869 , H01L29/41733 , H01L29/66969 , H01L29/78618
摘要： It is an object to provide a semiconductor device including an oxide semiconductor, in which miniaturization of a transistor is achieved and the concentration of an electric field is relieved. The width of a gate electrode is reduced and a space between a source electrode layer and a drain electrode layer is shortened. By adding a rare gas in a self-alignment manner with the use of a gate electrode as a mask, a low-resistance region in contact with a channel formation region can be provided in an oxide semiconductor layer. Accordingly, even when the width of the gate electrode, that is, the line width of a gate wiring is small, the low-resistance region can be provided with high positional accuracy, so that miniaturization of a transistor can be realized.
摘要翻译：本发明的目的是提供一种包括氧化物半导体的半导体器件，其中实现了晶体管的小型化和电场的集中。栅电极的宽度减小，源电极层和漏电极层之间的间隔缩短。通过使用栅电极作为掩模以自对准的方式添加稀有气体，可以在氧化物半导体层中提供与沟道形成区域接触的低电阻区域。因此，即使栅电极的宽度，即栅极配线的线宽小，也能够提供高电位区域的高位置精度，能够实现晶体管的小型化。

24. 发明授权

US07863154B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US07863154B2
公开(公告)日：2011-01-04
申请号：US11989328
申请日：2006-07-21
申请人： Shunpei Yamazaki , Ryosuke Watanabe , Jun Koyama
发明人： Shunpei Yamazaki , Ryosuke Watanabe , Jun Koyama
IPC分类号： H01L21/30 , H01L21/46 , H01L21/00 , G06K19/077 , G06K19/07
CPC分类号： H01L21/6835 , H01L23/552 , H01L23/60 , H01L24/75 , H01L24/83 , H01L27/1248 , H01L27/1266 , H01L27/13 , H01L2221/68354 , H01L2221/68363 , H01L2221/68368 , H01L2223/6677 , H01L2224/16 , H01L2224/2919 , H01L2224/83101 , H01L2224/83192 , H01L2224/838 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01054 , H01L2924/0106 , H01L2924/01073 , H01L2924/01074 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/12044 , H01L2924/14 , H01L2924/15788 , H01L2924/19041 , H01L2924/19043 , H01L2924/00
摘要： A manufacturing method of a semiconductor device is provided, which includes a process in which a transistor is formed over a first substrate; a process in which a first insulating layer is formed over the transistor; a process in which a first conductive layer connected to a source or a drain of the transistor is formed; a process in which a second substrate provided with an second insulating layer is arranged so that the first insulating layer is attached to the second insulating layer; a process in which the second insulating layer is separated from the second substrate; and a process in which a third substrate provided with a second conductive layer which functions as an antenna is arranged so that the first conductive layer is electrically connected to the second conductive layer.
摘要翻译：提供了一种半导体器件的制造方法，其包括在第一衬底上形成晶体管的工艺; 在晶体管上形成第一绝缘层的工艺; 形成与晶体管的源极或漏极连接的第一导电层的工序; 其中设置有第二绝缘层的第二基板被布置成使得第一绝缘层附接到第二绝缘层的工艺; 第二绝缘层与第二基板分离的工序; 并且其中设置有用作天线的第二导电层的第三基板被布置成使得第一导电层电连接到第二导电层的工艺。

25. 发明申请

US20060011288A1 Laminating system, IC sheet, roll of IC sheet, and method for manufacturing IC chip 有权
公开(公告)号：US20060011288A1
公开(公告)日：2006-01-19
申请号：US11168353
申请日：2005-06-29
申请人： Ryosuke Watanabe , Hidekazu Takahashi , Takuya Tsurume , Yasuyuki Arai , Yasuko Watanabe , Miyuki Higuchi
发明人： Ryosuke Watanabe , Hidekazu Takahashi , Takuya Tsurume , Yasuyuki Arai , Yasuko Watanabe , Miyuki Higuchi
IPC分类号： B32B37/00 , B29C65/00
CPC分类号： H01L21/56 , B32B37/153 , B32B37/226 , B32B2305/342 , B32B2519/02 , G06K19/07718 , G06K19/07749 , H01L21/67132 , H01L2924/0002 , Y10T29/41 , Y10T156/1095 , Y10T156/1734 , H01L2924/00
摘要： The invention provides a laminating system in which one of second and third substrates for sealing a thin film integrated circuit is supplied to a first substrate having the plurality of thin film integrated circuit while being extruded in a heated and melted state, and further rollers are used for supplying the other substrate, receiving IC chips, separating, and sealing. Processes of separating the thin film integrated circuits provided over the first substrate, sealing the separated thin film integrated circuits, and receiving the sealed thin film integrated circuits can be continuously carried out by rotating the rollers. Thus, the production efficiency can be extremely improved.

26. 发明授权

US09935202B2 Transistor and display device comprising oxide semiconductor layer 有权
公开(公告)号：US09935202B2
公开(公告)日：2018-04-03
申请号：US13528009
申请日：2012-06-20
申请人： Shunpei Yamazaki , Masayuki Sakakura , Ryosuke Watanabe , Junichiro Sakata , Kengo Akimoto , Akiharu Miyanaga , Takuya Hirohashi , Hideyuki Kishida
发明人： Shunpei Yamazaki , Masayuki Sakakura , Ryosuke Watanabe , Junichiro Sakata , Kengo Akimoto , Akiharu Miyanaga , Takuya Hirohashi , Hideyuki Kishida
IPC分类号： H01L29/10 , H01L29/786 , H01L27/12 , H01L29/04
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/04 , H01L29/045 , H01L29/78618 , H01L29/78693 , H01L29/78696
摘要： To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.

27. 发明授权

US08232181B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US08232181B2
公开(公告)日：2012-07-31
申请号：US12953066
申请日：2010-11-23
申请人： Shunpei Yamazaki , Ryosuke Watanabe , Jun Koyama
发明人： Shunpei Yamazaki , Ryosuke Watanabe , Jun Koyama
IPC分类号： H01L21/30 , H01L21/46 , H01L21/00 , G06K19/077 , G06K19/07
CPC分类号： H01L21/6835 , H01L23/552 , H01L23/60 , H01L24/75 , H01L24/83 , H01L27/1248 , H01L27/1266 , H01L27/13 , H01L2221/68354 , H01L2221/68363 , H01L2221/68368 , H01L2223/6677 , H01L2224/16 , H01L2224/2919 , H01L2224/83101 , H01L2224/83192 , H01L2224/838 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01054 , H01L2924/0106 , H01L2924/01073 , H01L2924/01074 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/12044 , H01L2924/14 , H01L2924/15788 , H01L2924/19041 , H01L2924/19043 , H01L2924/00
摘要： A manufacturing method of a semiconductor device is provided, which includes a process in which a transistor is formed over a first substrate; a process in which a first insulating layer is formed over the transistor; a process in which a first conductive layer connected to a source or a drain of the transistor is formed; a process in which a second substrate provided with a second insulating layer is arranged so that the first insulating layer is attached to the second insulating layer; a process in which the second insulating layer is separated from the second substrate; and a process in which a third substrate provided with a second conductive layer which functions as an antenna is arranged so that the first conductive layer is electrically connected to the second conductive layer.
摘要翻译：提供一种半导体器件的制造方法，其包括在第一衬底上形成晶体管的工艺; 在晶体管上形成第一绝缘层的工艺; 形成与晶体管的源极或漏极连接的第一导电层的工序; 其中设置有第二绝缘层的第二基板被布置成使得第一绝缘层附接到第二绝缘层的工艺; 第二绝缘层与第二基板分离的工序; 并且其中设置有用作天线的第二导电层的第三基板被布置成使得第一导电层电连接到第二导电层的工艺。

28. 发明授权

US07591863B2 Laminating system, IC sheet, roll of IC sheet, and method for manufacturing IC chip 有权
标题翻译：复合体系，IC片，IC片卷，IC芯片的制造方法
公开(公告)号：US07591863B2
公开(公告)日：2009-09-22
申请号：US11168353
申请日：2005-06-29
申请人： Ryosuke Watanabe , Hidekazu Takahashi , Takuya Tsurume , Yasuyuki Arai , Yasuko Watanabe , Miyuki Higuchi
发明人： Ryosuke Watanabe , Hidekazu Takahashi , Takuya Tsurume , Yasuyuki Arai , Yasuko Watanabe , Miyuki Higuchi
IPC分类号： H01L21/00 , H01L21/64
CPC分类号： H01L21/56 , B32B37/153 , B32B37/226 , B32B2305/342 , B32B2519/02 , G06K19/07718 , G06K19/07749 , H01L21/67132 , H01L2924/0002 , Y10T29/41 , Y10T156/1095 , Y10T156/1734 , H01L2924/00
摘要： The invention provides a laminating system in which one of second and third substrates for sealing a thin film integrated circuit is supplied to a first substrate having the plurality of thin film integrated circuit while being extruded in a heated and melted state, and further rollers are used for supplying the other substrate, receiving IC chips, separating, and sealing. Processes of separating the thin film integrated circuits provided over the first substrate, sealing the separated thin film integrated circuits, and receiving the sealed thin film integrated circuits can be continuously carried out by rotating the rollers. Thus, the production efficiency can be extremely improved.
摘要翻译：本发明提供了一种层压系统，其中用于密封薄膜集成电路的第二和第三基板中的一个被提供到具有多个薄膜集成电路的第一基板，同时在加热和熔融状态下挤出，并且使用另外的辊用于供给另一个基板，接收IC芯片，分离和密封。通过旋转辊可以连续地进行分离设置在第一基板上的薄膜集成电路，密封分离的薄膜集成电路和接收密封的薄膜集成电路的工艺。因此，可以极大地提高生产效率。

29. 发明申请

US20080044940A1 Laminating System 有权
标题翻译：层压体系
公开(公告)号：US20080044940A1
公开(公告)日：2008-02-21
申请号：US11596582
申请日：2005-05-31
申请人： Ryosuke Watanabe , Hidekazu Takahashi , Takuya Tsurume
发明人： Ryosuke Watanabe , Hidekazu Takahashi , Takuya Tsurume
IPC分类号： H01L21/67
CPC分类号： H01L21/56 , B32B37/20 , B32B2305/342 , B42D25/45 , B42D2033/46 , G06K19/07718 , G06K19/07749 , G06K19/0775 , H01L21/67126 , H01L21/67132 , H01L21/67144 , H01L21/6835 , H01L27/1214 , H01L27/1266 , H01L2221/68318 , H01L2221/68354 , H01L2221/68363 , H01L2924/0002 , Y10T156/1089 , Y10T156/1093 , Y10T156/1712 , H01L2924/00
摘要： It is an object of the invention to improve the production efficiency in sealing a thin film integrated circuit and to prevent the damage and break. Further, it is another object of the invention to prevent a thin film integrated circuit from being damaged in shipment and to make it easier to handle the thin film integrated circuit. The invention provides a laminating system in which rollers are used for supplying a substrate for sealing, receiving IC chips, separating, and sealing. The separation, sealing, and reception of a plurality of thin film integrated circuits can be carried out continuously by rotating the rollers; thus, the production efficiency can be extremely improved. Further, the thin film integrated circuits can be easily sealed since a pair of rollers opposite to each other is used.
摘要翻译：本发明的目的是提高密封薄膜集成电路的生产效率并防止损坏和断裂。此外，本发明的另一个目的是防止薄膜集成电路在运输中受损，并且使得更容易处理薄膜集成电路。本发明提供了一种层压系统，其中辊子用于供应用于密封的基板，接收IC芯片，分离和密封。通过旋转辊可以连续地进行多个薄膜集成电路的分离，密封和接收; 从而可以极大地提高生产效率。此外，由于使用了彼此相对的一对辊，所以能够容易地密封薄膜集成电路。

30. 发明申请

US20070077691A1 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20070077691A1
公开(公告)日：2007-04-05
申请号：US11522455
申请日：2006-09-18
申请人： Ryosuke Watanabe
发明人： Ryosuke Watanabe
IPC分类号： H01L21/84
CPC分类号： H01L27/1266 , H01L24/97 , H01L27/1285 , H01L27/1292 , H01L51/56 , H01L2924/14 , H01L2924/00
摘要： It is an object of the present invention to provide a manufacturing method of a semiconductor device where a semiconductor element is prevented from being damaged and throughput speed thereof is improved, even in a case of thinning or removing a supporting substrate after forming the semiconductor element over the supporting substrate. According to one feature of the present invention, a method for manufacturing a semiconductor device includes the steps of forming a plurality of element groups over an upper surface of a substrate; forming an insulating film so as to cover the plurality of element groups; selectively forming an opening to the insulating film which is located in a region between neighboring two element groups in the plurality of element groups to expose the substrate; forming a first film so as to cover the insulating film and the opening; exposing the element groups by removing the substrate; forming a second film so as to cover the surface of the exposed element groups; and cutting off between the plurality of element groups so as not to expose the insulating film.
摘要翻译：本发明的目的是提供一种半导体器件的制造方法，即使在形成半导体元件之后，在使半导体元件变薄或去除支撑基板的情况下，也可以防止半导体元件受到损坏并且其吞吐速度得到改善支撑基板。根据本发明的一个特征，一种制造半导体器件的方法包括以下步骤：在衬底的上表面上形成多个元件组; 形成绝缘膜以覆盖所述多个元件组; 选择性地形成位于所述多个元件组中相邻的两个元件组之间的区域中的绝缘膜的开口以露出所述衬底; 形成第一膜以覆盖绝缘膜和开口; 通过去除衬底暴露元件组; 形成第二膜以覆盖暴露的元件组的表面; 并且在多个元件组之间切断以便不暴露绝缘膜。

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