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    • 22. 发明申请
    • MODIFIED CROWN REDUCTION GEAR
    • 改装式减速齿轮
    • US20110162471A1
    • 2011-07-07
    • US12674942
    • 2009-09-14
    • Takayuki TakahashiHiroyuki SasakiTomoya Masuyama
    • Takayuki TakahashiHiroyuki SasakiTomoya Masuyama
    • F16H1/20
    • F16H1/321Y10T74/19Y10T74/19614
    • A reduction gear capable of satisfying, at high level, each of: realizing a high reduction ratio; preventing backlash by securing rotation smoothness; and carrying out compactification and weight saving of entire mechanism is provided. The reduction gear of the invention is a modified crown reduction gear, comprising: a pressing mechanism 16 operated to rotate; a fixed crown gear 2 fixed to an external member 15; a movable crown gear 1, wherein the difference in the number of teeth between the gears is one; and an output axis 3 flexibly attached to the gear 1. The gear 1 engages with the gear 2 at a slant by pressing-force provided from the mechanism 16. In this instance, contact locations of teeth of the gears 1 and 2 are dispersed at two places existing at both sides between which a gradient center line intervenes.
    • 一种减速装置,能够高水平地满足:实现高减速比; 通过确保旋转平滑度来防止反向间隙; 并提供了整个机构的紧凑化和重量减轻。 本发明的减速齿轮是改进的齿冠减速齿轮,包括:操作旋转的按压机构16; 固定在外部构件15上的固定冠齿轮2; 可动冠齿轮1,其中齿轮之间的齿数差为1; 以及与齿轮1柔性地连接的输出轴3.齿轮1通过从机构16提供的按压力以倾斜方式与齿轮2啮合。在这种情况下,齿轮1和2的齿的接触位置分散在 双方存在两个梯度中心线介入的两个地方。
    • 23. 发明申请
    • Crystal device
    • 水晶装置
    • US20110148538A1
    • 2011-06-23
    • US12928370
    • 2010-12-10
    • Hiroyuki Sasaki
    • Hiroyuki Sasaki
    • H03B5/30H03B5/32
    • H03H9/19H03H9/1021
    • An object is to provide a crystal device in which an influence due to an electroconductive adhesive is reduced, and vibration characteristics of a crystal piece are favourably maintained. A configuration is such that in a crystal device including: a container main body having a concavity, with a crystal retention terminal formed in a bottom face of the concavity, and with a mounting terminal that is electrically connected to the crystal retention terminal formed on an outer bottom face; a crystal piece accommodated in the concavity, with an excitation electrode formed on both main faces, and with a support electrode that is electrically connected to the excitation electrode using a connecting electrode, formed on both sides of one end portion, and with the support electrode bonded to the crystal retention terminal with an electroconductive adhesive; and a cover that is connected to an open end face of the container main body and hermetically seals the crystal piece, there is provided a jetty being a main face of the crystal piece, and that protrudes on a periphery of the support electrode, and the jetty is formed integral with the crystal piece.
    • 目的是提供一种晶体装置,其中由于导电粘合剂引起的影响减小,并且有利地保持了晶片的振动特性。 一种结构是这样的结构,即在一种晶体装置中,包括:具有凹部的容器主体,在凹部的底面形成有晶体保持端子,并且具有与形成在凹部上的晶体保持端子电连接的安装端子 外底面 容纳在凹部中的晶体片,具有形成在两个主面上的激励电极,以及形成在一个端部的两侧上的与使用连接电极电连接的激励电极的支撑电极以及支撑电极 用导电粘合剂粘合到晶体保留端子; 以及与容器主体的开口端面连接并对该结晶片进行气密密封的盖,设置有作为该结晶片的主面的突出部,并且在支撑电极的周围突出, 码头与水晶片形成一体。
    • 28. 发明申请
    • Semiconductor integrated circuit device
    • 半导体集成电路器件
    • US20070226558A1
    • 2007-09-27
    • US11600208
    • 2006-11-16
    • Yuri IkedaYoshikazu AotoJun MatsushimaHiroyuki SasakiTomoyoshi UjiiMakoto Saen
    • Yuri IkedaYoshikazu AotoJun MatsushimaHiroyuki SasakiTomoyoshi UjiiMakoto Saen
    • G01R31/28
    • G01R31/31705G01R31/318572
    • The present invention is directed to facilitate debugging in a semiconductor integrated circuit device including a plurality of microprocessors. A semiconductor integrated circuit device includes: a plurality of processors; a plurality of debug interfaces enabling debugging of the corresponding processors; a plurality of common terminals shared by the plurality of debug interfaces; a selection circuit capable of selectively connecting the plurality of debug interfaces to the common terminals; and a controller capable of controlling selecting operation in the selection circuit in accordance with a predetermined instruction. A first selector capable of selectively connecting the plurality of debug interfaces to a TRST terminal in the terminal group conformed with the JTAG specifications, and a second selector capable of selectively connecting the plurality of debug interfaces to terminals other than the TRST terminal are provided. With the configuration, even in the case where the number of processors increases, the invention can flexibly address the increase.
    • 本发明旨在促进包括多个微处理器的半导体集成电路器件的调试。 半导体集成电路装置包括:多个处理器; 多个调试接口,能够调试相应的处理器; 由所述多个调试接口共享的多个公共终端; 选择电路,其能够将所述多个调试接口选择性地连接到所述公共端子; 以及控制器,其能够根据预定指令来控制选择电路中的选择操作。 提供能够选择性地将多个调试接口连接到符合JTAG规范的终端组中的TRST终端的第一选择器,并且提供能够选择性地将多个调试接口连接到除了TRST终端之外的终端的第二选择器。 利用该配置,即使在处理器数量增加的情况下,本发明可以灵活地解决增加的问题。