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21. 发明授权

US08125016B2 Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US08125016B2
公开(公告)日：2012-02-28
申请号：US10519084
申请日：2003-06-19
申请人： Heiji Watanabe , Kazuhiko Endo , Kenzo Manabe
发明人： Heiji Watanabe , Kazuhiko Endo , Kenzo Manabe
IPC分类号： H01L27/115 , H01L21/84
CPC分类号： H01L21/28202 , H01L21/28167 , H01L29/513 , H01L29/517 , H01L29/518
摘要： There is provided a semiconductor device having, on a silicon substrate, a gate insulating film and a gate electrode in this order; wherein the gate insulating film comprises a nitrogen containing high-dielectric-constant insulating film which has a structure in which nitrogen is introduced into metal oxide or metal silicate; and the nitrogen concentration in the nitrogen containing high-dielectric-constant insulating film has a distribution in the direction of the film thickness; and a position at which the nitrogen concentration in the nitrogen containing high-dielectric-constant insulating film reaches the maximum in the direction of the film thickness is present in a region at a distance from the silicon substrate. A manufacturing method of a semiconductor device comprising the step of making the introduction of nitrogen by irradiating the high-dielectric-constant insulating film which is made of metal oxide or metal silicate, with a nitrogen containing plasma, is also provided. This improves the thermal stability of the high-dielectric-constant insulating film, suppresses the dopant penetration and, in addition, prevents electric characteristics of the interface with the silicon substrate from deteriorating.
摘要翻译：提供一种在硅衬底上依次具有栅极绝缘膜和栅电极的半导体器件; 其中所述栅极绝缘膜包括含氮的高介电常数绝缘膜，其具有将氮引入金属氧化物或金属硅酸盐中的结构; 含氮高介电常数绝缘膜中的氮浓度在膜厚方向上具有分布; 在与硅衬底相距一定距离的区域存在氮含量高介电常数绝缘膜中的氮浓度在膜厚方向上达到最大的位置。还提供了一种半导体器件的制造方法，其包括通过用含氮等离子体照射由金属氧化物或金属硅酸盐制成的高介电常数绝缘膜来引入氮的步骤。这提高了高介电常数绝缘膜的热稳定性，抑制了掺杂剂的渗透，另外防止与硅衬底的界面的电特性劣化。

22. 发明申请

US20110037106A1 SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110037106A1
公开(公告)日：2011-02-17
申请号：US12988977
申请日：2009-04-16
申请人： Kenzo Manabe
发明人： Kenzo Manabe
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L27/095 , H01L27/0694 , H01L29/665 , H01L29/6656 , H01L29/66643 , H01L29/7839
摘要： A semiconductor device improves a Schottky-barrier field-effect transistor. In a semiconductor device including a gate electrode formed with interposition of a gate insulating film on a channel formed on a semiconductor substrate, and a Schottky source/drain formed within a top surface of the substrate to be positioned on both sides of the gate insulating film so that end portions of the Schottky source and the Schottky drain do not cover a lower end portion of the gate insulating film and so as to form Schottky junctions with the semiconductor substrate, a Schottky barrier height at an interface between the end portion of the Schottky source and the semiconductor substrate and a Schottky barrier height at an interface between the end portion of the Schottky drain and the semiconductor substrate are different from Schottky barrier heights at interfaces between portions except the end portions of the Schottky source/drain and the substrate.
摘要翻译：半导体器件改善了肖特基势垒场效应晶体管。在包括在形成于半导体衬底上的沟道上插入栅极绝缘膜的栅电极和形成在衬底顶表面内的位于栅极绝缘膜两侧的肖特基源极/漏极的半导体器件中，使得肖特基源和肖特基漏极的端部不覆盖栅极绝缘膜的下端部并且与半导体衬底形成肖特基结，肖特基势垒高度在肖特基源极和半导体衬底以及在肖特基漏极和半导体衬底的端部之间的界面处的肖特基势垒高度与肖特基源极/漏极和衬底的端部之外的部分之间的界面处的肖特基势垒高度不同。

23. 发明授权

US07875935B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07875935B2
公开(公告)日：2011-01-25
申请号：US12310774
申请日：2007-06-04
申请人： Kenzo Manabe
发明人： Kenzo Manabe
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119 , H01L21/8238
CPC分类号： H01L21/823835 , H01L21/28097 , H01L29/66545
摘要： A semiconductor device includes a silicon substrate; an N-channel field-effect transistor including a first gate insulating film on the silicon substrate, a first gate electrode on the first gate insulating film and a first source/drain region; and a P-channel field-effect transistor including a second gate insulating film on the silicon substrate, a second gate electrode on the second gate insulating film and a second source/drain region. Each of the first and second gate electrodes includes a crystallized nickel silicide region containing an impurity element, the crystallized nickel silicide region being contact with the first or second gate insulating film, and a barrier layer region in an upper portion including an upper surface of the gate electrode, the barrier layer region containing an Ni diffusion-preventing element higher in concentration than that of a lower portion below the upper portion.
摘要翻译：半导体器件包括硅衬底; N沟道场效应晶体管，其包括在硅衬底上的第一栅极绝缘膜，第一栅极绝缘膜上的第一栅极电极和第一源极/漏极区域; 以及P沟道场效应晶体管，其包括硅衬底上的第二栅极绝缘膜，第二栅极绝缘膜上的第二栅极电极和第二源极/漏极区域。第一和第二栅电极中的每一个包括含有杂质元素的结晶的硅化镍区域，结晶的镍硅化物区域与第一或第二栅极绝缘膜接触，并且在上部的阻挡层区域包括上表面栅电极，阻挡层区域含有比上部下方的下部更高浓度的Ni扩散防止元件。

24. 发明申请

US20090321839A1 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090321839A1
公开(公告)日：2009-12-31
申请号：US12310774
申请日：2007-06-04
申请人： Kenzo Manabe
发明人： Kenzo Manabe
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823835 , H01L21/28097 , H01L29/66545
摘要： A semiconductor device includes a silicon substrate; an N-channel field-effect transistor including a first gate insulating film on the silicon substrate, a first gate electrode on the first gate insulating film and a first source/drain region; and a P-channel field-effect transistor including a second gate insulating film on the silicon substrate, a second gate electrode on the second gate insulating film and a second source/drain region. Each of the first and second gate electrodes includes a crystallized nickel silicide region containing an impurity element, the crystallized nickel silicide region being contact with the first or second gate insulating film, and a barrier layer region in an upper portion including an upper surface of the gate electrode, the barrier layer region containing an Ni diffusion-preventing element higher in concentration than that of a lower portion below the upper portion.
摘要翻译：半导体器件包括硅衬底; N沟道场效应晶体管，其包括在硅衬底上的第一栅极绝缘膜，第一栅极绝缘膜上的第一栅极电极和第一源极/漏极区域; 以及P沟道场效应晶体管，其包括硅衬底上的第二栅极绝缘膜，第二栅极绝缘膜上的第二栅极电极和第二源极/漏极区域。第一和第二栅电极中的每一个包括含有杂质元素的结晶的硅化镍区域，结晶的镍硅化物区域与第一或第二栅极绝缘膜接触，并且在上部的阻挡层区域包括上表面栅电极，阻挡层区域含有比上部下方的下部更高浓度的Ni扩散防止元件。

25. 发明申请

US20090026550A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090026550A1
公开(公告)日：2009-01-29
申请号：US12279379
申请日：2006-11-24
申请人： Kenzo Manabe
发明人： Kenzo Manabe
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823814 , H01L21/28097 , H01L21/823835 , H01L29/4975 , H01L29/66545
摘要： A semiconductor device includes: a silicon substrate; and a field effect transistor including a gate insulating film over the silicon substrate, a gate electrode on the gate insulating film, and source and drain regions. The gate electrode includes, in part in contact with the gate insulating film, a crystallized Ni silicide region containing an impurity element of a conductivity type opposite to a conductivity type of a channel region in the field effect transistor.
摘要翻译：半导体器件包括：硅衬底; 以及包括在硅衬底上的栅绝缘膜，栅极绝缘膜上的栅电极以及源极和漏极区的场效应晶体管。栅电极部分地与栅极绝缘膜接触，包含与场效应晶体管中的沟道区的导电类型相反的导电类型的杂质元素的结晶的Ni硅化物区域。

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