会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 21. 发明申请
    • POWER AMPLIFIER
    • 功率放大器
    • US20090174484A1
    • 2009-07-09
    • US12131959
    • 2008-06-03
    • Kazuya YamamotoMiyo Miyashita
    • Kazuya YamamotoMiyo Miyashita
    • H03G3/30
    • H03F3/191H03G1/0052
    • An amplifying transistor for amplifying a radio frequency signal between an input terminal and an output terminal. The cathode of a first diode is connected to the input terminal and the anode of a second diode is connected to the output terminal. A matching and attenuating circuit is connected between the anode of the first diode and the cathode of the second diode. A matching and attenuating circuit reduces impedance mismatches on the input terminal side and the output terminal side, and attenuates the radio frequency signal. In an amplification mode, a bias circuit supplies a bias current to an amplifying transistor and a current mirror circuit turns off the first and second diodes. In an attenuation mode, the bias circuit supplies no bias current to the amplifying transistor and the current mirror circuit turns on the first and second diodes.
    • 一种放大晶体管,用于放大输入端和输出端之间的射频信号。 第一二极管的阴极连接到输入端子,第二二极管的阳极连接到输出端子。 匹配和衰减电路连接在第一二极管的阳极和第二二极管的阴极之间。 匹配和衰减电路减少输入端侧和输出端侧的阻抗失配,并衰减射频信号。 在放大模式中,偏置电路向放大晶体管提供偏置电流,并且电流镜电路关断第一和第二二极管。 在衰减模式中,偏置电路不向放大晶体管提供偏置电流,并且电流镜电路导通第一和第二二极管。
    • 22. 发明授权
    • Power amplifier
    • 功率放大器
    • US07522001B2
    • 2009-04-21
    • US11946931
    • 2007-11-29
    • Kazuya YamamotoMiyo Miyashita
    • Kazuya YamamotoMiyo Miyashita
    • H03G3/10
    • H03F1/302H03F3/19H03F2200/18H03F2200/447H03F2200/451H03G1/0035
    • An emitter follower circuit applies to an input terminal of a second amplifying device a voltage according to a reference voltage applied to a reference terminal. First and second resistors are connected in series between the reference terminal and an input terminal of a first amplifying device. The collector of a first transistor is connected to the reference terminal and a control voltage is applied to the base of the first transistor. A third resistor is connected between the emitter of the first transistor and a grounding point. A current mirror circuit draws a current proportional to a current input from the collector of the first transistor from a connection point of the first and second resistors.
    • 射极跟随器电路根据施加到参考端子的参考电压向第二放大器件的输入端子施加电压。 第一和第二电阻串联连接在参考端和第一放大器的输入端之间。 第一晶体管的集电极连接到参考端子,并且控制电压被施加到第一晶体管的基极。 第三电阻连接在第一晶体管的发射极和接地点之间。 电流镜电路从第一和第二电阻器的连接点吸取与来自第一晶体管的集电极的电流成比例的电流。
    • 23. 发明授权
    • Driver circuit
    • 驱动电路
    • US07193463B2
    • 2007-03-20
    • US10922959
    • 2004-08-23
    • Miyo MiyashitaKazuya Yamamoto
    • Miyo MiyashitaKazuya Yamamoto
    • H03F3/45
    • H03F3/45085H03F3/19
    • In a driver circuit including transistors each having an emitter follower configuration and a pair of differential transistors with emitter outputs of the transistors of the emitter follower configuration as inputs, end terminals of the pair of differential transistors are connected to individual bonding pads, and the respective bonding pads and voltage sources are individually connected by wires that function as inductors. Thereby, even in the case where the lengths of the wires of output terminals change according to packaging, outputs can be matched by determining the wire lengths of the wires suitably.
    • 在包括具有发射极跟随器配置的晶体管的驱动器电路和具有射极跟随器结构的晶体管的发射极输出的一对差分晶体管作为输入的情况下,该对差分晶体管的端部端子连接到单独的焊盘, 接合焊盘和电压源通过用作电感器的导线分别连接。 因此,即使在输出端子的导线的长度根据封装而变化的情况下,也可以通过适当地确定电线的长度来匹配输出。
    • 27. 发明申请
    • REFERENCE VOLTAGE GENERATION CIRCUIT AND BIAS CIRCUIT
    • 参考电压发生电路和偏置电路
    • US20100127689A1
    • 2010-05-27
    • US12417730
    • 2009-04-03
    • Kazuya YamamotoMiyo Miyashita
    • Kazuya YamamotoMiyo Miyashita
    • G05F3/16G05F1/10
    • G05F3/185
    • A reference voltage generation circuit comprises: a first depletion mode FET; a second depletion mode FET; a first resistor; a first bipolar transistor; a second resistor; a second bipolar transistor; a third bipolar transistor; a third resistor; a third depletion mode FET having its drain connected to a second end of the first resistor and to the collector of the first bipolar transistor; and a fourth bipolar transistor having its base and collector connected to the gate and the source of the third depletion mode FET, and its emitter grounded, wherein source voltage of the second depletion mode FET is output as a reference voltage.
    • 参考电压产生电路包括:第一耗尽型FET; 第二耗尽型FET; 第一个电阻; 第一双极晶体管; 第二电阻器; 第二双极晶体管; 第三双极晶体管; 第三电阻; 第三耗尽型FET,其漏极连接到第一电阻器的第二端和第一双极晶体管的集电极; 以及第四双极晶体管,其基极和集电极连接到第三耗尽型FET的栅极和源极,并且其发射极接地,其中第二耗尽型FET的源极电压作为参考电压输出。
    • 28. 发明申请
    • POWER AMPLIFIER
    • 功率放大器
    • US20090051437A1
    • 2009-02-26
    • US11946931
    • 2007-11-29
    • Kazuya YamamotoMiyo Miyashita
    • Kazuya YamamotoMiyo Miyashita
    • H03G3/10
    • H03F1/302H03F3/19H03F2200/18H03F2200/447H03F2200/451H03G1/0035
    • An emitter follower circuit applies to an input terminal of a second amplifying device a voltage according to a reference voltage applied to a reference terminals. First and second resistors are connected in series between the reference terminal and an input terminal of a first amplifying device. The collector of a first transistor is connected to the reference terminal, and a control voltage is applied to the base of the first transistor. A third resistor is connected between the emitter of the first transistor and a grounding point. A current mirror circuit draws a current proportional to a current input from the collector of the first transistor from a connection point of the first and second resistors.
    • 射极跟随器电路根据施加到参考端子的参考电压向第二放大器件的输入端子施加电压。 第一和第二电阻串联连接在参考端和第一放大器的输入端之间。 第一晶体管的集电极连接到参考端子,并且控制电压被施加到第一晶体管的基极。 第三电阻连接在第一晶体管的发射极和接地点之间。 电流镜电路从第一和第二电阻器的连接点吸取与来自第一晶体管的集电极的电流成比例的电流。
    • 29. 发明授权
    • Differential amplifier including bias circuit with bias resistor
    • 差分放大器包括带偏置电阻的偏置电路
    • US5886578A
    • 1999-03-23
    • US883455
    • 1997-06-26
    • Miyo MiyashitaKazuya Yamamoto
    • Miyo MiyashitaKazuya Yamamoto
    • H03K5/08H03F3/45H03K5/02H03K19/0185H03K19/0952
    • H03F3/45076H03K19/018564H03K5/02
    • A differential amplifier receiving a first input signal and a second input signal, respectively, and amplifying voltage difference between the first and second input signals to output an output signal includes a first source follower circuit receiving an external data signal as the first input signal, and having an output node; a second source following circuit having a constant current source FET and receiving a reference voltage as the second input signal; and a bias circuit providing a signal having the same phase as the data signal from the output node of the first source follower circuit and inputting that signal to a gate terminal of the constant current source FET of the second source follower circuit. By providing an input interface circuit connected to an external signal source and producing a phase inversion signal from an input data signal in a differential amplifier or in a first stage differential amplifier connected to other amplifiers in multiple stages, the differential gain can be improved to a value approximately equal to that obtained when differential inputs are supplied.
    • 分别接收第一输入信号和第二输入信号的差分放大器以及放大第一和第二输入信号之间的电压差以输出输出信号包括接收作为第一输入信号的外部数据信号的第一源极跟随器电路,以及 具有输出节点; 第二源电路,具有恒流源FET并接收参考电压作为第二输入信号; 以及偏置电路,提供与来自第一源极跟随器电路的输出节点的数据信号具有相同相位的信号,并将该信号输入到第二源极跟随器电路的恒流源FET的栅极端子。 通过提供连接到外部信号源的输入接口电路,并且从差分放大器中的输入数据信号或在多级连接到其它放大器的第一级差分放大器中产生相位反转信号,可以将差分增益提高到 大约等于提供差分输入时获得的值。